common: Drop log.h from common header
[platform/kernel/u-boot.git] / arch / arm / mach-rockchip / tpl.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2019 Rockchip Electronics Co., Ltd
4  */
5
6 #include <common.h>
7 #include <debug_uart.h>
8 #include <dm.h>
9 #include <hang.h>
10 #include <init.h>
11 #include <log.h>
12 #include <ram.h>
13 #include <spl.h>
14 #include <version.h>
15 #include <asm/io.h>
16 #include <asm/arch-rockchip/bootrom.h>
17
18 #define TIMER_LOAD_COUNT_L      0x00
19 #define TIMER_LOAD_COUNT_H      0x04
20 #define TIMER_CONTROL_REG       0x10
21 #define TIMER_EN        0x1
22 #define TIMER_FMODE     BIT(0)
23 #define TIMER_RMODE     BIT(1)
24
25 __weak void rockchip_stimer_init(void)
26 {
27         /* If Timer already enabled, don't re-init it */
28         u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
29
30         if (reg & TIMER_EN)
31                 return;
32
33 #ifndef CONFIG_ARM64
34         asm volatile("mcr p15, 0, %0, c14, c0, 0"
35                      : : "r"(COUNTER_FREQUENCY));
36 #endif
37
38         writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
39         writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
40         writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
41         writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
42                TIMER_CONTROL_REG);
43 }
44
45 __weak int board_early_init_f(void)
46 {
47         return 0;
48 }
49
50 void board_init_f(ulong dummy)
51 {
52         struct udevice *dev;
53         int ret;
54
55         board_early_init_f();
56
57 #if defined(CONFIG_DEBUG_UART) && defined(CONFIG_TPL_SERIAL_SUPPORT)
58         /*
59          * Debug UART can be used from here if required:
60          *
61          * debug_uart_init();
62          * printch('a');
63          * printhex8(0x1234);
64          * printascii("string");
65          */
66         debug_uart_init();
67 #ifdef CONFIG_TPL_BANNER_PRINT
68         printascii("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
69                                 U_BOOT_TIME ")\n");
70 #endif
71 #endif
72         ret = spl_early_init();
73         if (ret) {
74                 debug("spl_early_init() failed: %d\n", ret);
75                 hang();
76         }
77
78         /* Init secure timer */
79         rockchip_stimer_init();
80         /* Init ARM arch timer in arch/arm/cpu/ */
81         timer_init();
82
83         ret = uclass_get_device(UCLASS_RAM, 0, &dev);
84         if (ret) {
85                 printf("DRAM init failed: %d\n", ret);
86                 return;
87         }
88 }
89
90 int board_return_to_bootrom(struct spl_image_info *spl_image,
91                             struct spl_boot_device *bootdev)
92 {
93         back_to_bootrom(BROM_BOOT_NEXTSTAGE);
94
95         return 0;
96 }
97
98 u32 spl_boot_device(void)
99 {
100         return BOOT_DEVICE_BOOTROM;
101 }