Merge git://git.denx.de/u-boot-imx
[platform/kernel/u-boot.git] / arch / arm / mach-rockchip / rk3399-board-spl.c
1 /*
2  * (C) Copyright 2016 Rockchip Electronics Co., Ltd
3  * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
4  *
5  * SPDX-License-Identifier:     GPL-2.0+
6  */
7
8 #include <common.h>
9 #include <asm/arch/bootrom.h>
10 #include <asm/arch/clock.h>
11 #include <asm/arch/grf_rk3399.h>
12 #include <asm/arch/hardware.h>
13 #include <asm/arch/periph.h>
14 #include <asm/io.h>
15 #include <debug_uart.h>
16 #include <dm.h>
17 #include <dm/pinctrl.h>
18 #include <ram.h>
19 #include <spl.h>
20 #include <syscon.h>
21
22 void board_return_to_bootrom(void)
23 {
24         back_to_bootrom(BROM_BOOT_NEXTSTAGE);
25 }
26
27 static const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
28         [BROM_BOOTSOURCE_EMMC] = "/sdhci@fe330000",
29         [BROM_BOOTSOURCE_SPINOR] = "/spi@ff1d0000",
30         [BROM_BOOTSOURCE_SD] = "/dwmmc@fe320000",
31 };
32
33 const char *board_spl_was_booted_from(void)
34 {
35         u32  bootdevice_brom_id = readl(RK3399_BROM_BOOTSOURCE_ID_ADDR);
36         const char *bootdevice_ofpath = NULL;
37
38         if (bootdevice_brom_id < ARRAY_SIZE(boot_devices))
39                 bootdevice_ofpath = boot_devices[bootdevice_brom_id];
40
41         if (bootdevice_ofpath)
42                 debug("%s: brom_bootdevice_id %x maps to '%s'\n",
43                       __func__, bootdevice_brom_id, bootdevice_ofpath);
44         else
45                 debug("%s: failed to resolve brom_bootdevice_id %x\n",
46                       __func__, bootdevice_brom_id);
47
48         return bootdevice_ofpath;
49 }
50
51 u32 spl_boot_device(void)
52 {
53         u32 boot_device = BOOT_DEVICE_MMC1;
54
55         if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM))
56                 return BOOT_DEVICE_BOOTROM;
57
58         return boot_device;
59 }
60
61 #define TIMER_CHN10_BASE        0xff8680a0
62 #define TIMER_END_COUNT_L       0x00
63 #define TIMER_END_COUNT_H       0x04
64 #define TIMER_INIT_COUNT_L      0x10
65 #define TIMER_INIT_COUNT_H      0x14
66 #define TIMER_CONTROL_REG       0x1c
67
68 #define TIMER_EN        0x1
69 #define TIMER_FMODE     (0 << 1)
70 #define TIMER_RMODE     (1 << 1)
71
72 void secure_timer_init(void)
73 {
74         writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_L);
75         writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_H);
76         writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_L);
77         writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_H);
78         writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG);
79 }
80
81 void board_debug_uart_init(void)
82 {
83 #define GRF_BASE        0xff770000
84         struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
85
86 #if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
87         /* Enable early UART0 on the RK3399 */
88         rk_clrsetreg(&grf->gpio2c_iomux,
89                      GRF_GPIO2C0_SEL_MASK,
90                      GRF_UART0BT_SIN << GRF_GPIO2C0_SEL_SHIFT);
91         rk_clrsetreg(&grf->gpio2c_iomux,
92                      GRF_GPIO2C1_SEL_MASK,
93                      GRF_UART0BT_SOUT << GRF_GPIO2C1_SEL_SHIFT);
94 #else
95         /* Enable early UART2 channel C on the RK3399 */
96         rk_clrsetreg(&grf->gpio4c_iomux,
97                      GRF_GPIO4C3_SEL_MASK,
98                      GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT);
99         rk_clrsetreg(&grf->gpio4c_iomux,
100                      GRF_GPIO4C4_SEL_MASK,
101                      GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT);
102         /* Set channel C as UART2 input */
103         rk_clrsetreg(&grf->soc_con7,
104                      GRF_UART_DBG_SEL_MASK,
105                      GRF_UART_DBG_SEL_C << GRF_UART_DBG_SEL_SHIFT);
106 #endif
107 }
108
109 void board_init_f(ulong dummy)
110 {
111         struct udevice *pinctrl;
112         struct udevice *dev;
113         struct rk3399_pmusgrf_regs *sgrf;
114         struct rk3399_grf_regs *grf;
115         int ret;
116
117 #define EARLY_UART
118 #ifdef EARLY_UART
119         /*
120          * Debug UART can be used from here if required:
121          *
122          * debug_uart_init();
123          * printch('a');
124          * printhex8(0x1234);
125          * printascii("string");
126          */
127         debug_uart_init();
128         printascii("U-Boot SPL board init");
129 #endif
130
131         ret = spl_early_init();
132         if (ret) {
133                 debug("spl_early_init() failed: %d\n", ret);
134                 hang();
135         }
136
137         /*
138          * Disable DDR and SRAM security regions.
139          *
140          * As we are entered from the BootROM, the region from
141          * 0x0 through 0xfffff (i.e. the first MB of memory) will
142          * be protected. This will cause issues with the DW_MMC
143          * driver, which tries to DMA from/to the stack (likely)
144          * located in this range.
145          */
146         sgrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUSGRF);
147         rk_clrsetreg(&sgrf->ddr_rgn_con[16], 0x1ff, 0);
148         rk_clrreg(&sgrf->slv_secure_con4, 0x2000);
149
150         /*  eMMC clock generator: disable the clock multipilier */
151         grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
152         rk_clrreg(&grf->emmccore_con[11], 0x0ff);
153
154         secure_timer_init();
155
156         ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
157         if (ret) {
158                 debug("Pinctrl init failed: %d\n", ret);
159                 return;
160         }
161
162         ret = uclass_get_device(UCLASS_RAM, 0, &dev);
163         if (ret) {
164                 debug("DRAM init failed: %d\n", ret);
165                 return;
166         }
167 }
168
169 #ifdef CONFIG_SPL_LOAD_FIT
170 int board_fit_config_name_match(const char *name)
171 {
172         /* Just empty function now - can't decide what to choose */
173         debug("%s: %s\n", __func__, name);
174
175         return 0;
176 }
177 #endif