arch/arm/mach-rockchip/rk3288-board-spl.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2015 Google, Inc
   4  */
   5
   6 #include <common.h>
   7 #include <debug_uart.h>
   8 #include <dm.h>
   9 #include <fdtdec.h>
  10 #include <i2c.h>
  11 #include <led.h>
  12 #include <malloc.h>
  13 #include <ram.h>
  14 #include <spl.h>
  15 #include <asm/gpio.h>
  16 #include <asm/io.h>
  17 #include <asm/arch-rockchip/bootrom.h>
  18 #include <asm/arch-rockchip/clock.h>
  19 #include <asm/arch-rockchip/hardware.h>
  20 #include <asm/arch-rockchip/periph.h>
  21 #include <asm/arch-rockchip/pmu_rk3288.h>
  22 #include <asm/arch-rockchip/sdram.h>
  23 #include <asm/arch-rockchip/sdram_common.h>
  24 #include <asm/arch-rockchip/sys_proto.h>
  25 #include <asm/arch-rockchip/timer.h>
  26 #include <dm/pinctrl.h>
  27 #include <dm/root.h>
  28 #include <dm/test.h>
  29 #include <dm/util.h>
  30 #include <power/regulator.h>
  31 #include <power/rk8xx_pmic.h>
  32
  33 DECLARE_GLOBAL_DATA_PTR;
  34
  35 u32 spl_boot_device(void)
  36 {
  37 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
  38         const void *blob = gd->fdt_blob;
  39         struct udevice *dev;
  40         const char *bootdev;
  41         int node;
  42         int ret;
  43
  44         bootdev = fdtdec_get_config_string(blob, "u-boot,boot0");
  45         debug("Boot device %s\n", bootdev);
  46         if (!bootdev)
  47                 goto fallback;
  48
  49         node = fdt_path_offset(blob, bootdev);
  50         if (node < 0) {
  51                 debug("node=%d\n", node);
  52                 goto fallback;
  53         }
  54         ret = device_get_global_by_ofnode(offset_to_ofnode(node), &dev);
  55         if (ret) {
  56                 debug("device at node %s/%d not found: %d\n", bootdev, node,
  57                       ret);
  58                 goto fallback;
  59         }
  60         debug("Found device %s\n", dev->name);
  61         switch (device_get_uclass_id(dev)) {
  62         case UCLASS_SPI_FLASH:
  63                 return BOOT_DEVICE_SPI;
  64         case UCLASS_MMC:
  65                 return BOOT_DEVICE_MMC1;
  66         default:
  67                 debug("Booting from device uclass '%s' not supported\n",
  68                       dev_get_uclass_name(dev));
  69         }
  70
  71 fallback:
  72 #elif defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \
  73                 defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \
  74                 defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) || \
  75                 defined(CONFIG_TARGET_CHROMEBOOK_SPEEDY)
  76         return BOOT_DEVICE_SPI;
  77 #endif
  78         return BOOT_DEVICE_MMC1;
  79 }
  80
  81 #if !defined(CONFIG_SPL_OF_PLATDATA)
  82 static int phycore_init(void)
  83 {
  84         struct udevice *pmic;
  85         int ret;
  86
  87         ret = uclass_first_device_err(UCLASS_PMIC, &pmic);
  88         if (ret)
  89                 return ret;
  90
  91 #if defined(CONFIG_SPL_POWER_SUPPORT)
  92         /* Increase USB input current to 2A */
  93         ret = rk818_spl_configure_usb_input_current(pmic, 2000);
  94         if (ret)
  95                 return ret;
  96
  97         /* Close charger when USB lower then 3.26V */
  98         ret = rk818_spl_configure_usb_chrg_shutdown(pmic, 3260000);
  99         if (ret)
 100                 return ret;
 101 #endif
 102
 103         return 0;
 104 }
 105 #endif
 106
 107 void board_init_f(ulong dummy)
 108 {
 109         struct udevice *dev;
 110         int ret;
 111
 112 #ifdef CONFIG_DEBUG_UART
 113         /*
 114          * Debug UART can be used from here if required:
 115          *
 116          * debug_uart_init();
 117          * printch('a');
 118          * printhex8(0x1234);
 119          * printascii("string");
 120          */
 121         debug_uart_init();
 122         debug("\nspl:debug uart enabled in %s\n", __func__);
 123 #endif
 124         ret = spl_early_init();
 125         if (ret) {
 126                 debug("spl_early_init() failed: %d\n", ret);
 127                 hang();
 128         }
 129
 130         rockchip_timer_init();
 131         configure_l2ctlr();
 132
 133         ret = rockchip_get_clk(&dev);
 134         if (ret) {
 135                 debug("CLK init failed: %d\n", ret);
 136                 return;
 137         }
 138
 139 #if !defined(CONFIG_SPL_OF_PLATDATA)
 140         if (of_machine_is_compatible("phytec,rk3288-phycore-som")) {
 141                 ret = phycore_init();
 142                 if (ret) {
 143                         debug("Failed to set up phycore power settings: %d\n",
 144                               ret);
 145                         return;
 146                 }
 147         }
 148 #endif
 149
 150 #if !defined(CONFIG_SUPPORT_TPL)
 151         debug("\nspl:init dram\n");
 152         ret = uclass_get_device(UCLASS_RAM, 0, &dev);
 153         if (ret) {
 154                 debug("DRAM init failed: %d\n", ret);
 155                 return;
 156         }
 157 #endif
 158
 159 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
 160         back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 161 #endif
 162 }
 163
 164 static int setup_led(void)
 165 {
 166 #ifdef CONFIG_SPL_LED
 167         struct udevice *dev;
 168         char *led_name;
 169         int ret;
 170
 171         led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led");
 172         if (!led_name)
 173                 return 0;
 174         ret = led_get_by_label(led_name, &dev);
 175         if (ret) {
 176                 debug("%s: get=%d\n", __func__, ret);
 177                 return ret;
 178         }
 179         ret = led_set_on(dev, 1);
 180         if (ret)
 181                 return ret;
 182 #endif
 183
 184         return 0;
 185 }
 186
 187 void spl_board_init(void)
 188 {
 189         int ret;
 190
 191         ret = setup_led();
 192         if (ret) {
 193                 debug("LED ret=%d\n", ret);
 194                 hang();
 195         }
 196
 197         preloader_console_init();
 198 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
 199         back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 200 #endif
 201         return;
 202 }
 203
 204 #ifdef CONFIG_SPL_OS_BOOT
 205
 206 #define PMU_BASE                0xff730000
 207 int dram_init_banksize(void)
 208 {
 209         struct rk3288_pmu *const pmu = (void *)PMU_BASE;
 210         size_t size = rockchip_sdram_size((phys_addr_t)&pmu->sys_reg[2]);
 211
 212         gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 213         gd->bd->bi_dram[0].size = size;
 214
 215         return 0;
 216 }
 217 #endif