1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2015 Google, Inc
7 #include <debug_uart.h>
17 #include <asm/arch/bootrom.h>
18 #include <asm/arch/clock.h>
19 #include <asm/arch/hardware.h>
20 #include <asm/arch/periph.h>
21 #include <asm/arch/pmu_rk3288.h>
22 #include <asm/arch/sdram.h>
23 #include <asm/arch/sdram_common.h>
24 #include <asm/arch/sys_proto.h>
25 #include <asm/arch/timer.h>
26 #include <dm/pinctrl.h>
30 #include <power/regulator.h>
31 #include <power/rk8xx_pmic.h>
33 DECLARE_GLOBAL_DATA_PTR;
35 u32 spl_boot_device(void)
37 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
38 const void *blob = gd->fdt_blob;
44 bootdev = fdtdec_get_config_string(blob, "u-boot,boot0");
45 debug("Boot device %s\n", bootdev);
49 node = fdt_path_offset(blob, bootdev);
51 debug("node=%d\n", node);
54 ret = device_get_global_by_ofnode(offset_to_ofnode(node), &dev);
56 debug("device at node %s/%d not found: %d\n", bootdev, node,
60 debug("Found device %s\n", dev->name);
61 switch (device_get_uclass_id(dev)) {
62 case UCLASS_SPI_FLASH:
63 return BOOT_DEVICE_SPI;
65 return BOOT_DEVICE_MMC1;
67 debug("Booting from device uclass '%s' not supported\n",
68 dev_get_uclass_name(dev));
72 #elif defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \
73 defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \
74 defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) || \
75 defined(CONFIG_TARGET_CHROMEBOOK_SPEEDY)
76 return BOOT_DEVICE_SPI;
78 return BOOT_DEVICE_MMC1;
81 #if !defined(CONFIG_SPL_OF_PLATDATA)
82 static int phycore_init(void)
87 ret = uclass_first_device_err(UCLASS_PMIC, &pmic);
91 #if defined(CONFIG_SPL_POWER_SUPPORT)
92 /* Increase USB input current to 2A */
93 ret = rk818_spl_configure_usb_input_current(pmic, 2000);
97 /* Close charger when USB lower then 3.26V */
98 ret = rk818_spl_configure_usb_chrg_shutdown(pmic, 3260000);
107 void board_init_f(ulong dummy)
112 /* Example code showing how to enable the debug UART on RK3288 */
113 #include <asm/arch/grf_rk3288.h>
114 /* Enable early UART on the RK3288 */
115 #define GRF_BASE 0xff770000
116 struct rk3288_grf * const grf = (void *)GRF_BASE;
118 rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
119 GPIO7C6_MASK << GPIO7C6_SHIFT,
120 GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
121 GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
123 * Debug UART can be used from here if required:
128 * printascii("string");
131 debug("\nspl:debug uart enabled in %s\n", __func__);
132 ret = spl_early_init();
134 debug("spl_early_init() failed: %d\n", ret);
138 rockchip_timer_init();
141 ret = rockchip_get_clk(&dev);
143 debug("CLK init failed: %d\n", ret);
147 #if !defined(CONFIG_SPL_OF_PLATDATA)
148 if (of_machine_is_compatible("phytec,rk3288-phycore-som")) {
149 ret = phycore_init();
151 debug("Failed to set up phycore power settings: %d\n",
158 #if !defined(CONFIG_SUPPORT_TPL)
159 debug("\nspl:init dram\n");
160 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
162 debug("DRAM init failed: %d\n", ret);
167 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
168 back_to_bootrom(BROM_BOOT_NEXTSTAGE);
172 static int setup_led(void)
174 #ifdef CONFIG_SPL_LED
179 led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led");
182 ret = led_get_by_label(led_name, &dev);
184 debug("%s: get=%d\n", __func__, ret);
187 ret = led_set_on(dev, 1);
195 void spl_board_init(void)
201 debug("LED ret=%d\n", ret);
205 preloader_console_init();
206 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
207 back_to_bootrom(BROM_BOOT_NEXTSTAGE);
212 #ifdef CONFIG_SPL_OS_BOOT
214 #define PMU_BASE 0xff730000
215 int dram_init_banksize(void)
217 struct rk3288_pmu *const pmu = (void *)PMU_BASE;
218 size_t size = rockchip_sdram_size((phys_addr_t)&pmu->sys_reg[2]);
220 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
221 gd->bd->bi_dram[0].size = size;