arch/arm/mach-rockchip/rk3288-board-spl.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2015 Google, Inc
   4  */
   5
   6 #include <common.h>
   7 #include <debug_uart.h>
   8 #include <dm.h>
   9 #include <fdtdec.h>
  10 #include <i2c.h>
  11 #include <led.h>
  12 #include <malloc.h>
  13 #include <ram.h>
  14 #include <spl.h>
  15 #include <asm/gpio.h>
  16 #include <asm/io.h>
  17 #include <asm/arch-rockchip/bootrom.h>
  18 #include <asm/arch-rockchip/clock.h>
  19 #include <asm/arch-rockchip/hardware.h>
  20 #include <asm/arch-rockchip/periph.h>
  21 #include <asm/arch-rockchip/pmu_rk3288.h>
  22 #include <asm/arch-rockchip/sdram.h>
  23 #include <asm/arch-rockchip/sdram_common.h>
  24 #include <asm/arch-rockchip/sys_proto.h>
  25 #include <asm/arch-rockchip/timer.h>
  26 #include <dm/root.h>
  27 #include <dm/test.h>
  28 #include <dm/util.h>
  29 #include <power/regulator.h>
  30 #include <power/rk8xx_pmic.h>
  31
  32 DECLARE_GLOBAL_DATA_PTR;
  33
  34 u32 spl_boot_device(void)
  35 {
  36 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
  37         const void *blob = gd->fdt_blob;
  38         struct udevice *dev;
  39         const char *bootdev;
  40         int node;
  41         int ret;
  42
  43         bootdev = fdtdec_get_config_string(blob, "u-boot,boot0");
  44         debug("Boot device %s\n", bootdev);
  45         if (!bootdev)
  46                 goto fallback;
  47
  48         node = fdt_path_offset(blob, bootdev);
  49         if (node < 0) {
  50                 debug("node=%d\n", node);
  51                 goto fallback;
  52         }
  53         ret = device_get_global_by_ofnode(offset_to_ofnode(node), &dev);
  54         if (ret) {
  55                 debug("device at node %s/%d not found: %d\n", bootdev, node,
  56                       ret);
  57                 goto fallback;
  58         }
  59         debug("Found device %s\n", dev->name);
  60         switch (device_get_uclass_id(dev)) {
  61         case UCLASS_SPI_FLASH:
  62                 return BOOT_DEVICE_SPI;
  63         case UCLASS_MMC:
  64                 return BOOT_DEVICE_MMC1;
  65         default:
  66                 debug("Booting from device uclass '%s' not supported\n",
  67                       dev_get_uclass_name(dev));
  68         }
  69
  70 fallback:
  71 #elif defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \
  72                 defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \
  73                 defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) || \
  74                 defined(CONFIG_TARGET_CHROMEBOOK_SPEEDY)
  75         return BOOT_DEVICE_SPI;
  76 #endif
  77         return BOOT_DEVICE_MMC1;
  78 }
  79
  80 #if !defined(CONFIG_SPL_OF_PLATDATA)
  81 static int phycore_init(void)
  82 {
  83         struct udevice *pmic;
  84         int ret;
  85
  86         ret = uclass_first_device_err(UCLASS_PMIC, &pmic);
  87         if (ret)
  88                 return ret;
  89
  90 #if defined(CONFIG_SPL_POWER_SUPPORT)
  91         /* Increase USB input current to 2A */
  92         ret = rk818_spl_configure_usb_input_current(pmic, 2000);
  93         if (ret)
  94                 return ret;
  95
  96         /* Close charger when USB lower then 3.26V */
  97         ret = rk818_spl_configure_usb_chrg_shutdown(pmic, 3260000);
  98         if (ret)
  99                 return ret;
 100 #endif
 101
 102         return 0;
 103 }
 104 #endif
 105
 106 __weak int arch_cpu_init(void)
 107 {
 108         return 0;
 109 }
 110
 111 void board_init_f(ulong dummy)
 112 {
 113         struct udevice *dev;
 114         int ret;
 115
 116 #ifdef CONFIG_DEBUG_UART
 117         /*
 118          * Debug UART can be used from here if required:
 119          *
 120          * debug_uart_init();
 121          * printch('a');
 122          * printhex8(0x1234);
 123          * printascii("string");
 124          */
 125         debug_uart_init();
 126         debug("\nspl:debug uart enabled in %s\n", __func__);
 127 #endif
 128         ret = spl_early_init();
 129         if (ret) {
 130                 debug("spl_early_init() failed: %d\n", ret);
 131                 hang();
 132         }
 133
 134         rockchip_timer_init();
 135         arch_cpu_init();
 136
 137         ret = rockchip_get_clk(&dev);
 138         if (ret) {
 139                 debug("CLK init failed: %d\n", ret);
 140                 return;
 141         }
 142
 143 #if !defined(CONFIG_SPL_OF_PLATDATA)
 144         if (of_machine_is_compatible("phytec,rk3288-phycore-som")) {
 145                 ret = phycore_init();
 146                 if (ret) {
 147                         debug("Failed to set up phycore power settings: %d\n",
 148                               ret);
 149                         return;
 150                 }
 151         }
 152 #endif
 153
 154 #if !defined(CONFIG_SUPPORT_TPL)
 155         debug("\nspl:init dram\n");
 156         ret = uclass_get_device(UCLASS_RAM, 0, &dev);
 157         if (ret) {
 158                 debug("DRAM init failed: %d\n", ret);
 159                 return;
 160         }
 161 #endif
 162
 163 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
 164         back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 165 #endif
 166 }
 167
 168 static int setup_led(void)
 169 {
 170 #ifdef CONFIG_SPL_LED
 171         struct udevice *dev;
 172         char *led_name;
 173         int ret;
 174
 175         led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led");
 176         if (!led_name)
 177                 return 0;
 178         ret = led_get_by_label(led_name, &dev);
 179         if (ret) {
 180                 debug("%s: get=%d\n", __func__, ret);
 181                 return ret;
 182         }
 183         ret = led_set_on(dev, 1);
 184         if (ret)
 185                 return ret;
 186 #endif
 187
 188         return 0;
 189 }
 190
 191 void spl_board_init(void)
 192 {
 193         int ret;
 194
 195         ret = setup_led();
 196         if (ret) {
 197                 debug("LED ret=%d\n", ret);
 198                 hang();
 199         }
 200
 201         preloader_console_init();
 202 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
 203         back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 204 #endif
 205         return;
 206 }
 207
 208 #ifdef CONFIG_SPL_OS_BOOT
 209
 210 #define PMU_BASE                0xff730000
 211 int dram_init_banksize(void)
 212 {
 213         struct rk3288_pmu *const pmu = (void *)PMU_BASE;
 214         size_t size = rockchip_sdram_size((phys_addr_t)&pmu->sys_reg[2]);
 215
 216         gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 217         gd->bd->bi_dram[0].size = size;
 218
 219         return 0;
 220 }
 221 #endif