1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2015 Google, Inc
8 #include <debug_uart.h>
17 #include <asm/arch/bootrom.h>
18 #include <asm/arch/clock.h>
19 #include <asm/arch/grf_rk3188.h>
20 #include <asm/arch/hardware.h>
21 #include <asm/arch/periph.h>
22 #include <asm/arch/pmu_rk3188.h>
23 #include <asm/arch/sdram.h>
24 #include <asm/arch/timer.h>
25 #include <dm/pinctrl.h>
29 #include <power/regulator.h>
32 DECLARE_GLOBAL_DATA_PTR;
34 u32 spl_boot_device(void)
36 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
37 const void *blob = gd->fdt_blob;
43 bootdev = fdtdec_get_config_string(blob, "u-boot,boot0");
44 debug("Boot device %s\n", bootdev);
48 node = fdt_path_offset(blob, bootdev);
50 debug("node=%d\n", node);
53 ret = device_get_global_by_ofnode(offset_to_ofnode(node), &dev);
55 debug("device at node %s/%d not found: %d\n", bootdev, node,
59 debug("Found device %s\n", dev->name);
60 switch (device_get_uclass_id(dev)) {
61 case UCLASS_SPI_FLASH:
62 return BOOT_DEVICE_SPI;
64 return BOOT_DEVICE_MMC1;
66 debug("Booting from device uclass '%s' not supported\n",
67 dev_get_uclass_name(dev));
72 return BOOT_DEVICE_MMC1;
75 static int setup_arm_clock(void)
81 ret = rockchip_get_clk(&dev);
86 ret = clk_request(dev, &clk);
90 ret = clk_set_rate(&clk, 600000000);
96 #define GRF_BASE 0x20008000
98 void board_init_f(ulong dummy)
100 __maybe_unused struct rk3188_grf * const grf = (void *)GRF_BASE;
101 struct udevice *pinctrl, *dev;
104 /* Example code showing how to enable the debug UART on RK3188 */
109 GPIO1B1_UART2_SOUT = 1,
113 GPIO1B0_UART2_SIN = 1,
116 /* Enable early UART on the RK3188 */
117 rk_clrsetreg(&grf->gpio1b_iomux,
118 GPIO1B1_MASK << GPIO1B1_SHIFT |
119 GPIO1B0_MASK << GPIO1B0_SHIFT,
120 GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
121 GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
123 * Debug UART can be used from here if required:
128 * printascii("string");
137 #ifdef CONFIG_ROCKCHIP_USB_UART
138 rk_clrsetreg(&grf->uoc0_con[0],
139 SIDDQ_MASK | UOC_DISABLE_MASK | COMMON_ON_N_MASK,
140 1 << SIDDQ_SHIFT | 1 << UOC_DISABLE_SHIFT |
141 1 << COMMON_ON_N_SHIFT);
142 rk_clrsetreg(&grf->uoc0_con[2],
143 SOFT_CON_SEL_MASK, 1 << SOFT_CON_SEL_SHIFT);
144 rk_clrsetreg(&grf->uoc0_con[3],
145 OPMODE_MASK | XCVRSELECT_MASK |
146 TERMSEL_FULLSPEED_MASK | SUSPENDN_MASK,
147 OPMODE_NODRIVING << OPMODE_SHIFT |
148 XCVRSELECT_FSTRANSC << XCVRSELECT_SHIFT |
149 1 << TERMSEL_FULLSPEED_SHIFT |
150 1 << SUSPENDN_SHIFT);
151 rk_clrsetreg(&grf->uoc0_con[0],
152 BYPASSSEL_MASK | BYPASSDMEN_MASK,
153 1 << BYPASSSEL_SHIFT | 1 << BYPASSDMEN_SHIFT);
156 ret = spl_early_init();
158 debug("spl_early_init() failed: %d\n", ret);
162 ret = rockchip_get_clk(&dev);
164 debug("CLK init failed: %d\n", ret);
168 ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
170 debug("Pinctrl init failed: %d\n", ret);
174 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
176 debug("DRAM init failed: %d\n", ret);
181 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
182 back_to_bootrom(BROM_BOOT_NEXTSTAGE);
186 static int setup_led(void)
188 #ifdef CONFIG_SPL_LED
193 led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led");
196 ret = led_get_by_label(led_name, &dev);
198 debug("%s: get=%d\n", __func__, ret);
201 ret = led_set_on(dev, 1);
209 void spl_board_init(void)
211 struct udevice *pinctrl;
216 debug("LED ret=%d\n", ret);
220 ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
222 debug("%s: Cannot find pinctrl device\n", __func__);
226 #ifdef CONFIG_SPL_MMC_SUPPORT
227 ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
229 debug("%s: Failed to set up SD card\n", __func__);
234 /* Enable debug UART */
235 ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
237 debug("%s: Failed to set up console UART\n", __func__);
241 preloader_console_init();
242 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
243 back_to_bootrom(BROM_BOOT_NEXTSTAGE);
248 printf("spl_board_init: Error %d\n", ret);
250 /* No way to report error here */