4 bool "Support Rockchip RK3036"
8 imply USB_FUNCTION_ROCKUSB
10 imply ROCKCHIP_COMMON_BOARD
12 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
13 including NEON and GPU, Mali-400 graphics, several DDR3 options
14 and video codec support. Peripherals include Gigabit Ethernet,
15 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
17 config ROCKCHIP_RK3128
18 bool "Support Rockchip RK3128"
20 imply ROCKCHIP_COMMON_BOARD
22 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
23 including NEON and GPU, Mali-400 graphics, several DDR3 options
24 and video codec support. Peripherals include Gigabit Ethernet,
25 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
27 config ROCKCHIP_RK3188
28 bool "Support Rockchip RK3188"
30 select SPL_BOARD_INIT if SPL
37 select SPL_DRIVERS_MISC_SUPPORT
38 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
39 select SPL_ROCKCHIP_BACK_TO_BROM
40 select BOARD_LATE_INIT
41 imply SPL_ROCKCHIP_COMMON_BOARD
43 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
44 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
45 video interfaces, several memory options and video codec support.
46 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
47 UART, SPI, I2C and PWMs.
49 config ROCKCHIP_RK322X
50 bool "Support Rockchip RK3228/RK3229"
60 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
61 select TPL_NEEDS_SEPARATE_STACK if TPL
62 select SPL_DRIVERS_MISC_SUPPORT
63 imply ROCKCHIP_COMMON_BOARD
64 imply SPL_SERIAL_SUPPORT
65 imply SPL_ROCKCHIP_COMMON_BOARD
66 imply TPL_SERIAL_SUPPORT
67 imply TPL_ROCKCHIP_COMMON_BOARD
68 select TPL_LIBCOMMON_SUPPORT
69 select TPL_LIBGENERIC_SUPPORT
71 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
72 including NEON and GPU, Mali-400 graphics, several DDR3 options
73 and video codec support. Peripherals include Gigabit Ethernet,
74 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
76 config ROCKCHIP_RK3288
77 bool "Support Rockchip RK3288"
82 imply SPL_ROCKCHIP_COMMON_BOARD
85 imply TPL_DRIVERS_MISC_SUPPORT
86 imply TPL_LIBCOMMON_SUPPORT
87 imply TPL_LIBGENERIC_SUPPORT
88 imply TPL_NEEDS_SEPARATE_TEXT_BASE
89 imply TPL_NEEDS_SEPARATE_STACK
94 imply TPL_ROCKCHIP_COMMON_BOARD
95 imply TPL_SERIAL_SUPPORT
97 imply USB_FUNCTION_ROCKUSB
100 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
101 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
102 video interfaces supporting HDMI and eDP, several DDR3 options
103 and video codec support. Peripherals include Gigabit Ethernet,
104 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
106 config ROCKCHIP_RK3328
107 bool "Support Rockchip RK3328"
111 imply SPL_ROCKCHIP_COMMON_BOARD
112 imply SPL_SERIAL_SUPPORT
113 imply SPL_SEPARATE_BSS
114 select ENABLE_ARM_SOC_BOOT0_HOOK
115 select DEBUG_UART_BOARD_INIT
118 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
119 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
120 video interfaces supporting HDMI and eDP, several DDR3 options
121 and video codec support. Peripherals include Gigabit Ethernet,
122 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
124 config ROCKCHIP_RK3368
125 bool "Support Rockchip RK3368"
129 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
130 select TPL_NEEDS_SEPARATE_STACK if TPL
131 imply SPL_ROCKCHIP_COMMON_BOARD
132 imply SPL_SEPARATE_BSS
133 imply SPL_SERIAL_SUPPORT
134 imply TPL_SERIAL_SUPPORT
135 imply TPL_ROCKCHIP_COMMON_BOARD
137 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
138 into a big and little cluster with 4 cores each) Cortex-A53 including
139 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
140 (for the little cluster), PowerVR G6110 based graphics, one video
141 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
144 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
145 I2S, UARTs, SPI, I2C and PWMs.
147 config ROCKCHIP_RK3399
148 bool "Support Rockchip RK3399"
154 select SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
155 select SPL_BOARD_INIT if SPL
157 select SPL_CLK if SPL
158 select SPL_PINCTRL if SPL
159 select SPL_RAM if SPL
160 select SPL_REGMAP if SPL
161 select SPL_SYSCON if SPL
162 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
163 select TPL_NEEDS_SEPARATE_STACK if TPL
164 select SPL_SEPARATE_BSS
165 select SPL_SERIAL_SUPPORT
166 select SPL_DRIVERS_MISC_SUPPORT
174 select DM_REGULATOR_FIXED
175 select BOARD_LATE_INIT
176 imply SPL_ROCKCHIP_COMMON_BOARD
177 imply TPL_SERIAL_SUPPORT
178 imply TPL_LIBCOMMON_SUPPORT
179 imply TPL_LIBGENERIC_SUPPORT
180 imply TPL_SYS_MALLOC_SIMPLE
181 imply TPL_DRIVERS_MISC_SUPPORT
188 imply TPL_TINY_MEMSET
189 imply TPL_ROCKCHIP_COMMON_BOARD
191 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
192 and quad-core Cortex-A53.
193 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
194 video interfaces supporting HDMI and eDP, several DDR3 options
195 and video codec support. Peripherals include Gigabit Ethernet,
196 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
198 config ROCKCHIP_RV1108
199 bool "Support Rockchip RV1108"
202 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
205 config ROCKCHIP_USB_UART
206 bool "Route uart output to usb pins"
208 Rockchip SoCs have the ability to route the signals of the debug
209 uart through the d+ and d- pins of a specific usb phy to enable
210 some form of closed-case debugging. With this option supported
211 SoCs will enable this routing as a debug measure.
213 config SPL_ROCKCHIP_BACK_TO_BROM
214 bool "SPL returns to bootrom"
215 default y if ROCKCHIP_RK3036
216 select ROCKCHIP_BROM_HELPER
217 select SPL_BOOTROM_SUPPORT
220 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
221 SPL will return to the boot rom, which will then load the U-Boot
222 binary to keep going on.
224 config TPL_ROCKCHIP_BACK_TO_BROM
225 bool "TPL returns to bootrom"
227 select ROCKCHIP_BROM_HELPER
228 select TPL_BOOTROM_SUPPORT
231 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
232 SPL will return to the boot rom, which will then load the U-Boot
233 binary to keep going on.
235 config ROCKCHIP_COMMON_BOARD
236 bool "Rockchip common board file"
238 Rockchip SoCs have similar boot process, Common board file is mainly
239 in charge of common process of board_init() and board_late_init() for
242 config SPL_ROCKCHIP_COMMON_BOARD
243 bool "Rockchip SPL common board file"
246 Rockchip SoCs have similar boot process, SPL is mainly in charge of
247 load and boot Trust ATF/U-Boot firmware, and DRAM init if there is
248 no TPL for the board.
250 config TPL_ROCKCHIP_COMMON_BOARD
254 Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
255 init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
256 common board is a basic TPL board init which can be shared for most
257 of SoCs to avoid copy-pase for different SoCs.
259 config ROCKCHIP_BOOT_MODE_REG
260 hex "Rockchip boot mode flag register address"
262 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
263 according to the value from this register.
265 config ROCKCHIP_SPL_RESERVE_IRAM
266 hex "Size of IRAM reserved in SPL"
269 SPL may need reserve memory for firmware loaded by SPL, whose load
270 address is in IRAM and may overlay with SPL text area if not
273 config ROCKCHIP_BROM_HELPER
276 config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
277 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
278 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
280 Some Rockchip BROM variants (e.g. on the RK3188) load the
281 first stage in segments and enter multiple times. E.g. on
282 the RK3188, the first 1KB of the first stage are loaded
283 first and entered; after returning to the BROM, the
284 remainder of the first stage is loaded, but the BROM
285 re-enters at the same address/to the same code as previously.
287 This enables support code in the BOOT0 hook for the SPL stage
288 to allow multiple entries.
290 config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
291 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
292 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
294 Some Rockchip BROM variants (e.g. on the RK3188) load the
295 first stage in segments and enter multiple times. E.g. on
296 the RK3188, the first 1KB of the first stage are loaded
297 first and entered; after returning to the BROM, the
298 remainder of the first stage is loaded, but the BROM
299 re-enters at the same address/to the same code as previously.
301 This enables support code in the BOOT0 hook for the TPL stage
302 to allow multiple entries.
304 config SPL_MMC_SUPPORT
305 default y if !SPL_ROCKCHIP_BACK_TO_BROM
307 source "arch/arm/mach-rockchip/rk3036/Kconfig"
308 source "arch/arm/mach-rockchip/rk3128/Kconfig"
309 source "arch/arm/mach-rockchip/rk3188/Kconfig"
310 source "arch/arm/mach-rockchip/rk322x/Kconfig"
311 source "arch/arm/mach-rockchip/rk3288/Kconfig"
312 source "arch/arm/mach-rockchip/rk3328/Kconfig"
313 source "arch/arm/mach-rockchip/rk3368/Kconfig"
314 source "arch/arm/mach-rockchip/rk3399/Kconfig"
315 source "arch/arm/mach-rockchip/rv1108/Kconfig"