4 bool "Support Rockchip RK3036"
8 imply USB_FUNCTION_ROCKUSB
10 imply ROCKCHIP_COMMON_BOARD
12 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
13 including NEON and GPU, Mali-400 graphics, several DDR3 options
14 and video codec support. Peripherals include Gigabit Ethernet,
15 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
17 config ROCKCHIP_RK3128
18 bool "Support Rockchip RK3128"
21 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
22 including NEON and GPU, Mali-400 graphics, several DDR3 options
23 and video codec support. Peripherals include Gigabit Ethernet,
24 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
26 config ROCKCHIP_RK3188
27 bool "Support Rockchip RK3188"
29 select SPL_BOARD_INIT if SPL
36 select SPL_DRIVERS_MISC_SUPPORT
37 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
38 select SPL_ROCKCHIP_BACK_TO_BROM
39 select BOARD_LATE_INIT
40 imply SPL_ROCKCHIP_COMMON_BOARD
42 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
43 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
44 video interfaces, several memory options and video codec support.
45 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
46 UART, SPI, I2C and PWMs.
48 config ROCKCHIP_RK322X
49 bool "Support Rockchip RK3228/RK3229"
59 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
60 select TPL_NEEDS_SEPARATE_STACK if TPL
61 select SPL_DRIVERS_MISC_SUPPORT
62 imply SPL_SERIAL_SUPPORT
63 imply SPL_ROCKCHIP_COMMON_BOARD
64 imply TPL_SERIAL_SUPPORT
65 imply TPL_ROCKCHIP_COMMON_BOARD
66 select TPL_LIBCOMMON_SUPPORT
67 select TPL_LIBGENERIC_SUPPORT
69 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
70 including NEON and GPU, Mali-400 graphics, several DDR3 options
71 and video codec support. Peripherals include Gigabit Ethernet,
72 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
74 config ROCKCHIP_RK3288
75 bool "Support Rockchip RK3288"
80 imply SPL_ROCKCHIP_COMMON_BOARD
83 imply TPL_DRIVERS_MISC_SUPPORT
84 imply TPL_LIBCOMMON_SUPPORT
85 imply TPL_LIBGENERIC_SUPPORT
86 imply TPL_NEEDS_SEPARATE_TEXT_BASE
87 imply TPL_NEEDS_SEPARATE_STACK
92 imply TPL_ROCKCHIP_COMMON_BOARD
93 imply TPL_SERIAL_SUPPORT
95 imply USB_FUNCTION_ROCKUSB
98 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
99 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
100 video interfaces supporting HDMI and eDP, several DDR3 options
101 and video codec support. Peripherals include Gigabit Ethernet,
102 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
104 config ROCKCHIP_RK3328
105 bool "Support Rockchip RK3328"
109 imply SPL_ROCKCHIP_COMMON_BOARD
110 imply SPL_SERIAL_SUPPORT
111 imply SPL_SEPARATE_BSS
112 select ENABLE_ARM_SOC_BOOT0_HOOK
113 select DEBUG_UART_BOARD_INIT
116 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
117 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
118 video interfaces supporting HDMI and eDP, several DDR3 options
119 and video codec support. Peripherals include Gigabit Ethernet,
120 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
122 config ROCKCHIP_RK3368
123 bool "Support Rockchip RK3368"
127 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
128 select TPL_NEEDS_SEPARATE_STACK if TPL
129 imply SPL_ROCKCHIP_COMMON_BOARD
130 imply SPL_SEPARATE_BSS
131 imply SPL_SERIAL_SUPPORT
132 imply TPL_SERIAL_SUPPORT
133 imply TPL_ROCKCHIP_COMMON_BOARD
135 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
136 into a big and little cluster with 4 cores each) Cortex-A53 including
137 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
138 (for the little cluster), PowerVR G6110 based graphics, one video
139 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
142 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
143 I2S, UARTs, SPI, I2C and PWMs.
145 config ROCKCHIP_RK3399
146 bool "Support Rockchip RK3399"
152 select SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
153 select SPL_BOARD_INIT if SPL
155 select SPL_CLK if SPL
156 select SPL_PINCTRL if SPL
157 select SPL_RAM if SPL
158 select SPL_REGMAP if SPL
159 select SPL_SYSCON if SPL
160 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
161 select TPL_NEEDS_SEPARATE_STACK if TPL
162 select SPL_SEPARATE_BSS
163 select SPL_SERIAL_SUPPORT
164 select SPL_DRIVERS_MISC_SUPPORT
172 select DM_REGULATOR_FIXED
173 select BOARD_LATE_INIT
174 imply SPL_ROCKCHIP_COMMON_BOARD
175 imply TPL_SERIAL_SUPPORT
176 imply TPL_LIBCOMMON_SUPPORT
177 imply TPL_LIBGENERIC_SUPPORT
178 imply TPL_SYS_MALLOC_SIMPLE
179 imply TPL_DRIVERS_MISC_SUPPORT
186 imply TPL_TINY_MEMSET
187 imply TPL_ROCKCHIP_COMMON_BOARD
189 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
190 and quad-core Cortex-A53.
191 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
192 video interfaces supporting HDMI and eDP, several DDR3 options
193 and video codec support. Peripherals include Gigabit Ethernet,
194 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
196 config ROCKCHIP_RV1108
197 bool "Support Rockchip RV1108"
200 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
203 config ROCKCHIP_USB_UART
204 bool "Route uart output to usb pins"
206 Rockchip SoCs have the ability to route the signals of the debug
207 uart through the d+ and d- pins of a specific usb phy to enable
208 some form of closed-case debugging. With this option supported
209 SoCs will enable this routing as a debug measure.
211 config SPL_ROCKCHIP_BACK_TO_BROM
212 bool "SPL returns to bootrom"
213 default y if ROCKCHIP_RK3036
214 select ROCKCHIP_BROM_HELPER
215 select SPL_BOOTROM_SUPPORT
218 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
219 SPL will return to the boot rom, which will then load the U-Boot
220 binary to keep going on.
222 config TPL_ROCKCHIP_BACK_TO_BROM
223 bool "TPL returns to bootrom"
225 select ROCKCHIP_BROM_HELPER
226 select TPL_BOOTROM_SUPPORT
229 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
230 SPL will return to the boot rom, which will then load the U-Boot
231 binary to keep going on.
233 config ROCKCHIP_COMMON_BOARD
234 bool "Rockchip common board file"
236 Rockchip SoCs have similar boot process, Common board file is mainly
237 in charge of common process of board_init() and board_late_init() for
240 config SPL_ROCKCHIP_COMMON_BOARD
241 bool "Rockchip SPL common board file"
244 Rockchip SoCs have similar boot process, SPL is mainly in charge of
245 load and boot Trust ATF/U-Boot firmware, and DRAM init if there is
246 no TPL for the board.
248 config TPL_ROCKCHIP_COMMON_BOARD
252 Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
253 init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
254 common board is a basic TPL board init which can be shared for most
255 of SoCs to avoid copy-pase for different SoCs.
257 config ROCKCHIP_BOOT_MODE_REG
258 hex "Rockchip boot mode flag register address"
260 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
261 according to the value from this register.
263 config ROCKCHIP_SPL_RESERVE_IRAM
264 hex "Size of IRAM reserved in SPL"
267 SPL may need reserve memory for firmware loaded by SPL, whose load
268 address is in IRAM and may overlay with SPL text area if not
271 config ROCKCHIP_BROM_HELPER
274 config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
275 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
276 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
278 Some Rockchip BROM variants (e.g. on the RK3188) load the
279 first stage in segments and enter multiple times. E.g. on
280 the RK3188, the first 1KB of the first stage are loaded
281 first and entered; after returning to the BROM, the
282 remainder of the first stage is loaded, but the BROM
283 re-enters at the same address/to the same code as previously.
285 This enables support code in the BOOT0 hook for the SPL stage
286 to allow multiple entries.
288 config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
289 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
290 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
292 Some Rockchip BROM variants (e.g. on the RK3188) load the
293 first stage in segments and enter multiple times. E.g. on
294 the RK3188, the first 1KB of the first stage are loaded
295 first and entered; after returning to the BROM, the
296 remainder of the first stage is loaded, but the BROM
297 re-enters at the same address/to the same code as previously.
299 This enables support code in the BOOT0 hook for the TPL stage
300 to allow multiple entries.
302 config SPL_MMC_SUPPORT
303 default y if !SPL_ROCKCHIP_BACK_TO_BROM
305 source "arch/arm/mach-rockchip/rk3036/Kconfig"
306 source "arch/arm/mach-rockchip/rk3128/Kconfig"
307 source "arch/arm/mach-rockchip/rk3188/Kconfig"
308 source "arch/arm/mach-rockchip/rk322x/Kconfig"
309 source "arch/arm/mach-rockchip/rk3288/Kconfig"
310 source "arch/arm/mach-rockchip/rk3328/Kconfig"
311 source "arch/arm/mach-rockchip/rk3368/Kconfig"
312 source "arch/arm/mach-rockchip/rk3399/Kconfig"
313 source "arch/arm/mach-rockchip/rv1108/Kconfig"