4 bool "Support Rockchip RK3036"
8 imply USB_FUNCTION_ROCKUSB
11 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
12 including NEON and GPU, Mali-400 graphics, several DDR3 options
13 and video codec support. Peripherals include Gigabit Ethernet,
14 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
16 config ROCKCHIP_RK3128
17 bool "Support Rockchip RK3128"
20 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
21 including NEON and GPU, Mali-400 graphics, several DDR3 options
22 and video codec support. Peripherals include Gigabit Ethernet,
23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
25 config ROCKCHIP_RK3188
26 bool "Support Rockchip RK3188"
28 select SPL_BOARD_INIT if SPL
35 select SPL_DRIVERS_MISC_SUPPORT
36 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
37 select SPL_ROCKCHIP_BACK_TO_BROM
38 select BOARD_LATE_INIT
39 imply SPL_ROCKCHIP_COMMON_BOARD
41 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
42 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
43 video interfaces, several memory options and video codec support.
44 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
45 UART, SPI, I2C and PWMs.
47 config ROCKCHIP_RK322X
48 bool "Support Rockchip RK3228/RK3229"
58 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
59 select TPL_NEEDS_SEPARATE_STACK if TPL
60 select SPL_DRIVERS_MISC_SUPPORT
61 imply SPL_SERIAL_SUPPORT
62 imply SPL_ROCKCHIP_COMMON_BOARD
63 imply TPL_SERIAL_SUPPORT
64 imply TPL_ROCKCHIP_COMMON_BOARD
65 select TPL_LIBCOMMON_SUPPORT
66 select TPL_LIBGENERIC_SUPPORT
68 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
69 including NEON and GPU, Mali-400 graphics, several DDR3 options
70 and video codec support. Peripherals include Gigabit Ethernet,
71 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
73 config ROCKCHIP_RK3288
74 bool "Support Rockchip RK3288"
79 imply SPL_ROCKCHIP_COMMON_BOARD
82 imply TPL_DRIVERS_MISC_SUPPORT
83 imply TPL_LIBCOMMON_SUPPORT
84 imply TPL_LIBGENERIC_SUPPORT
85 imply TPL_NEEDS_SEPARATE_TEXT_BASE
86 imply TPL_NEEDS_SEPARATE_STACK
91 imply TPL_ROCKCHIP_COMMON_BOARD
92 imply TPL_SERIAL_SUPPORT
94 imply USB_FUNCTION_ROCKUSB
97 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
98 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
99 video interfaces supporting HDMI and eDP, several DDR3 options
100 and video codec support. Peripherals include Gigabit Ethernet,
101 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
103 config ROCKCHIP_RK3328
104 bool "Support Rockchip RK3328"
108 imply SPL_ROCKCHIP_COMMON_BOARD
109 imply SPL_SERIAL_SUPPORT
110 imply SPL_SEPARATE_BSS
111 select ENABLE_ARM_SOC_BOOT0_HOOK
112 select DEBUG_UART_BOARD_INIT
115 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
116 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
117 video interfaces supporting HDMI and eDP, several DDR3 options
118 and video codec support. Peripherals include Gigabit Ethernet,
119 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
121 config ROCKCHIP_RK3368
122 bool "Support Rockchip RK3368"
126 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
127 select TPL_NEEDS_SEPARATE_STACK if TPL
128 imply SPL_ROCKCHIP_COMMON_BOARD
129 imply SPL_SEPARATE_BSS
130 imply SPL_SERIAL_SUPPORT
131 imply TPL_SERIAL_SUPPORT
132 imply TPL_ROCKCHIP_COMMON_BOARD
134 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
135 into a big and little cluster with 4 cores each) Cortex-A53 including
136 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
137 (for the little cluster), PowerVR G6110 based graphics, one video
138 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
141 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
142 I2S, UARTs, SPI, I2C and PWMs.
144 config ROCKCHIP_RK3399
145 bool "Support Rockchip RK3399"
151 select SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
152 select SPL_BOARD_INIT if SPL
154 select SPL_CLK if SPL
155 select SPL_PINCTRL if SPL
156 select SPL_RAM if SPL
157 select SPL_REGMAP if SPL
158 select SPL_SYSCON if SPL
159 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
160 select TPL_NEEDS_SEPARATE_STACK if TPL
161 select SPL_SEPARATE_BSS
162 select SPL_SERIAL_SUPPORT
163 select SPL_DRIVERS_MISC_SUPPORT
171 select DM_REGULATOR_FIXED
172 select BOARD_LATE_INIT
173 imply TPL_SERIAL_SUPPORT
174 imply TPL_LIBCOMMON_SUPPORT
175 imply TPL_LIBGENERIC_SUPPORT
176 imply TPL_SYS_MALLOC_SIMPLE
177 imply TPL_DRIVERS_MISC_SUPPORT
184 imply TPL_TINY_MEMSET
185 imply TPL_ROCKCHIP_COMMON_BOARD
187 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
188 and quad-core Cortex-A53.
189 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
190 video interfaces supporting HDMI and eDP, several DDR3 options
191 and video codec support. Peripherals include Gigabit Ethernet,
192 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
194 config ROCKCHIP_RV1108
195 bool "Support Rockchip RV1108"
198 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
201 config ROCKCHIP_USB_UART
202 bool "Route uart output to usb pins"
204 Rockchip SoCs have the ability to route the signals of the debug
205 uart through the d+ and d- pins of a specific usb phy to enable
206 some form of closed-case debugging. With this option supported
207 SoCs will enable this routing as a debug measure.
209 config SPL_ROCKCHIP_BACK_TO_BROM
210 bool "SPL returns to bootrom"
211 default y if ROCKCHIP_RK3036
212 select ROCKCHIP_BROM_HELPER
213 select SPL_BOOTROM_SUPPORT
216 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
217 SPL will return to the boot rom, which will then load the U-Boot
218 binary to keep going on.
220 config TPL_ROCKCHIP_BACK_TO_BROM
221 bool "TPL returns to bootrom"
223 select ROCKCHIP_BROM_HELPER
224 select TPL_BOOTROM_SUPPORT
227 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
228 SPL will return to the boot rom, which will then load the U-Boot
229 binary to keep going on.
231 config SPL_ROCKCHIP_COMMON_BOARD
232 bool "Rockchip SPL common board file"
235 Rockchip SoCs have similar boot process, SPL is mainly in charge of
236 load and boot Trust ATF/U-Boot firmware, and DRAM init if there is
237 no TPL for the board.
239 config TPL_ROCKCHIP_COMMON_BOARD
243 Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
244 init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
245 common board is a basic TPL board init which can be shared for most
246 of SoCs to avoid copy-pase for different SoCs.
248 config ROCKCHIP_BOOT_MODE_REG
249 hex "Rockchip boot mode flag register address"
251 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
252 according to the value from this register.
254 config ROCKCHIP_SPL_RESERVE_IRAM
255 hex "Size of IRAM reserved in SPL"
258 SPL may need reserve memory for firmware loaded by SPL, whose load
259 address is in IRAM and may overlay with SPL text area if not
262 config ROCKCHIP_BROM_HELPER
265 config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
266 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
267 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
269 Some Rockchip BROM variants (e.g. on the RK3188) load the
270 first stage in segments and enter multiple times. E.g. on
271 the RK3188, the first 1KB of the first stage are loaded
272 first and entered; after returning to the BROM, the
273 remainder of the first stage is loaded, but the BROM
274 re-enters at the same address/to the same code as previously.
276 This enables support code in the BOOT0 hook for the SPL stage
277 to allow multiple entries.
279 config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
280 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
281 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
283 Some Rockchip BROM variants (e.g. on the RK3188) load the
284 first stage in segments and enter multiple times. E.g. on
285 the RK3188, the first 1KB of the first stage are loaded
286 first and entered; after returning to the BROM, the
287 remainder of the first stage is loaded, but the BROM
288 re-enters at the same address/to the same code as previously.
290 This enables support code in the BOOT0 hook for the TPL stage
291 to allow multiple entries.
293 config SPL_MMC_SUPPORT
294 default y if !SPL_ROCKCHIP_BACK_TO_BROM
296 source "arch/arm/mach-rockchip/rk3036/Kconfig"
297 source "arch/arm/mach-rockchip/rk3128/Kconfig"
298 source "arch/arm/mach-rockchip/rk3188/Kconfig"
299 source "arch/arm/mach-rockchip/rk322x/Kconfig"
300 source "arch/arm/mach-rockchip/rk3288/Kconfig"
301 source "arch/arm/mach-rockchip/rk3328/Kconfig"
302 source "arch/arm/mach-rockchip/rk3368/Kconfig"
303 source "arch/arm/mach-rockchip/rk3399/Kconfig"
304 source "arch/arm/mach-rockchip/rv1108/Kconfig"