2 * arch/arm/mach-orion5x/wnr854t-setup.c
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
9 #include <linux/kernel.h>
10 #include <linux/init.h>
11 #include <linux/platform_device.h>
12 #include <linux/pci.h>
13 #include <linux/irq.h>
14 #include <linux/delay.h>
15 #include <linux/mtd/physmap.h>
16 #include <linux/mv643xx_eth.h>
17 #include <linux/ethtool.h>
19 #include <asm/mach-types.h>
21 #include <asm/mach/arch.h>
22 #include <asm/mach/pci.h>
23 #include <mach/orion5x.h>
27 static unsigned int wnr854t_mpp_modes[] __initdata = {
28 MPP0_GPIO, /* Power LED green (0=on) */
29 MPP1_GPIO, /* Reset Button (0=off) */
30 MPP2_GPIO, /* Power LED blink (0=off) */
31 MPP3_GPIO, /* WAN Status LED amber (0=off) */
32 MPP4_GPIO, /* PCI int */
36 MPP8_UNUSED, /* ??? */
37 MPP9_GIGE, /* GE_RXERR */
38 MPP10_UNUSED, /* ??? */
39 MPP11_UNUSED, /* ??? */
40 MPP12_GIGE, /* GE_TXD[4] */
41 MPP13_GIGE, /* GE_TXD[5] */
42 MPP14_GIGE, /* GE_TXD[6] */
43 MPP15_GIGE, /* GE_TXD[7] */
44 MPP16_GIGE, /* GE_RXD[4] */
45 MPP17_GIGE, /* GE_RXD[5] */
46 MPP18_GIGE, /* GE_RXD[6] */
47 MPP19_GIGE, /* GE_RXD[7] */
52 * 8M NOR flash Device bus boot chip select
54 #define WNR854T_NOR_BOOT_BASE 0xf4000000
55 #define WNR854T_NOR_BOOT_SIZE SZ_8M
57 static struct mtd_partition wnr854t_nor_flash_partitions[] = {
73 static struct physmap_flash_data wnr854t_nor_flash_data = {
75 .parts = wnr854t_nor_flash_partitions,
76 .nr_parts = ARRAY_SIZE(wnr854t_nor_flash_partitions),
79 static struct resource wnr854t_nor_flash_resource = {
80 .flags = IORESOURCE_MEM,
81 .start = WNR854T_NOR_BOOT_BASE,
82 .end = WNR854T_NOR_BOOT_BASE + WNR854T_NOR_BOOT_SIZE - 1,
85 static struct platform_device wnr854t_nor_flash = {
86 .name = "physmap-flash",
89 .platform_data = &wnr854t_nor_flash_data,
92 .resource = &wnr854t_nor_flash_resource,
95 static struct mv643xx_eth_platform_data wnr854t_eth_data = {
96 .phy_addr = MV643XX_ETH_PHY_NONE,
98 .duplex = DUPLEX_FULL,
101 static struct dsa_chip_data wnr854t_switch_chip_data = {
102 .port_names[0] = "lan3",
103 .port_names[1] = "lan4",
104 .port_names[2] = "wan",
105 .port_names[3] = "cpu",
106 .port_names[5] = "lan1",
107 .port_names[7] = "lan2",
110 static struct dsa_platform_data wnr854t_switch_plat_data = {
112 .chip = &wnr854t_switch_chip_data,
115 static void __init wnr854t_init(void)
118 * Setup basic Orion functions. Need to be called early.
122 orion5x_mpp_conf(wnr854t_mpp_modes);
125 * Configure peripherals.
127 orion5x_eth_init(&wnr854t_eth_data);
128 orion5x_eth_switch_init(&wnr854t_switch_plat_data, NO_IRQ);
129 orion5x_uart0_init();
131 orion5x_setup_dev_boot_win(WNR854T_NOR_BOOT_BASE,
132 WNR854T_NOR_BOOT_SIZE);
133 platform_device_register(&wnr854t_nor_flash);
136 static int __init wnr854t_pci_map_irq(const struct pci_dev *dev, u8 slot,
142 * Check for devices with hard-wired IRQs.
144 irq = orion5x_pci_map_irq(dev, slot, pin);
152 return gpio_to_irq(4);
157 static struct hw_pci wnr854t_pci __initdata = {
159 .swizzle = pci_std_swizzle,
160 .setup = orion5x_pci_sys_setup,
161 .scan = orion5x_pci_sys_scan_bus,
162 .map_irq = wnr854t_pci_map_irq,
165 static int __init wnr854t_pci_init(void)
167 if (machine_is_wnr854t())
168 pci_common_init(&wnr854t_pci);
172 subsys_initcall(wnr854t_pci_init);
174 MACHINE_START(WNR854T, "Netgear WNR854T")
175 /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
176 .boot_params = 0x00000100,
177 .init_machine = wnr854t_init,
178 .map_io = orion5x_map_io,
179 .init_early = orion5x_init_early,
180 .init_irq = orion5x_init_irq,
181 .timer = &orion5x_timer,
182 .fixup = tag_fixup_mem32,