1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
5 * Based on original Kirkwood support which is
7 * Marvell Semiconductor <www.marvell.com>
8 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
14 #include <asm/arch/cpu.h>
15 #include <asm/global_data.h>
17 DECLARE_GLOBAL_DATA_PTR;
20 * orion5x_sdram_bar - reads SDRAM Base Address Register
22 u32 orion5x_sdram_bar(enum memory_bank bank)
24 struct orion5x_ddr_addr_decode_registers *winregs =
25 (struct orion5x_ddr_addr_decode_registers *)
29 u32 enable = 0x01 & winregs[bank].size;
31 if ((!enable) || (bank > BANK3))
34 result = winregs[bank].base;
39 /* dram_init must store complete ramsize in gd->ram_size */
40 gd->ram_size = get_ram_size(
41 (long *) orion5x_sdram_bar(0),
42 CONFIG_MAX_RAM_BANK_SIZE);
46 int dram_init_banksize(void)
50 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
51 gd->bd->bi_dram[i].start = orion5x_sdram_bar(i);
52 gd->bd->bi_dram[i].size = get_ram_size(
53 (long *) (gd->bd->bi_dram[i].start),
54 CONFIG_MAX_RAM_BANK_SIZE);