2 * arch/arm/mach-orion5x/common.c
4 * Core functions for Marvell Orion 5x SoCs
6 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/serial_8250.h>
18 #include <linux/mv643xx_i2c.h>
19 #include <linux/ata_platform.h>
22 #include <asm/setup.h>
23 #include <asm/timex.h>
24 #include <asm/mach/arch.h>
25 #include <asm/mach/map.h>
26 #include <asm/mach/time.h>
27 #include <mach/bridge-regs.h>
28 #include <mach/hardware.h>
29 #include <mach/orion5x.h>
30 #include <plat/orion_nand.h>
31 #include <plat/time.h>
32 #include <plat/common.h>
33 #include <plat/addr-map.h>
36 /*****************************************************************************
38 ****************************************************************************/
39 static struct map_desc orion5x_io_desc[] __initdata = {
41 .virtual = ORION5X_REGS_VIRT_BASE,
42 .pfn = __phys_to_pfn(ORION5X_REGS_PHYS_BASE),
43 .length = ORION5X_REGS_SIZE,
46 .virtual = ORION5X_PCIE_IO_VIRT_BASE,
47 .pfn = __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE),
48 .length = ORION5X_PCIE_IO_SIZE,
51 .virtual = ORION5X_PCI_IO_VIRT_BASE,
52 .pfn = __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE),
53 .length = ORION5X_PCI_IO_SIZE,
56 .virtual = ORION5X_PCIE_WA_VIRT_BASE,
57 .pfn = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE),
58 .length = ORION5X_PCIE_WA_SIZE,
63 void __init orion5x_map_io(void)
65 iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc));
69 /*****************************************************************************
71 ****************************************************************************/
72 void __init orion5x_ehci0_init(void)
74 orion_ehci_init(ORION5X_USB0_PHYS_BASE, IRQ_ORION5X_USB0_CTRL);
78 /*****************************************************************************
80 ****************************************************************************/
81 void __init orion5x_ehci1_init(void)
83 orion_ehci_1_init(ORION5X_USB1_PHYS_BASE, IRQ_ORION5X_USB1_CTRL);
87 /*****************************************************************************
89 ****************************************************************************/
90 void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
92 orion_ge00_init(eth_data,
93 ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM,
94 IRQ_ORION5X_ETH_ERR, orion5x_tclk);
98 /*****************************************************************************
100 ****************************************************************************/
101 void __init orion5x_eth_switch_init(struct dsa_platform_data *d, int irq)
103 orion_ge00_switch_init(d, irq);
107 /*****************************************************************************
109 ****************************************************************************/
110 void __init orion5x_i2c_init(void)
112 orion_i2c_init(I2C_PHYS_BASE, IRQ_ORION5X_I2C, 8);
117 /*****************************************************************************
119 ****************************************************************************/
120 void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
122 orion_sata_init(sata_data, ORION5X_SATA_PHYS_BASE, IRQ_ORION5X_SATA);
126 /*****************************************************************************
128 ****************************************************************************/
129 void __init orion5x_spi_init()
131 orion_spi_init(SPI_PHYS_BASE, orion5x_tclk);
135 /*****************************************************************************
137 ****************************************************************************/
138 void __init orion5x_uart0_init(void)
140 orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE,
141 IRQ_ORION5X_UART0, orion5x_tclk);
144 /*****************************************************************************
146 ****************************************************************************/
147 void __init orion5x_uart1_init(void)
149 orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE,
150 IRQ_ORION5X_UART1, orion5x_tclk);
153 /*****************************************************************************
155 ****************************************************************************/
156 void __init orion5x_xor_init(void)
158 orion_xor0_init(ORION5X_XOR_PHYS_BASE,
159 ORION5X_XOR_PHYS_BASE + 0x200,
160 IRQ_ORION5X_XOR0, IRQ_ORION5X_XOR1);
163 /*****************************************************************************
164 * Cryptographic Engines and Security Accelerator (CESA)
165 ****************************************************************************/
166 static void __init orion5x_crypto_init(void)
168 orion5x_setup_sram_win();
169 orion_crypto_init(ORION5X_CRYPTO_PHYS_BASE, ORION5X_SRAM_PHYS_BASE,
170 SZ_8K, IRQ_ORION5X_CESA);
173 /*****************************************************************************
175 ****************************************************************************/
176 void __init orion5x_wdt_init(void)
178 orion_wdt_init(orion5x_tclk);
182 /*****************************************************************************
184 ****************************************************************************/
185 void __init orion5x_init_early(void)
187 orion_time_set_base(TIMER_VIRT_BASE);
192 int __init orion5x_find_tclk(void)
196 orion5x_pcie_id(&dev, &rev);
197 if (dev == MV88F6183_DEV_ID &&
198 (readl(MPP_RESET_SAMPLE) & 0x00000200) == 0)
204 static void orion5x_timer_init(void)
206 orion5x_tclk = orion5x_find_tclk();
208 orion_time_init(ORION5X_BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
209 IRQ_ORION5X_BRIDGE, orion5x_tclk);
212 struct sys_timer orion5x_timer = {
213 .init = orion5x_timer_init,
217 /*****************************************************************************
219 ****************************************************************************/
221 * Identify device ID and rev from PCIe configuration header space '0'.
223 static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
225 orion5x_pcie_id(dev, rev);
227 if (*dev == MV88F5281_DEV_ID) {
228 if (*rev == MV88F5281_REV_D2) {
229 *dev_name = "MV88F5281-D2";
230 } else if (*rev == MV88F5281_REV_D1) {
231 *dev_name = "MV88F5281-D1";
232 } else if (*rev == MV88F5281_REV_D0) {
233 *dev_name = "MV88F5281-D0";
235 *dev_name = "MV88F5281-Rev-Unsupported";
237 } else if (*dev == MV88F5182_DEV_ID) {
238 if (*rev == MV88F5182_REV_A2) {
239 *dev_name = "MV88F5182-A2";
241 *dev_name = "MV88F5182-Rev-Unsupported";
243 } else if (*dev == MV88F5181_DEV_ID) {
244 if (*rev == MV88F5181_REV_B1) {
245 *dev_name = "MV88F5181-Rev-B1";
246 } else if (*rev == MV88F5181L_REV_A1) {
247 *dev_name = "MV88F5181L-Rev-A1";
249 *dev_name = "MV88F5181(L)-Rev-Unsupported";
251 } else if (*dev == MV88F6183_DEV_ID) {
252 if (*rev == MV88F6183_REV_B0) {
253 *dev_name = "MV88F6183-Rev-B0";
255 *dev_name = "MV88F6183-Rev-Unsupported";
258 *dev_name = "Device-Unknown";
262 void __init orion5x_init(void)
267 orion5x_id(&dev, &rev, &dev_name);
268 printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, orion5x_tclk);
271 * Setup Orion address map
273 orion5x_setup_cpu_mbus_bridge();
276 * Don't issue "Wait for Interrupt" instruction if we are
277 * running on D0 5281 silicon.
279 if (dev == MV88F5281_DEV_ID && rev == MV88F5281_REV_D0) {
280 printk(KERN_INFO "Orion: Applying 5281 D0 WFI workaround.\n");
285 * The 5082/5181l/5182/6082/6082l/6183 have crypto
286 * while 5180n/5181/5281 don't have crypto.
288 if ((dev == MV88F5181_DEV_ID && rev >= MV88F5181L_REV_A0) ||
289 dev == MV88F5182_DEV_ID || dev == MV88F6183_DEV_ID)
290 orion5x_crypto_init();
293 * Register watchdog driver
299 * Many orion-based systems have buggy bootloader implementations.
300 * This is a common fixup for bogus memory tags.
302 void __init tag_fixup_mem32(struct tag *t, char **from,
303 struct meminfo *meminfo)
305 for (; t->hdr.size; t = tag_next(t))
306 if (t->hdr.tag == ATAG_MEM &&
307 (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
308 t->u.mem.start & ~PAGE_MASK)) {
310 "Clearing invalid memory bank %dKB@0x%08x\n",
311 t->u.mem.size / 1024, t->u.mem.start);