2 * OMAP Voltage Controller (VC) interface
4 * Copyright (C) 2011 Texas Instruments, Inc.
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
10 #include <linux/kernel.h>
11 #include <linux/delay.h>
12 #include <linux/init.h>
13 #include <linux/bug.h>
18 #include "prm-regbits-34xx.h"
19 #include "prm-regbits-44xx.h"
23 * struct omap_vc_channel_cfg - describe the cfg_channel bitfield
24 * @sa: bit for slave address
25 * @rav: bit for voltage configuration register
26 * @rac: bit for command configuration register
27 * @racen: enable bit for RAC
28 * @cmd: bit for command value set selection
30 * Channel configuration bits, common for OMAP3+
31 * OMAP3 register: PRM_VC_CH_CONF
32 * OMAP4 register: PRM_VC_CFG_CHANNEL
33 * OMAP5 register: PRM_VC_SMPS_<voltdm>_CONFIG
35 struct omap_vc_channel_cfg {
43 static struct omap_vc_channel_cfg vc_default_channel_cfg = {
52 * On OMAP3+, all VC channels have the above default bitfield
53 * configuration, except the OMAP4 MPU channel. This appears
54 * to be a freak accident as every other VC channel has the
55 * default configuration, thus creating a mutant channel config.
57 static struct omap_vc_channel_cfg vc_mutant_channel_cfg = {
65 static struct omap_vc_channel_cfg *vc_cfg_bits;
66 #define CFG_CHANNEL_MASK 0x1f
69 * omap_vc_config_channel - configure VC channel to PMIC mappings
70 * @voltdm: pointer to voltagdomain defining the desired VC channel
72 * Configures the VC channel to PMIC mappings for the following
74 * - i2c slave address (SA)
75 * - voltage configuration address (RAV)
76 * - command configuration address (RAC) and enable bit (RACEN)
77 * - command values for ON, ONLP, RET and OFF (CMD)
79 * This function currently only allows flexible configuration of the
80 * non-default channel. Starting with OMAP4, there are more than 2
81 * channels, with one defined as the default (on OMAP4, it's MPU.)
82 * Only the non-default channel can be configured.
84 static int omap_vc_config_channel(struct voltagedomain *voltdm)
86 struct omap_vc_channel *vc = voltdm->vc;
89 * For default channel, the only configurable bit is RACEN.
90 * All others must stay at zero (see function comment above.)
92 if (vc->flags & OMAP_VC_CHANNEL_DEFAULT)
93 vc->cfg_channel &= vc_cfg_bits->racen;
95 voltdm->rmw(CFG_CHANNEL_MASK << vc->cfg_channel_sa_shift,
96 vc->cfg_channel << vc->cfg_channel_sa_shift,
102 /* Voltage scale and accessory APIs */
103 int omap_vc_pre_scale(struct voltagedomain *voltdm,
104 unsigned long target_volt,
105 u8 *target_vsel, u8 *current_vsel)
107 struct omap_vc_channel *vc = voltdm->vc;
110 /* Check if sufficient pmic info is available for this vdd */
112 pr_err("%s: Insufficient pmic info to scale the vdd_%s\n",
113 __func__, voltdm->name);
117 if (!voltdm->pmic->uv_to_vsel) {
118 pr_err("%s: PMIC function to convert voltage in uV to vsel not registered. Hence unable to scale voltage for vdd_%s\n",
119 __func__, voltdm->name);
123 if (!voltdm->read || !voltdm->write) {
124 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
125 __func__, voltdm->name);
129 *target_vsel = voltdm->pmic->uv_to_vsel(target_volt);
130 *current_vsel = voltdm->pmic->uv_to_vsel(voltdm->nominal_volt);
132 /* Setting the ON voltage to the new target voltage */
133 vc_cmdval = voltdm->read(vc->cmdval_reg);
134 vc_cmdval &= ~vc->common->cmd_on_mask;
135 vc_cmdval |= (*target_vsel << vc->common->cmd_on_shift);
136 voltdm->write(vc_cmdval, vc->cmdval_reg);
138 voltdm->vc_param->on = target_volt;
140 omap_vp_update_errorgain(voltdm, target_volt);
145 void omap_vc_post_scale(struct voltagedomain *voltdm,
146 unsigned long target_volt,
147 u8 target_vsel, u8 current_vsel)
149 u32 smps_steps = 0, smps_delay = 0;
151 smps_steps = abs(target_vsel - current_vsel);
152 /* SMPS slew rate / step size. 2us added as buffer. */
153 smps_delay = ((smps_steps * voltdm->pmic->step_size) /
154 voltdm->pmic->slew_rate) + 2;
158 /* vc_bypass_scale - VC bypass method of voltage scaling */
159 int omap_vc_bypass_scale(struct voltagedomain *voltdm,
160 unsigned long target_volt)
162 struct omap_vc_channel *vc = voltdm->vc;
163 u32 loop_cnt = 0, retries_cnt = 0;
164 u32 vc_valid, vc_bypass_val_reg, vc_bypass_value;
165 u8 target_vsel, current_vsel;
168 ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, ¤t_vsel);
172 vc_valid = vc->common->valid;
173 vc_bypass_val_reg = vc->common->bypass_val_reg;
174 vc_bypass_value = (target_vsel << vc->common->data_shift) |
175 (vc->volt_reg_addr << vc->common->regaddr_shift) |
176 (vc->i2c_slave_addr << vc->common->slaveaddr_shift);
178 voltdm->write(vc_bypass_value, vc_bypass_val_reg);
179 voltdm->write(vc_bypass_value | vc_valid, vc_bypass_val_reg);
181 vc_bypass_value = voltdm->read(vc_bypass_val_reg);
183 * Loop till the bypass command is acknowledged from the SMPS.
184 * NOTE: This is legacy code. The loop count and retry count needs
187 while (!(vc_bypass_value & vc_valid)) {
190 if (retries_cnt > 10) {
191 pr_warning("%s: Retry count exceeded\n", __func__);
200 vc_bypass_value = voltdm->read(vc_bypass_val_reg);
203 omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel);
208 * omap3_set_i2c_timings - sets i2c sleep timings for a channel
209 * @voltdm: channel to configure
210 * @off_mode: select whether retention or off mode values used
212 * Calculates and sets up voltage controller to use I2C based
213 * voltage scaling for sleep modes. This can be used for either off mode
214 * or retention. Off mode has additionally an option to use sys_off_mode
215 * pad, which uses a global signal to program the whole power IC to
218 static void omap3_set_i2c_timings(struct voltagedomain *voltdm, bool off_mode)
220 unsigned long voltsetup1;
224 tgt_volt = voltdm->vc_param->off;
226 tgt_volt = voltdm->vc_param->ret;
228 voltsetup1 = (voltdm->vc_param->on - tgt_volt) /
229 voltdm->pmic->slew_rate;
231 voltsetup1 = voltsetup1 * voltdm->sys_clk.rate / 8 / 1000000 + 1;
233 voltdm->rmw(voltdm->vfsm->voltsetup_mask,
234 voltsetup1 << __ffs(voltdm->vfsm->voltsetup_mask),
235 voltdm->vfsm->voltsetup_reg);
238 * pmic is not controlling the voltage scaling during retention,
239 * thus set voltsetup2 to 0
241 voltdm->write(0, OMAP3_PRM_VOLTSETUP2_OFFSET);
245 * omap3_set_off_timings - sets off-mode timings for a channel
246 * @voltdm: channel to configure
248 * Calculates and sets up off-mode timings for a channel. Off-mode
249 * can use either I2C based voltage scaling, or alternatively
250 * sys_off_mode pad can be used to send a global command to power IC.
251 * This function first checks which mode is being used, and calls
252 * omap3_set_i2c_timings() if the system is using I2C control mode.
253 * sys_off_mode has the additional benefit that voltages can be
254 * scaled to zero volt level with TWL4030 / TWL5030, I2C can only
257 static void omap3_set_off_timings(struct voltagedomain *voltdm)
259 unsigned long clksetup;
260 unsigned long voltsetup2;
261 unsigned long voltsetup2_old;
264 /* check if sys_off_mode is used to control off-mode voltages */
265 val = voltdm->read(OMAP3_PRM_VOLTCTRL_OFFSET);
266 if (!(val & OMAP3430_SEL_OFF_MASK)) {
267 /* No, omap is controlling them over I2C */
268 omap3_set_i2c_timings(voltdm, true);
272 clksetup = voltdm->read(OMAP3_PRM_CLKSETUP_OFFSET);
274 /* voltsetup 2 in us */
275 voltsetup2 = voltdm->vc_param->on / voltdm->pmic->slew_rate;
277 /* convert to 32k clk cycles */
278 voltsetup2 = DIV_ROUND_UP(voltsetup2 * 32768, 1000000);
280 voltsetup2_old = voltdm->read(OMAP3_PRM_VOLTSETUP2_OFFSET);
283 * Update voltsetup2 if higher than current value (needed because
284 * we have multiple channels with different ramp times), also
285 * update voltoffset always to value recommended by TRM
287 if (voltsetup2 > voltsetup2_old) {
288 voltdm->write(voltsetup2, OMAP3_PRM_VOLTSETUP2_OFFSET);
289 voltdm->write(clksetup - voltsetup2,
290 OMAP3_PRM_VOLTOFFSET_OFFSET);
292 voltdm->write(clksetup - voltsetup2_old,
293 OMAP3_PRM_VOLTOFFSET_OFFSET);
296 * omap is not controlling voltage scaling during off-mode,
297 * thus set voltsetup1 to 0
299 voltdm->rmw(voltdm->vfsm->voltsetup_mask, 0,
300 voltdm->vfsm->voltsetup_reg);
302 /* voltoffset must be clksetup minus voltsetup2 according to TRM */
303 voltdm->write(clksetup - voltsetup2, OMAP3_PRM_VOLTOFFSET_OFFSET);
306 static void __init omap3_vc_init_channel(struct voltagedomain *voltdm)
308 omap3_set_off_timings(voltdm);
312 * omap4_calc_volt_ramp - calculates voltage ramping delays on omap4
313 * @voltdm: channel to calculate values for
314 * @voltage_diff: voltage difference in microvolts
316 * Calculates voltage ramp prescaler + counter values for a voltage
317 * difference on omap4. Returns a field value suitable for writing to
318 * VOLTSETUP register for a channel in following format:
319 * bits[8:9] prescaler ... bits[0:5] counter. See OMAP4 TRM for reference.
321 static u32 omap4_calc_volt_ramp(struct voltagedomain *voltdm, u32 voltage_diff)
327 time = voltage_diff / voltdm->pmic->slew_rate;
329 cycles = voltdm->sys_clk.rate / 1000 * time / 1000;
334 /* shift to next prescaler until no overflow */
336 /* scale for div 256 = 64 * 4 */
342 /* scale for div 512 = 256 * 2 */
348 /* scale for div 2048 = 512 * 4 */
354 /* check for overflow => invalid ramp time */
356 pr_warn("%s: invalid setuptime for vdd_%s\n", __func__,
363 return (prescaler << OMAP4430_RAMP_UP_PRESCAL_SHIFT) |
364 (cycles << OMAP4430_RAMP_UP_COUNT_SHIFT);
368 * omap4_set_timings - set voltage ramp timings for a channel
369 * @voltdm: channel to configure
370 * @off_mode: whether off-mode values are used
372 * Calculates and sets the voltage ramp up / down values for a channel.
374 static void omap4_set_timings(struct voltagedomain *voltdm, bool off_mode)
381 ramp = omap4_calc_volt_ramp(voltdm,
382 voltdm->vc_param->on - voltdm->vc_param->off);
383 offset = voltdm->vfsm->voltsetup_off_reg;
385 ramp = omap4_calc_volt_ramp(voltdm,
386 voltdm->vc_param->on - voltdm->vc_param->ret);
387 offset = voltdm->vfsm->voltsetup_reg;
393 val = voltdm->read(offset);
395 val |= ramp << OMAP4430_RAMP_DOWN_COUNT_SHIFT;
397 val |= ramp << OMAP4430_RAMP_UP_COUNT_SHIFT;
399 voltdm->write(val, offset);
402 /* OMAP4 specific voltage init functions */
403 static void __init omap4_vc_init_channel(struct voltagedomain *voltdm)
405 static bool is_initialized;
408 omap4_set_timings(voltdm, true);
409 omap4_set_timings(voltdm, false);
414 /* XXX These are magic numbers and do not belong! */
415 vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT);
416 voltdm->write(vc_val, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET);
418 is_initialized = true;
422 * omap_vc_i2c_init - initialize I2C interface to PMIC
423 * @voltdm: voltage domain containing VC data
425 * Use PMIC supplied settings for I2C high-speed mode and
426 * master code (if set) and program the VC I2C configuration
429 * The VC I2C configuration is common to all VC channels,
430 * so this function only configures I2C for the first VC
431 * channel registers. All other VC channels will use the
432 * same configuration.
434 static void __init omap_vc_i2c_init(struct voltagedomain *voltdm)
436 struct omap_vc_channel *vc = voltdm->vc;
437 static bool initialized;
438 static bool i2c_high_speed;
442 if (voltdm->pmic->i2c_high_speed != i2c_high_speed)
443 pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).",
444 __func__, voltdm->name, i2c_high_speed);
448 i2c_high_speed = voltdm->pmic->i2c_high_speed;
450 voltdm->rmw(vc->common->i2c_cfg_hsen_mask,
451 vc->common->i2c_cfg_hsen_mask,
452 vc->common->i2c_cfg_reg);
454 mcode = voltdm->pmic->i2c_mcode;
456 voltdm->rmw(vc->common->i2c_mcode_mask,
457 mcode << __ffs(vc->common->i2c_mcode_mask),
458 vc->common->i2c_cfg_reg);
464 * omap_vc_calc_vsel - calculate vsel value for a channel
465 * @voltdm: channel to calculate value for
466 * @uvolt: microvolt value to convert to vsel
468 * Converts a microvolt value to vsel value for the used PMIC.
469 * This checks whether the microvolt value is out of bounds, and
470 * adjusts the value accordingly. If unsupported value detected,
473 static u8 omap_vc_calc_vsel(struct voltagedomain *voltdm, u32 uvolt)
475 if (voltdm->pmic->vddmin > uvolt)
476 uvolt = voltdm->pmic->vddmin;
477 if (voltdm->pmic->vddmax < uvolt) {
478 WARN(1, "%s: voltage not supported by pmic: %u vs max %u\n",
479 __func__, uvolt, voltdm->pmic->vddmax);
480 /* Lets try maximum value anyway */
481 uvolt = voltdm->pmic->vddmax;
484 return voltdm->pmic->uv_to_vsel(uvolt);
487 void __init omap_vc_init_channel(struct voltagedomain *voltdm)
489 struct omap_vc_channel *vc = voltdm->vc;
490 u8 on_vsel, onlp_vsel, ret_vsel, off_vsel;
493 if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) {
494 pr_err("%s: No PMIC info for vdd_%s\n", __func__, voltdm->name);
498 if (!voltdm->read || !voltdm->write) {
499 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
500 __func__, voltdm->name);
505 if (vc->flags & OMAP_VC_CHANNEL_CFG_MUTANT)
506 vc_cfg_bits = &vc_mutant_channel_cfg;
508 vc_cfg_bits = &vc_default_channel_cfg;
510 /* get PMIC/board specific settings */
511 vc->i2c_slave_addr = voltdm->pmic->i2c_slave_addr;
512 vc->volt_reg_addr = voltdm->pmic->volt_reg_addr;
513 vc->cmd_reg_addr = voltdm->pmic->cmd_reg_addr;
515 /* Configure the i2c slave address for this VC */
516 voltdm->rmw(vc->smps_sa_mask,
517 vc->i2c_slave_addr << __ffs(vc->smps_sa_mask),
519 vc->cfg_channel |= vc_cfg_bits->sa;
522 * Configure the PMIC register addresses.
524 voltdm->rmw(vc->smps_volra_mask,
525 vc->volt_reg_addr << __ffs(vc->smps_volra_mask),
527 vc->cfg_channel |= vc_cfg_bits->rav;
529 if (vc->cmd_reg_addr) {
530 voltdm->rmw(vc->smps_cmdra_mask,
531 vc->cmd_reg_addr << __ffs(vc->smps_cmdra_mask),
533 vc->cfg_channel |= vc_cfg_bits->rac | vc_cfg_bits->racen;
536 /* Set up the on, inactive, retention and off voltage */
537 on_vsel = omap_vc_calc_vsel(voltdm, voltdm->vc_param->on);
538 onlp_vsel = omap_vc_calc_vsel(voltdm, voltdm->vc_param->onlp);
539 ret_vsel = omap_vc_calc_vsel(voltdm, voltdm->vc_param->ret);
540 off_vsel = omap_vc_calc_vsel(voltdm, voltdm->vc_param->off);
542 val = ((on_vsel << vc->common->cmd_on_shift) |
543 (onlp_vsel << vc->common->cmd_onlp_shift) |
544 (ret_vsel << vc->common->cmd_ret_shift) |
545 (off_vsel << vc->common->cmd_off_shift));
546 voltdm->write(val, vc->cmdval_reg);
547 vc->cfg_channel |= vc_cfg_bits->cmd;
549 /* Channel configuration */
550 omap_vc_config_channel(voltdm);
552 omap_vc_i2c_init(voltdm);
554 if (cpu_is_omap34xx())
555 omap3_vc_init_channel(voltdm);
556 else if (cpu_is_omap44xx())
557 omap4_vc_init_channel(voltdm);