2 * linux/arch/arm/mach-omap2/timer.c
4 * OMAP2 GP timer support.
6 * Copyright (C) 2009 Nokia Corporation
8 * Update to use new clocksource/clockevent layers
9 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
10 * Copyright (C) 2007 MontaVista Software, Inc.
13 * Copyright (C) 2005 Nokia Corporation
14 * Author: Paul Mundt <paul.mundt@nokia.com>
15 * Juha Yrjölä <juha.yrjola@nokia.com>
16 * OMAP Dual-mode timer framework support by Timo Teras
18 * Some parts based off of TI's 24xx code:
20 * Copyright (C) 2004-2009 Texas Instruments, Inc.
22 * Roughly modelled after the OMAP1 MPU timer code.
23 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
25 * This file is subject to the terms and conditions of the GNU General Public
26 * License. See the file "COPYING" in the main directory of this archive
29 #include <linux/init.h>
30 #include <linux/time.h>
31 #include <linux/interrupt.h>
32 #include <linux/err.h>
33 #include <linux/clk.h>
34 #include <linux/delay.h>
35 #include <linux/irq.h>
36 #include <linux/clocksource.h>
37 #include <linux/clockchips.h>
38 #include <linux/slab.h>
40 #include <asm/mach/time.h>
41 #include <asm/smp_twd.h>
42 #include <asm/sched_clock.h>
44 #include <plat/omap_hwmod.h>
45 #include <plat/omap_device.h>
46 #include <plat/dmtimer.h>
47 #include <plat/omap-pm.h>
51 #include "powerdomain.h"
53 /* Parent clocks, eventually these will come from the clock framework */
55 #define OMAP2_MPU_SOURCE "sys_ck"
56 #define OMAP3_MPU_SOURCE OMAP2_MPU_SOURCE
57 #define OMAP4_MPU_SOURCE "sys_clkin_ck"
58 #define OMAP2_32K_SOURCE "func_32k_ck"
59 #define OMAP3_32K_SOURCE "omap_32k_fck"
60 #define OMAP4_32K_SOURCE "sys_32k_ck"
62 #ifdef CONFIG_OMAP_32K_TIMER
63 #define OMAP2_CLKEV_SOURCE OMAP2_32K_SOURCE
64 #define OMAP3_CLKEV_SOURCE OMAP3_32K_SOURCE
65 #define OMAP4_CLKEV_SOURCE OMAP4_32K_SOURCE
66 #define OMAP3_SECURE_TIMER 12
68 #define OMAP2_CLKEV_SOURCE OMAP2_MPU_SOURCE
69 #define OMAP3_CLKEV_SOURCE OMAP3_MPU_SOURCE
70 #define OMAP4_CLKEV_SOURCE OMAP4_MPU_SOURCE
71 #define OMAP3_SECURE_TIMER 1
76 static struct omap_dm_timer clkev;
77 static struct clock_event_device clockevent_gpt;
79 static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
81 struct clock_event_device *evt = &clockevent_gpt;
83 __omap_dm_timer_write_status(&clkev, OMAP_TIMER_INT_OVERFLOW);
85 evt->event_handler(evt);
89 static struct irqaction omap2_gp_timer_irq = {
91 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
92 .handler = omap2_gp_timer_interrupt,
95 static int omap2_gp_timer_set_next_event(unsigned long cycles,
96 struct clock_event_device *evt)
98 __omap_dm_timer_load_start(&clkev, OMAP_TIMER_CTRL_ST,
99 0xffffffff - cycles, 1);
104 static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
105 struct clock_event_device *evt)
109 __omap_dm_timer_stop(&clkev, 1, clkev.rate);
112 case CLOCK_EVT_MODE_PERIODIC:
113 period = clkev.rate / HZ;
115 /* Looks like we need to first set the load value separately */
116 __omap_dm_timer_write(&clkev, OMAP_TIMER_LOAD_REG,
117 0xffffffff - period, 1);
118 __omap_dm_timer_load_start(&clkev,
119 OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST,
120 0xffffffff - period, 1);
122 case CLOCK_EVT_MODE_ONESHOT:
124 case CLOCK_EVT_MODE_UNUSED:
125 case CLOCK_EVT_MODE_SHUTDOWN:
126 case CLOCK_EVT_MODE_RESUME:
131 static struct clock_event_device clockevent_gpt = {
133 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
136 .set_next_event = omap2_gp_timer_set_next_event,
137 .set_mode = omap2_gp_timer_set_mode,
140 static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
142 const char *fck_source)
144 char name[10]; /* 10 = sizeof("gptXX_Xck0") */
145 struct omap_hwmod *oh;
146 struct resource irq_rsrc, mem_rsrc;
151 sprintf(name, "timer%d", gptimer_id);
152 omap_hwmod_setup_one(name);
153 oh = omap_hwmod_lookup(name);
157 r = omap_hwmod_get_resource_byname(oh, IORESOURCE_IRQ, NULL, &irq_rsrc);
160 timer->irq = irq_rsrc.start;
162 r = omap_hwmod_get_resource_byname(oh, IORESOURCE_MEM, NULL, &mem_rsrc);
165 timer->phys_base = mem_rsrc.start;
166 size = mem_rsrc.end - mem_rsrc.start;
168 /* Static mapping, never released */
169 timer->io_base = ioremap(timer->phys_base, size);
173 /* After the dmtimer is using hwmod these clocks won't be needed */
174 timer->fclk = clk_get(NULL, omap_hwmod_get_main_clk(oh));
175 if (IS_ERR(timer->fclk))
178 omap_hwmod_enable(oh);
180 if (omap_dm_timer_reserve_systimer(gptimer_id))
183 if (gptimer_id != 12) {
186 src = clk_get(NULL, fck_source);
190 res = __omap_dm_timer_set_source(timer->fclk, src);
191 if (IS_ERR_VALUE(res))
192 pr_warning("%s: timer%i cannot set source\n",
193 __func__, gptimer_id);
197 __omap_dm_timer_init_regs(timer);
198 __omap_dm_timer_reset(timer, 1, 1);
201 timer->rate = clk_get_rate(timer->fclk);
208 static void __init omap2_gp_clockevent_init(int gptimer_id,
209 const char *fck_source)
213 res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source);
216 omap2_gp_timer_irq.dev_id = (void *)&clkev;
217 setup_irq(clkev.irq, &omap2_gp_timer_irq);
219 __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW);
221 clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC,
222 clockevent_gpt.shift);
223 clockevent_gpt.max_delta_ns =
224 clockevent_delta2ns(0xffffffff, &clockevent_gpt);
225 clockevent_gpt.min_delta_ns =
226 clockevent_delta2ns(3, &clockevent_gpt);
227 /* Timer internal resynch latency. */
229 clockevent_gpt.cpumask = cpu_possible_mask;
230 clockevent_gpt.irq = omap_dm_timer_get_irq(&clkev);
231 clockevents_register_device(&clockevent_gpt);
233 pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n",
234 gptimer_id, clkev.rate);
237 /* Clocksource code */
238 static struct omap_dm_timer clksrc;
239 static bool use_gptimer_clksrc;
244 static cycle_t clocksource_read_cycles(struct clocksource *cs)
246 return (cycle_t)__omap_dm_timer_read_counter(&clksrc, 1);
249 static struct clocksource clocksource_gpt = {
252 .read = clocksource_read_cycles,
253 .mask = CLOCKSOURCE_MASK(32),
254 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
257 static u32 notrace dmtimer_read_sched_clock(void)
260 return __omap_dm_timer_read_counter(&clksrc, 1);
265 #ifdef CONFIG_OMAP_32K_TIMER
266 /* Setup free-running counter for clocksource */
267 static int __init omap2_sync32k_clocksource_init(void)
270 struct omap_hwmod *oh;
272 const char *oh_name = "counter_32k";
275 * First check hwmod data is available for sync32k counter
277 oh = omap_hwmod_lookup(oh_name);
278 if (!oh || oh->slaves_cnt == 0)
281 omap_hwmod_setup_one(oh_name);
283 vbase = omap_hwmod_get_mpu_rt_va(oh);
285 pr_warn("%s: failed to get counter_32k resource\n", __func__);
289 ret = omap_hwmod_enable(oh);
291 pr_warn("%s: failed to enable counter_32k module (%d)\n",
296 ret = omap_init_clocksource_32k(vbase);
298 pr_warn("%s: failed to initialize counter_32k as a clocksource (%d)\n",
306 static inline int omap2_sync32k_clocksource_init(void)
312 static void __init omap2_gptimer_clocksource_init(int gptimer_id,
313 const char *fck_source)
317 res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source);
320 __omap_dm_timer_load_start(&clksrc,
321 OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1);
322 setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate);
324 if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
325 pr_err("Could not register clocksource %s\n",
326 clocksource_gpt.name);
328 pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n",
329 gptimer_id, clksrc.rate);
332 static void __init omap2_clocksource_init(int gptimer_id,
333 const char *fck_source)
336 * First give preference to kernel parameter configuration
337 * by user (clocksource="gp_timer").
339 * In case of missing kernel parameter for clocksource,
340 * first check for availability for 32k-sync timer, in case
341 * of failure in finding 32k_counter module or registering
342 * it as clocksource, execution will fallback to gp-timer.
344 if (use_gptimer_clksrc == true)
345 omap2_gptimer_clocksource_init(gptimer_id, fck_source);
346 else if (omap2_sync32k_clocksource_init())
347 /* Fall back to gp-timer code */
348 omap2_gptimer_clocksource_init(gptimer_id, fck_source);
351 #define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src, \
352 clksrc_nr, clksrc_src) \
353 static void __init omap##name##_timer_init(void) \
355 omap2_gp_clockevent_init((clkev_nr), clkev_src); \
356 omap2_clocksource_init((clksrc_nr), clksrc_src); \
359 #define OMAP_SYS_TIMER(name) \
360 struct sys_timer omap##name##_timer = { \
361 .init = omap##name##_timer_init, \
364 #ifdef CONFIG_ARCH_OMAP2
365 OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE, 2, OMAP2_MPU_SOURCE)
369 #ifdef CONFIG_ARCH_OMAP3
370 OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE, 2, OMAP3_MPU_SOURCE)
372 OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE,
374 OMAP_SYS_TIMER(3_secure)
377 #ifdef CONFIG_SOC_AM33XX
378 OMAP_SYS_TIMER_INIT(3_am33xx, 1, OMAP4_MPU_SOURCE, 2, OMAP4_MPU_SOURCE)
379 OMAP_SYS_TIMER(3_am33xx)
382 #ifdef CONFIG_ARCH_OMAP4
383 #ifdef CONFIG_LOCAL_TIMERS
384 static DEFINE_TWD_LOCAL_TIMER(twd_local_timer,
385 OMAP44XX_LOCAL_TWD_BASE, 29 + OMAP_INTC_START);
388 static void __init omap4_timer_init(void)
390 omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE);
391 omap2_clocksource_init(2, OMAP4_MPU_SOURCE);
392 #ifdef CONFIG_LOCAL_TIMERS
393 /* Local timers are not supprted on OMAP4430 ES1.0 */
394 if (omap_rev() != OMAP4430_REV_ES1_0) {
397 err = twd_local_timer_register(&twd_local_timer);
399 pr_err("twd_local_timer_register failed %d\n", err);
406 #ifdef CONFIG_SOC_OMAP5
407 OMAP_SYS_TIMER_INIT(5, 1, OMAP4_CLKEV_SOURCE, 2, OMAP4_MPU_SOURCE)
412 * omap_timer_init - build and register timer device with an
413 * associated timer hwmod
414 * @oh: timer hwmod pointer to be used to build timer device
415 * @user: parameter that can be passed from calling hwmod API
417 * Called by omap_hwmod_for_each_by_class to register each of the timer
418 * devices present in the system. The number of timer devices is known
419 * by parsing through the hwmod database for a given class name. At the
420 * end of function call memory is allocated for timer device and it is
421 * registered to the framework ready to be proved by the driver.
423 static int __init omap_timer_init(struct omap_hwmod *oh, void *unused)
427 char *name = "omap_timer";
428 struct dmtimer_platform_data *pdata;
429 struct platform_device *pdev;
430 struct omap_timer_capability_dev_attr *timer_dev_attr;
432 pr_debug("%s: %s\n", __func__, oh->name);
434 /* on secure device, do not register secure timer */
435 timer_dev_attr = oh->dev_attr;
436 if (omap_type() != OMAP2_DEVICE_TYPE_GP && timer_dev_attr)
437 if (timer_dev_attr->timer_capability == OMAP_TIMER_SECURE)
440 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
442 pr_err("%s: No memory for [%s]\n", __func__, oh->name);
447 * Extract the IDs from name field in hwmod database
448 * and use the same for constructing ids' for the
449 * timer devices. In a way, we are avoiding usage of
450 * static variable witin the function to do the same.
451 * CAUTION: We have to be careful and make sure the
452 * name in hwmod database does not change in which case
453 * we might either make corresponding change here or
454 * switch back static variable mechanism.
456 sscanf(oh->name, "timer%2d", &id);
459 pdata->timer_capability = timer_dev_attr->timer_capability;
461 pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata),
465 pr_err("%s: Can't build omap_device for %s: %s.\n",
466 __func__, name, oh->name);
476 * omap2_dm_timer_init - top level regular device initialization
478 * Uses dedicated hwmod api to parse through hwmod database for
479 * given class name and then build and register the timer device.
481 static int __init omap2_dm_timer_init(void)
485 ret = omap_hwmod_for_each_by_class("timer", omap_timer_init, NULL);
487 pr_err("%s: device registration failed.\n", __func__);
493 arch_initcall(omap2_dm_timer_init);
496 * omap2_override_clocksource - clocksource override with user configuration
498 * Allows user to override default clocksource, using kernel parameter
499 * clocksource="gp_timer" (For all OMAP2PLUS architectures)
501 * Note that, here we are using same standard kernel parameter "clocksource=",
502 * and not introducing any OMAP specific interface.
504 static int __init omap2_override_clocksource(char *str)
509 * For OMAP architecture, we only have two options
510 * - sync_32k (default)
511 * - gp_timer (sys_clk based)
513 if (!strcmp(str, "gp_timer"))
514 use_gptimer_clksrc = true;
518 early_param("clocksource", omap2_override_clocksource);