arch/arm/mach-omap2/prcm43xx.h

   1 /*
   2  * AM43x PRCM defines
   3  *
   4  * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #ifndef __ARCH_ARM_MACH_OMAP2_PRCM_43XX_H
  12 #define __ARCH_ARM_MACH_OMAP2_PRCM_43XX_H
  13
  14 #define AM43XX_PRM_PARTITION                            1
  15 #define AM43XX_CM_PARTITION                             1
  16
  17 /* PRM instances */
  18 #define AM43XX_PRM_OCP_SOCKET_INST                      0x0000
  19 #define AM43XX_PRM_MPU_INST                             0x0300
  20 #define AM43XX_PRM_GFX_INST                             0x0400
  21 #define AM43XX_PRM_RTC_INST                             0x0500
  22 #define AM43XX_PRM_TAMPER_INST                          0x0600
  23 #define AM43XX_PRM_CEFUSE_INST                          0x0700
  24 #define AM43XX_PRM_PER_INST                             0x0800
  25 #define AM43XX_PRM_WKUP_INST                            0x2000
  26 #define AM43XX_PRM_DEVICE_INST                          0x4000
  27
  28 /* PRM_IRQ offsets */
  29 #define AM43XX_PRM_IRQSTATUS_MPU_OFFSET                 0x0004
  30 #define AM43XX_PRM_IRQENABLE_MPU_OFFSET                 0x0008
  31
  32 /* Other PRM offsets */
  33 #define AM43XX_PRM_IO_PMCTRL_OFFSET                     0x0024
  34
  35 /* CM instances */
  36 #define AM43XX_CM_WKUP_INST                             0x2800
  37 #define AM43XX_CM_MPU_INST                              0x8300
  38 #define AM43XX_CM_GFX_INST                              0x8400
  39 #define AM43XX_CM_RTC_INST                              0x8500
  40 #define AM43XX_CM_TAMPER_INST                           0x8600
  41 #define AM43XX_CM_CEFUSE_INST                           0x8700
  42 #define AM43XX_CM_PER_INST                              0x8800
  43
  44 /* CD offsets */
  45 #define AM43XX_CM_WKUP_L3_AON_CDOFFS                    0x0000
  46 #define AM43XX_CM_WKUP_L3S_TSC_CDOFFS                   0x0100
  47 #define AM43XX_CM_WKUP_L4_WKUP_AON_CDOFFS               0x0200
  48 #define AM43XX_CM_WKUP_WKUP_CDOFFS                      0x0300
  49 #define AM43XX_CM_MPU_MPU_CDOFFS                        0x0000
  50 #define AM43XX_CM_GFX_GFX_L3_CDOFFS                     0x0000
  51 #define AM43XX_CM_RTC_RTC_CDOFFS                        0x0000
  52 #define AM43XX_CM_TAMPER_TAMPER_CDOFFS                  0x0000
  53 #define AM43XX_CM_CEFUSE_CEFUSE_CDOFFS                  0x0000
  54 #define AM43XX_CM_PER_L3_CDOFFS                         0x0000
  55 #define AM43XX_CM_PER_L3S_CDOFFS                        0x0200
  56 #define AM43XX_CM_PER_ICSS_CDOFFS                       0x0300
  57 #define AM43XX_CM_PER_L4LS_CDOFFS                       0x0400
  58 #define AM43XX_CM_PER_EMIF_CDOFFS                       0x0700
  59 #define AM43XX_CM_PER_LCDC_CDOFFS                       0x0800
  60 #define AM43XX_CM_PER_DSS_CDOFFS                        0x0a00
  61 #define AM43XX_CM_PER_CPSW_CDOFFS                       0x0b00
  62 #define AM43XX_CM_PER_OCPWP_L3_CDOFFS                   0x0c00
  63
  64 /* CLK CTRL offsets */
  65 #define AM43XX_CM_MPU_MPU_CLKCTRL_OFFSET                0x0020
  66 #define AM43XX_CM_PER_EMIF_CLKCTRL_OFFSET               0x0720
  67
  68 #endif