3 * Texas Instruments, <www.ti.com>
6 * Manikandan Pillai <mani.pillai@ti.com>
8 * Derived from Beagle Board and 3430 SDP code by
9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Syed Mohammed Khasim <khasim@ti.com>
12 * SPDX-License-Identifier: GPL-2.0+
17 #include <asm/arch/mem.h> /* get mem tables */
18 #include <asm/arch/sys_proto.h>
19 #include <asm/bootm.h>
20 #include <asm/omap_common.h>
23 #include <linux/compiler.h>
25 extern omap3_sysinfo sysinfo;
26 static struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
28 #ifdef CONFIG_DISPLAY_CPUINFO
29 static char *rev_s[CPU_3XX_MAX_REV] = {
39 /* this is the revision table for 37xx CPUs */
40 static char *rev_s_37xx[CPU_37XX_MAX_REV] = {
44 #endif /* CONFIG_DISPLAY_CPUINFO */
46 void omap_die_id(unsigned int *die_id)
48 struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
50 die_id[0] = readl(&id_base->die_id_0);
51 die_id[1] = readl(&id_base->die_id_1);
52 die_id[2] = readl(&id_base->die_id_2);
53 die_id[3] = readl(&id_base->die_id_3);
56 /******************************************
57 * get_cpu_type(void) - extract cpu info
58 ******************************************/
59 u32 get_cpu_type(void)
61 return readl(&ctrl_base->ctrl_omap_stat);
64 /******************************************
65 * get_cpu_id(void) - extract cpu id
66 * returns 0 for ES1.0, cpuid otherwise
67 ******************************************/
70 struct ctrl_id *id_base;
74 * On ES1.0 the IDCODE register is not exposed on L4
75 * so using CPU ID to differentiate between ES1.0 and > ES1.0.
77 __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r"(cpuid));
78 if ((cpuid & 0xf) == 0x0) {
81 /* Decode the IDs on > ES1.0 */
82 id_base = (struct ctrl_id *) OMAP34XX_ID_L4_IO_BASE;
84 cpuid = readl(&id_base->idcode);
90 /******************************************
91 * get_cpu_family(void) - extract cpu info
92 ******************************************/
93 u32 get_cpu_family(void)
97 u32 cpuid = get_cpu_id();
102 hawkeye = (cpuid >> HAWKEYE_SHIFT) & 0xffff;
104 case HAWKEYE_OMAP34XX:
105 cpu_family = CPU_OMAP34XX;
108 cpu_family = CPU_AM35XX;
110 case HAWKEYE_OMAP36XX:
111 cpu_family = CPU_OMAP36XX;
114 cpu_family = CPU_OMAP34XX;
120 /******************************************
121 * get_cpu_rev(void) - extract version info
122 ******************************************/
123 u32 get_cpu_rev(void)
125 u32 cpuid = get_cpu_id();
130 return (cpuid >> CPU_3XX_ID_SHIFT) & 0xf;
133 /*****************************************************************
134 * get_sku_id(void) - read sku_id to get info on max clock rate
135 *****************************************************************/
138 struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
139 return readl(&id_base->sku_id) & SKUID_CLK_MASK;
142 /***************************************************************************
143 * get_gpmc0_base() - Return current address hardware will be
144 * fetching from. The below effectively gives what is correct, its a bit
145 * mis-leading compared to the TRM. For the most general case the mask
146 * needs to be also taken into account this does work in practice.
147 * - for u-boot we currently map:
152 ****************************************************************************/
153 u32 get_gpmc0_base(void)
157 b = readl(&gpmc_cfg->cs[0].config7);
158 b &= 0x1F; /* keep base [5:0] */
159 b = b << 24; /* ret 0x0b000000 */
163 /*******************************************************************
164 * get_gpmc0_width() - See if bus is in x8 or x16 (mainly for nand)
165 *******************************************************************/
166 u32 get_gpmc0_width(void)
171 /*************************************************************************
172 * get_board_rev() - setup to pass kernel board revision information
173 * returns:(bit[0-3] sub version, higher bit[7-4] is higher version)
174 *************************************************************************/
175 #ifdef CONFIG_REVISION_TAG
176 u32 __weak get_board_rev(void)
182 /********************************************************
183 * get_base(); get upper addr of current execution
184 *******************************************************/
185 static u32 get_base(void)
189 __asm__ __volatile__("mov %0, pc \n":"=r"(val)::"memory");
195 /********************************************************
196 * is_running_in_flash() - tell if currently running in
198 *******************************************************/
199 u32 is_running_in_flash(void)
202 return 1; /* in FLASH */
204 return 0; /* running in SRAM or SDRAM */
207 /********************************************************
208 * is_running_in_sram() - tell if currently running in
210 *******************************************************/
211 u32 is_running_in_sram(void)
214 return 1; /* in SRAM */
216 return 0; /* running in FLASH or SDRAM */
219 /********************************************************
220 * is_running_in_sdram() - tell if currently running in
222 *******************************************************/
223 u32 is_running_in_sdram(void)
226 return 1; /* in SDRAM */
228 return 0; /* running in SRAM or FLASH */
231 /***************************************************************
232 * get_boot_type() - Is this an XIP type device or a stream one
233 * bits 4-0 specify type. Bit 5 says mem/perif
234 ***************************************************************/
235 u32 get_boot_type(void)
237 return (readl(&ctrl_base->status) & SYSBOOT_MASK);
240 #ifdef CONFIG_DISPLAY_CPUINFO
242 * Print CPU information
244 int print_cpuinfo (void)
246 char *cpu_family_s, *cpu_s, *sec_s, *max_clk;
248 switch (get_cpu_family()) {
250 cpu_family_s = "OMAP";
251 switch (get_cpu_type()) {
268 if ((get_cpu_rev() >= CPU_3XX_ES31) &&
269 (get_sku_id() == SKUID_CLK_720MHZ))
277 switch (get_cpu_type()) {
291 switch (get_cpu_type()) {
313 cpu_family_s = "OMAP";
318 cpu_family_s = "OMAP";
323 cpu_family_s = "OMAP";
328 cpu_family_s = "OMAP";
333 cpu_family_s = "OMAP/AM";
341 cpu_family_s = "OMAP";
346 switch (get_device_type()) {
363 if (CPU_OMAP36XX == get_cpu_family())
364 printf("%s%s-%s ES%s, CPU-OPP2, L3-200MHz, Max CPU Clock %s\n",
365 cpu_family_s, cpu_s, sec_s,
366 rev_s_37xx[get_cpu_rev()], max_clk);
368 printf("%s%s-%s ES%s, CPU-OPP2, L3-165MHz, Max CPU Clock %s\n",
369 cpu_family_s, cpu_s, sec_s,
370 rev_s[get_cpu_rev()], max_clk);
374 #endif /* CONFIG_DISPLAY_CPUINFO */