2 * linux/arch/arm/mach-omap2/clock.c
4 * Copyright (C) 2005-2008 Texas Instruments, Inc.
5 * Copyright (C) 2004-2010 Nokia Corporation
8 * Richard Woodruff <r-woodruff2@ti.com>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
17 #include <linux/kernel.h>
18 #include <linux/export.h>
19 #include <linux/list.h>
20 #include <linux/errno.h>
21 #include <linux/err.h>
22 #include <linux/delay.h>
23 #include <linux/clk.h>
25 #include <linux/bitops.h>
29 #include <plat/prcm.h>
31 #include <trace/events/power.h>
34 #include "clockdomain.h"
38 #include "cm-regbits-24xx.h"
39 #include "cm-regbits-34xx.h"
44 * clkdm_control: if true, then when a clock is enabled in the
45 * hardware, its clockdomain will first be enabled; and when a clock
46 * is disabled in the hardware, its clockdomain will be disabled
49 static bool clkdm_control = true;
51 static LIST_HEAD(clocks);
52 static DEFINE_MUTEX(clocks_mutex);
53 static DEFINE_SPINLOCK(clockfw_lock);
56 * OMAP2+ specific clock functions
59 /* Private functions */
62 * _omap2_module_wait_ready - wait for an OMAP module to leave IDLE
63 * @clk: struct clk * belonging to the module
65 * If the necessary clocks for the OMAP hardware IP block that
66 * corresponds to clock @clk are enabled, then wait for the module to
67 * indicate readiness (i.e., to leave IDLE). This code does not
68 * belong in the clock code and will be moved in the medium term to
69 * module-dependent code. No return value.
71 static void _omap2_module_wait_ready(struct clk *clk)
73 void __iomem *companion_reg, *idlest_reg;
74 u8 other_bit, idlest_bit, idlest_val;
76 /* Not all modules have multiple clocks that their IDLEST depends on */
77 if (clk->ops->find_companion) {
78 clk->ops->find_companion(clk, &companion_reg, &other_bit);
79 if (!(__raw_readl(companion_reg) & (1 << other_bit)))
83 clk->ops->find_idlest(clk, &idlest_reg, &idlest_bit, &idlest_val);
85 omap2_cm_wait_idlest(idlest_reg, (1 << idlest_bit), idlest_val,
89 /* Public functions */
92 * omap2_init_clk_clkdm - look up a clockdomain name, store pointer in clk
93 * @clk: OMAP clock struct ptr to use
95 * Convert a clockdomain name stored in a struct clk 'clk' into a
96 * clockdomain pointer, and save it into the struct clk. Intended to be
97 * called during clk_register(). No return value.
99 void omap2_init_clk_clkdm(struct clk *clk)
101 struct clockdomain *clkdm;
102 const char *clk_name;
104 if (!clk->clkdm_name)
107 clk_name = __clk_get_name(clk);
109 clkdm = clkdm_lookup(clk->clkdm_name);
111 pr_debug("clock: associated clk %s to clkdm %s\n",
112 clk_name, clk->clkdm_name);
115 pr_debug("clock: could not associate clk %s to clkdm %s\n",
116 clk_name, clk->clkdm_name);
121 * omap2_clk_disable_clkdm_control - disable clkdm control on clk enable/disable
123 * Prevent the OMAP clock code from calling into the clockdomain code
124 * when a hardware clock in that clockdomain is enabled or disabled.
125 * Intended to be called at init time from omap*_clk_init(). No
128 void __init omap2_clk_disable_clkdm_control(void)
130 clkdm_control = false;
134 * omap2_clk_dflt_find_companion - find companion clock to @clk
135 * @clk: struct clk * to find the companion clock of
136 * @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in
137 * @other_bit: u8 ** to return the companion clock bit shift in
139 * Note: We don't need special code here for INVERT_ENABLE for the
140 * time being since INVERT_ENABLE only applies to clocks enabled by
143 * Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes it's
144 * just a matter of XORing the bits.
146 * Some clocks don't have companion clocks. For example, modules with
147 * only an interface clock (such as MAILBOXES) don't have a companion
148 * clock. Right now, this code relies on the hardware exporting a bit
149 * in the correct companion register that indicates that the
150 * nonexistent 'companion clock' is active. Future patches will
151 * associate this type of code with per-module data structures to
152 * avoid this issue, and remove the casts. No return value.
154 void omap2_clk_dflt_find_companion(struct clk *clk, void __iomem **other_reg,
160 * Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes
161 * it's just a matter of XORing the bits.
163 r = ((__force u32)clk->enable_reg ^ (CM_FCLKEN ^ CM_ICLKEN));
165 *other_reg = (__force void __iomem *)r;
166 *other_bit = clk->enable_bit;
170 * omap2_clk_dflt_find_idlest - find CM_IDLEST reg va, bit shift for @clk
171 * @clk: struct clk * to find IDLEST info for
172 * @idlest_reg: void __iomem ** to return the CM_IDLEST va in
173 * @idlest_bit: u8 * to return the CM_IDLEST bit shift in
174 * @idlest_val: u8 * to return the idle status indicator
176 * Return the CM_IDLEST register address and bit shift corresponding
177 * to the module that "owns" this clock. This default code assumes
178 * that the CM_IDLEST bit shift is the CM_*CLKEN bit shift, and that
179 * the IDLEST register address ID corresponds to the CM_*CLKEN
180 * register address ID (e.g., that CM_FCLKEN2 corresponds to
181 * CM_IDLEST2). This is not true for all modules. No return value.
183 void omap2_clk_dflt_find_idlest(struct clk *clk, void __iomem **idlest_reg,
184 u8 *idlest_bit, u8 *idlest_val)
188 r = (((__force u32)clk->enable_reg & ~0xf0) | 0x20);
189 *idlest_reg = (__force void __iomem *)r;
190 *idlest_bit = clk->enable_bit;
193 * 24xx uses 0 to indicate not ready, and 1 to indicate ready.
194 * 34xx reverses this, just to keep us on our toes
195 * AM35xx uses both, depending on the module.
197 if (cpu_is_omap24xx())
198 *idlest_val = OMAP24XX_CM_IDLEST_VAL;
199 else if (cpu_is_omap34xx())
200 *idlest_val = OMAP34XX_CM_IDLEST_VAL;
206 int omap2_dflt_clk_enable(struct clk *clk)
210 if (unlikely(clk->enable_reg == NULL)) {
211 pr_err("clock.c: Enable for %s without enable code\n",
213 return 0; /* REVISIT: -EINVAL */
216 v = __raw_readl(clk->enable_reg);
217 if (clk->flags & INVERT_ENABLE)
218 v &= ~(1 << clk->enable_bit);
220 v |= (1 << clk->enable_bit);
221 __raw_writel(v, clk->enable_reg);
222 v = __raw_readl(clk->enable_reg); /* OCP barrier */
224 if (clk->ops->find_idlest)
225 _omap2_module_wait_ready(clk);
230 void omap2_dflt_clk_disable(struct clk *clk)
234 if (!clk->enable_reg) {
236 * 'Independent' here refers to a clock which is not
237 * controlled by its parent.
239 pr_err("clock: clk_disable called on independent clock %s which has no enable_reg\n", clk->name);
243 v = __raw_readl(clk->enable_reg);
244 if (clk->flags & INVERT_ENABLE)
245 v |= (1 << clk->enable_bit);
247 v &= ~(1 << clk->enable_bit);
248 __raw_writel(v, clk->enable_reg);
249 /* No OCP barrier needed here since it is a disable operation */
252 const struct clkops clkops_omap2_dflt_wait = {
253 .enable = omap2_dflt_clk_enable,
254 .disable = omap2_dflt_clk_disable,
255 .find_companion = omap2_clk_dflt_find_companion,
256 .find_idlest = omap2_clk_dflt_find_idlest,
259 const struct clkops clkops_omap2_dflt = {
260 .enable = omap2_dflt_clk_enable,
261 .disable = omap2_dflt_clk_disable,
265 * omap2_clk_disable - disable a clock, if the system is not using it
266 * @clk: struct clk * to disable
268 * Decrements the usecount on struct clk @clk. If there are no users
269 * left, call the clkops-specific clock disable function to disable it
270 * in hardware. If the clock is part of a clockdomain (which they all
271 * should be), request that the clockdomain be disabled. (It too has
272 * a usecount, and so will not be disabled in the hardware until it no
273 * longer has any users.) If the clock has a parent clock (most of
274 * them do), then call ourselves, recursing on the parent clock. This
275 * can cause an entire branch of the clock tree to be powered off by
276 * simply disabling one clock. Intended to be called with the clockfw_lock
277 * spinlock held. No return value.
279 void omap2_clk_disable(struct clk *clk)
281 if (clk->usecount == 0) {
282 WARN(1, "clock: %s: omap2_clk_disable() called, but usecount already 0?", clk->name);
286 pr_debug("clock: %s: decrementing usecount\n", clk->name);
290 if (clk->usecount > 0)
293 pr_debug("clock: %s: disabling in hardware\n", clk->name);
295 if (clk->ops && clk->ops->disable) {
296 trace_clock_disable(clk->name, 0, smp_processor_id());
297 clk->ops->disable(clk);
300 if (clkdm_control && clk->clkdm)
301 clkdm_clk_disable(clk->clkdm, clk);
304 omap2_clk_disable(clk->parent);
308 * omap2_clk_enable - request that the system enable a clock
309 * @clk: struct clk * to enable
311 * Increments the usecount on struct clk @clk. If there were no users
312 * previously, then recurse up the clock tree, enabling all of the
313 * clock's parents and all of the parent clockdomains, and finally,
314 * enabling @clk's clockdomain, and @clk itself. Intended to be
315 * called with the clockfw_lock spinlock held. Returns 0 upon success
316 * or a negative error code upon failure.
318 int omap2_clk_enable(struct clk *clk)
322 pr_debug("clock: %s: incrementing usecount\n", clk->name);
326 if (clk->usecount > 1)
329 pr_debug("clock: %s: enabling in hardware\n", clk->name);
332 ret = omap2_clk_enable(clk->parent);
334 WARN(1, "clock: %s: could not enable parent %s: %d\n",
335 clk->name, clk->parent->name, ret);
340 if (clkdm_control && clk->clkdm) {
341 ret = clkdm_clk_enable(clk->clkdm, clk);
343 WARN(1, "clock: %s: could not enable clockdomain %s: %d\n",
344 clk->name, clk->clkdm->name, ret);
349 if (clk->ops && clk->ops->enable) {
350 trace_clock_enable(clk->name, 1, smp_processor_id());
351 ret = clk->ops->enable(clk);
353 WARN(1, "clock: %s: could not enable: %d\n",
362 if (clkdm_control && clk->clkdm)
363 clkdm_clk_disable(clk->clkdm, clk);
366 omap2_clk_disable(clk->parent);
373 /* Given a clock and a rate apply a clock specific rounding function */
374 long omap2_clk_round_rate(struct clk *clk, unsigned long rate)
377 return clk->round_rate(clk, rate);
382 /* Set the clock rate for a clock source */
383 int omap2_clk_set_rate(struct clk *clk, unsigned long rate)
387 pr_debug("clock: set_rate for clock %s to rate %ld\n", clk->name, rate);
389 /* dpll_ck, core_ck, virt_prcm_set; plus all clksel clocks */
391 trace_clock_set_rate(clk->name, rate, smp_processor_id());
392 ret = clk->set_rate(clk, rate);
398 int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
403 if (clk->parent == new_parent)
406 return omap2_clksel_set_parent(clk, new_parent);
410 * OMAP2+ clock reset and init functions
413 #ifdef CONFIG_OMAP_RESET_CLOCKS
414 void omap2_clk_disable_unused(struct clk *clk)
418 v = (clk->flags & INVERT_ENABLE) ? (1 << clk->enable_bit) : 0;
420 regval32 = __raw_readl(clk->enable_reg);
421 if ((regval32 & (1 << clk->enable_bit)) == v)
424 pr_debug("Disabling unused clock \"%s\"\n", clk->name);
425 if (cpu_is_omap34xx()) {
426 omap2_clk_enable(clk);
427 omap2_clk_disable(clk);
429 clk->ops->disable(clk);
431 if (clk->clkdm != NULL)
432 pwrdm_state_switch(clk->clkdm->pwrdm.ptr);
437 * omap2_clk_switch_mpurate_at_boot - switch ARM MPU rate by boot-time argument
438 * @mpurate_ck_name: clk name of the clock to change rate
440 * Change the ARM MPU clock rate to the rate specified on the command
441 * line, if one was specified. @mpurate_ck_name should be
442 * "virt_prcm_set" on OMAP2xxx and "dpll1_ck" on OMAP34xx/OMAP36xx.
443 * XXX Does not handle voltage scaling - on OMAP2xxx this is currently
444 * handled by the virt_prcm_set clock, but this should be handled by
445 * the OPP layer. XXX This is intended to be handled by the OPP layer
446 * code in the near future and should be removed from the clock code.
447 * Returns -EINVAL if 'mpurate' is zero or if clk_set_rate() rejects
448 * the rate, -ENOENT if the struct clk referred to by @mpurate_ck_name
449 * cannot be found, or 0 upon success.
451 int __init omap2_clk_switch_mpurate_at_boot(const char *mpurate_ck_name)
453 struct clk *mpurate_ck;
459 mpurate_ck = clk_get(NULL, mpurate_ck_name);
460 if (WARN(IS_ERR(mpurate_ck), "Failed to get %s.\n", mpurate_ck_name))
463 r = clk_set_rate(mpurate_ck, mpurate);
464 if (IS_ERR_VALUE(r)) {
465 WARN(1, "clock: %s: unable to set MPU rate to %d: %d\n",
466 mpurate_ck->name, mpurate, r);
472 recalculate_root_clocks();
480 * omap2_clk_print_new_rates - print summary of current clock tree rates
481 * @hfclkin_ck_name: clk name for the off-chip HF oscillator
482 * @core_ck_name: clk name for the on-chip CORE_CLK
483 * @mpu_ck_name: clk name for the ARM MPU clock
485 * Prints a short message to the console with the HFCLKIN oscillator
486 * rate, the rate of the CORE clock, and the rate of the ARM MPU clock.
487 * Called by the boot-time MPU rate switching code. XXX This is intended
488 * to be handled by the OPP layer code in the near future and should be
489 * removed from the clock code. No return value.
491 void __init omap2_clk_print_new_rates(const char *hfclkin_ck_name,
492 const char *core_ck_name,
493 const char *mpu_ck_name)
495 struct clk *hfclkin_ck, *core_ck, *mpu_ck;
496 unsigned long hfclkin_rate;
498 mpu_ck = clk_get(NULL, mpu_ck_name);
499 if (WARN(IS_ERR(mpu_ck), "clock: failed to get %s.\n", mpu_ck_name))
502 core_ck = clk_get(NULL, core_ck_name);
503 if (WARN(IS_ERR(core_ck), "clock: failed to get %s.\n", core_ck_name))
506 hfclkin_ck = clk_get(NULL, hfclkin_ck_name);
507 if (WARN(IS_ERR(hfclkin_ck), "Failed to get %s.\n", hfclkin_ck_name))
510 hfclkin_rate = clk_get_rate(hfclkin_ck);
512 pr_info("Switched to new clocking rate (Crystal/Core/MPU): %ld.%01ld/%ld/%ld MHz\n",
513 (hfclkin_rate / 1000000), ((hfclkin_rate / 100000) % 10),
514 (clk_get_rate(core_ck) / 1000000),
515 (clk_get_rate(mpu_ck) / 1000000));
520 int clk_enable(struct clk *clk)
525 if (clk == NULL || IS_ERR(clk))
528 spin_lock_irqsave(&clockfw_lock, flags);
529 ret = omap2_clk_enable(clk);
530 spin_unlock_irqrestore(&clockfw_lock, flags);
534 EXPORT_SYMBOL(clk_enable);
536 void clk_disable(struct clk *clk)
540 if (clk == NULL || IS_ERR(clk))
543 spin_lock_irqsave(&clockfw_lock, flags);
544 if (clk->usecount == 0) {
545 pr_err("Trying disable clock %s with 0 usecount\n",
551 omap2_clk_disable(clk);
554 spin_unlock_irqrestore(&clockfw_lock, flags);
556 EXPORT_SYMBOL(clk_disable);
558 unsigned long clk_get_rate(struct clk *clk)
563 if (clk == NULL || IS_ERR(clk))
566 spin_lock_irqsave(&clockfw_lock, flags);
568 spin_unlock_irqrestore(&clockfw_lock, flags);
572 EXPORT_SYMBOL(clk_get_rate);
575 * Optional clock functions defined in include/linux/clk.h
578 long clk_round_rate(struct clk *clk, unsigned long rate)
583 if (clk == NULL || IS_ERR(clk))
586 spin_lock_irqsave(&clockfw_lock, flags);
587 ret = omap2_clk_round_rate(clk, rate);
588 spin_unlock_irqrestore(&clockfw_lock, flags);
592 EXPORT_SYMBOL(clk_round_rate);
594 int clk_set_rate(struct clk *clk, unsigned long rate)
599 if (clk == NULL || IS_ERR(clk))
602 spin_lock_irqsave(&clockfw_lock, flags);
603 ret = omap2_clk_set_rate(clk, rate);
606 spin_unlock_irqrestore(&clockfw_lock, flags);
610 EXPORT_SYMBOL(clk_set_rate);
612 int clk_set_parent(struct clk *clk, struct clk *parent)
617 if (clk == NULL || IS_ERR(clk) || parent == NULL || IS_ERR(parent))
620 spin_lock_irqsave(&clockfw_lock, flags);
621 if (clk->usecount == 0) {
622 ret = omap2_clk_set_parent(clk, parent);
628 spin_unlock_irqrestore(&clockfw_lock, flags);
632 EXPORT_SYMBOL(clk_set_parent);
634 struct clk *clk_get_parent(struct clk *clk)
638 EXPORT_SYMBOL(clk_get_parent);
641 * OMAP specific clock functions shared between omap1 and omap2
644 int __initdata mpurate;
647 * By default we use the rate set by the bootloader.
648 * You can override this with mpurate= cmdline option.
650 static int __init omap_clk_setup(char *str)
652 get_option(&str, &mpurate);
662 __setup("mpurate=", omap_clk_setup);
664 /* Used for clocks that always have same value as the parent clock */
665 unsigned long followparent_recalc(struct clk *clk)
667 return clk->parent->rate;
671 * Used for clocks that have the same value as the parent clock,
672 * divided by some factor
674 unsigned long omap_fixed_divisor_recalc(struct clk *clk)
676 WARN_ON(!clk->fixed_div);
678 return clk->parent->rate / clk->fixed_div;
681 void clk_reparent(struct clk *child, struct clk *parent)
683 list_del_init(&child->sibling);
685 list_add(&child->sibling, &parent->children);
686 child->parent = parent;
688 /* now do the debugfs renaming to reattach the child
689 to the proper parent */
692 /* Propagate rate to children */
693 void propagate_rate(struct clk *tclk)
697 list_for_each_entry(clkp, &tclk->children, sibling) {
699 clkp->rate = clkp->recalc(clkp);
700 propagate_rate(clkp);
704 static LIST_HEAD(root_clks);
707 * recalculate_root_clocks - recalculate and propagate all root clocks
709 * Recalculates all root clocks (clocks with no parent), which if the
710 * clock's .recalc is set correctly, should also propagate their rates.
713 void recalculate_root_clocks(void)
717 list_for_each_entry(clkp, &root_clks, sibling) {
719 clkp->rate = clkp->recalc(clkp);
720 propagate_rate(clkp);
725 * clk_preinit - initialize any fields in the struct clk before clk init
726 * @clk: struct clk * to initialize
728 * Initialize any struct clk fields needed before normal clk initialization
729 * can run. No return value.
731 void clk_preinit(struct clk *clk)
733 INIT_LIST_HEAD(&clk->children);
736 int clk_register(struct clk *clk)
738 if (clk == NULL || IS_ERR(clk))
742 * trap out already registered clocks
744 if (clk->node.next || clk->node.prev)
747 mutex_lock(&clocks_mutex);
749 list_add(&clk->sibling, &clk->parent->children);
751 list_add(&clk->sibling, &root_clks);
753 list_add(&clk->node, &clocks);
756 mutex_unlock(&clocks_mutex);
760 EXPORT_SYMBOL(clk_register);
762 void clk_unregister(struct clk *clk)
764 if (clk == NULL || IS_ERR(clk))
767 mutex_lock(&clocks_mutex);
768 list_del(&clk->sibling);
769 list_del(&clk->node);
770 mutex_unlock(&clocks_mutex);
772 EXPORT_SYMBOL(clk_unregister);
774 void clk_enable_init_clocks(void)
778 list_for_each_entry(clkp, &clocks, node)
779 if (clkp->flags & ENABLE_ON_INIT)
784 * omap_clk_get_by_name - locate OMAP struct clk by its name
785 * @name: name of the struct clk to locate
787 * Locate an OMAP struct clk by its name. Assumes that struct clk
788 * names are unique. Returns NULL if not found or a pointer to the
789 * struct clk if found.
791 struct clk *omap_clk_get_by_name(const char *name)
794 struct clk *ret = NULL;
796 mutex_lock(&clocks_mutex);
798 list_for_each_entry(c, &clocks, node) {
799 if (!strcmp(c->name, name)) {
805 mutex_unlock(&clocks_mutex);
810 int omap_clk_enable_autoidle_all(void)
815 spin_lock_irqsave(&clockfw_lock, flags);
817 list_for_each_entry(c, &clocks, node)
818 if (c->ops->allow_idle)
819 c->ops->allow_idle(c);
821 spin_unlock_irqrestore(&clockfw_lock, flags);
826 int omap_clk_disable_autoidle_all(void)
831 spin_lock_irqsave(&clockfw_lock, flags);
833 list_for_each_entry(c, &clocks, node)
834 if (c->ops->deny_idle)
835 c->ops->deny_idle(c);
837 spin_unlock_irqrestore(&clockfw_lock, flags);
845 static int clkll_enable_null(struct clk *clk)
850 static void clkll_disable_null(struct clk *clk)
854 const struct clkops clkops_null = {
855 .enable = clkll_enable_null,
856 .disable = clkll_disable_null,
862 * Used for clock aliases that are needed on some OMAPs, but not others
864 struct clk dummy_ck = {
873 #ifdef CONFIG_OMAP_RESET_CLOCKS
875 * Disable any unused clocks left on by the bootloader
877 static int __init clk_disable_unused(void)
882 pr_info("clock: disabling unused clocks to save power\n");
884 spin_lock_irqsave(&clockfw_lock, flags);
885 list_for_each_entry(ck, &clocks, node) {
886 if (ck->ops == &clkops_null)
889 if (ck->usecount > 0 || !ck->enable_reg)
892 omap2_clk_disable_unused(ck);
894 spin_unlock_irqrestore(&clockfw_lock, flags);
898 late_initcall(clk_disable_unused);
899 late_initcall(omap_clk_enable_autoidle_all);
902 #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
904 * debugfs support to trace clock tree hierarchy and attributes
907 #include <linux/debugfs.h>
908 #include <linux/seq_file.h>
910 static struct dentry *clk_debugfs_root;
912 static int clk_dbg_show_summary(struct seq_file *s, void *unused)
917 mutex_lock(&clocks_mutex);
918 seq_printf(s, "%-30s %-30s %-10s %s\n",
919 "clock-name", "parent-name", "rate", "use-count");
921 list_for_each_entry(c, &clocks, node) {
923 seq_printf(s, "%-30s %-30s %-10lu %d\n",
924 c->name, pa ? pa->name : "none", c->rate,
927 mutex_unlock(&clocks_mutex);
932 static int clk_dbg_open(struct inode *inode, struct file *file)
934 return single_open(file, clk_dbg_show_summary, inode->i_private);
937 static const struct file_operations debug_clock_fops = {
938 .open = clk_dbg_open,
941 .release = single_release,
944 static int clk_debugfs_register_one(struct clk *c)
948 struct clk *pa = c->parent;
950 d = debugfs_create_dir(c->name, pa ? pa->dent : clk_debugfs_root);
955 d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount);
960 d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);
965 d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags);
973 debugfs_remove_recursive(c->dent);
977 static int clk_debugfs_register(struct clk *c)
980 struct clk *pa = c->parent;
982 if (pa && !pa->dent) {
983 err = clk_debugfs_register(pa);
989 err = clk_debugfs_register_one(c);
996 static int __init clk_debugfs_init(void)
1002 d = debugfs_create_dir("clock", NULL);
1005 clk_debugfs_root = d;
1007 list_for_each_entry(c, &clocks, node) {
1008 err = clk_debugfs_register(c);
1013 d = debugfs_create_file("summary", S_IRUGO,
1014 d, NULL, &debug_clock_fops);
1020 debugfs_remove_recursive(clk_debugfs_root);
1023 late_initcall(clk_debugfs_init);
1025 #endif /* defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) */