arm: Introduce arch/arm/mach-omap2 for OMAP2 derivative platforms
[platform/kernel/u-boot.git] / arch / arm / mach-omap2 / am33xx / sys_info.c
1 /*
2  * sys_info.c
3  *
4  * System information functions
5  *
6  * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
7  *
8  * Derived from Beagle Board and 3430 SDP code by
9  *      Richard Woodruff <r-woodruff2@ti.com>
10  *      Syed Mohammed Khasim <khasim@ti.com>
11  *
12  * SPDX-License-Identifier:     GPL-2.0+
13  */
14
15 #include <common.h>
16 #include <asm/io.h>
17 #include <asm/arch/sys_proto.h>
18 #include <asm/arch/cpu.h>
19 #include <asm/arch/clock.h>
20 #include <power/tps65910.h>
21 #include <linux/compiler.h>
22
23 struct ctrl_stat *cstat = (struct ctrl_stat *)CTRL_BASE;
24
25 /**
26  * get_cpu_rev(void) - extract rev info
27  */
28 u32 get_cpu_rev(void)
29 {
30         u32 id;
31         u32 rev;
32
33         id = readl(DEVICE_ID);
34         rev = (id >> 28) & 0xff;
35
36         return rev;
37 }
38
39 /**
40  * get_cpu_type(void) - extract cpu info
41  */
42 u32 get_cpu_type(void)
43 {
44         u32 id = 0;
45         u32 partnum;
46
47         id = readl(DEVICE_ID);
48         partnum = (id >> 12) & 0xffff;
49
50         return partnum;
51 }
52
53 /**
54  * get_device_type(): tell if GP/HS/EMU/TST
55  */
56 u32 get_device_type(void)
57 {
58         int mode;
59         mode = readl(&cstat->statusreg) & (DEVICE_MASK);
60         return mode >>= 8;
61 }
62
63 /**
64  * get_sysboot_value(void) - return SYS_BOOT[4:0]
65  */
66 u32 get_sysboot_value(void)
67 {
68         return readl(&cstat->statusreg) & SYSBOOT_MASK;
69 }
70
71 #ifdef CONFIG_DISPLAY_CPUINFO
72 static char *cpu_revs[] = {
73                 "1.0",
74                 "2.0",
75                 "2.1"};
76
77
78 static char *dev_types[] = {
79                 "TST",
80                 "EMU",
81                 "HS",
82                 "GP"};
83
84 /**
85  * Print CPU information
86  */
87 int print_cpuinfo(void)
88 {
89         char *cpu_s, *sec_s, *rev_s;
90
91         switch (get_cpu_type()) {
92         case AM335X:
93                 cpu_s = "AM335X";
94                 break;
95         case TI81XX:
96                 cpu_s = "TI81XX";
97                 break;
98         case AM437X:
99                 cpu_s = "AM437X";
100                 break;
101         default:
102                 cpu_s = "Unknown CPU type";
103                 break;
104         }
105
106         if (get_cpu_rev() < ARRAY_SIZE(cpu_revs))
107                 rev_s = cpu_revs[get_cpu_rev()];
108         else
109                 rev_s = "?";
110
111         if (get_device_type() < ARRAY_SIZE(dev_types))
112                 sec_s = dev_types[get_device_type()];
113         else
114                 sec_s = "?";
115
116         printf("CPU  : %s-%s rev %s\n", cpu_s, sec_s, rev_s);
117
118         return 0;
119 }
120 #endif  /* CONFIG_DISPLAY_CPUINFO */
121
122 #ifdef CONFIG_AM33XX
123 int am335x_get_efuse_mpu_max_freq(struct ctrl_dev *cdev)
124 {
125         int sil_rev;
126
127         sil_rev = readl(&cdev->deviceid) >> 28;
128
129         if (sil_rev == 1)
130                 /* PG 2.0, efuse may not be set. */
131                 return MPUPLL_M_800;
132         else if (sil_rev >= 2) {
133                 /* Check what the efuse says our max speed is. */
134                 int efuse_arm_mpu_max_freq;
135                 efuse_arm_mpu_max_freq = readl(&cdev->efuse_sma);
136                 switch ((efuse_arm_mpu_max_freq & DEVICE_ID_MASK)) {
137                 case AM335X_ZCZ_1000:
138                         return MPUPLL_M_1000;
139                 case AM335X_ZCZ_800:
140                         return MPUPLL_M_800;
141                 case AM335X_ZCZ_720:
142                         return MPUPLL_M_720;
143                 case AM335X_ZCZ_600:
144                 case AM335X_ZCE_600:
145                         return MPUPLL_M_600;
146                 case AM335X_ZCZ_300:
147                 case AM335X_ZCE_300:
148                         return MPUPLL_M_300;
149                 }
150         }
151
152         /* PG 1.0 or otherwise unknown, use the PG1.0 max */
153         return MPUPLL_M_720;
154 }
155
156 int am335x_get_tps65910_mpu_vdd(int sil_rev, int frequency)
157 {
158         /* For PG2.1 and later, we have one set of values. */
159         if (sil_rev >= 2) {
160                 switch (frequency) {
161                 case MPUPLL_M_1000:
162                         return TPS65910_OP_REG_SEL_1_3_2_5;
163                 case MPUPLL_M_800:
164                         return TPS65910_OP_REG_SEL_1_2_6;
165                 case MPUPLL_M_720:
166                         return TPS65910_OP_REG_SEL_1_2_0;
167                 case MPUPLL_M_600:
168                 case MPUPLL_M_300:
169                         return TPS65910_OP_REG_SEL_1_1_3;
170                 }
171         }
172
173         /* Default to PG1.0/PG2.0 values. */
174         return TPS65910_OP_REG_SEL_1_1_3;
175 }
176 #endif