4 prompt "OMAP2+ platform select"
9 select ARM_CORTEX_A8_CVE_2017_5715
10 select ARM_ERRATA_430973
11 select ARM_ERRATA_454179
12 select ARM_ERRATA_621766
13 select ARM_ERRATA_725233
14 select SPL_USE_TINY_PRINTF if SPL
20 imply SPL_LIBCOMMON_SUPPORT
21 imply SPL_LIBDISK_SUPPORT
22 imply SPL_LIBGENERIC_SUPPORT
24 imply SPL_NAND_SUPPORT
25 imply SPL_OMAP3_ID_NAND
28 imply SYS_I2C_OMAP24XX
34 select SPL_USE_TINY_PRINTF
37 imply SPL_DISPLAY_PRINT
42 imply SPL_LIBCOMMON_SUPPORT
43 imply SPL_LIBDISK_SUPPORT
44 imply SPL_LIBGENERIC_SUPPORT
47 imply SPL_NAND_SUPPORT
50 imply SYS_I2C_OMAP24XX
55 select ARM_CORTEX_A15_CVE_2017_5715
56 select ARM_ERRATA_798870
57 select SYS_THUMB_BUILD
60 imply SPL_DISPLAY_PRINT
66 imply SPL_LIBCOMMON_SUPPORT
67 imply SPL_LIBDISK_SUPPORT
68 imply SPL_LIBGENERIC_SUPPORT
70 imply SPL_NAND_AM33XX_BCH
71 imply SPL_NAND_AM33XX_BCH
72 imply SPL_NAND_SUPPORT
75 imply SYS_I2C_OMAP24XX
79 select SPECIFY_CONSOLE_INDEX
81 Support for AM335x SOC from Texas Instruments.
82 The AM335x high performance SOC features a Cortex-A8
87 select SPECIFY_CONSOLE_INDEX
91 Support for AM335x SOC from Texas Instruments.
92 The AM335x high performance SOC features a Cortex-A8
97 select SPECIFY_CONSOLE_INDEX
101 imply SPL_DM_SEQ_ALIAS
102 imply SPL_NAND_AM33XX_BCH
103 imply SPL_NAND_SUPPORT
105 imply SPL_OF_TRANSLATE
106 imply SPL_SEPARATE_BSS
107 imply SPL_SYS_MALLOC_SIMPLE
108 imply SYS_I2C_OMAP24XX
109 imply SYS_THUMB_BUILD
111 Support for AM43xx SOC from Texas Instruments.
112 The AM43xx high performance SOC features a Cortex-A9
113 ARM core, a quad core PRU-ICSS for industrial Ethernet
114 protocols, dual camera support, optional 3D graphics
115 and an optional customer programmable secure boot.
119 select ARM_CORTEX_A8_CVE_2017_5715
120 select SPECIFY_CONSOLE_INDEX
123 imply SKIP_LOWLEVEL_INIT
124 imply SPL_NAND_AM33XX_BCH
125 imply SPL_NAND_SUPPORT
126 imply SYS_I2C_OMAP24XX
127 imply SYS_THUMB_BUILD
128 imply SPL_USE_TINY_PRINTF
130 Support for AM335x SOC from Texas Instruments.
131 The AM335x high performance SOC features a Cortex-A8
132 ARM core, a dual core PRU-ICSS for industrial Ethernet
133 protocols, optional 3D graphics and an optional customer
134 programmable secure boot.
143 Defines the MPU clock speed (in MHz).
145 config TI_SECURE_EMIF_REGION_START
146 hex "Reserved EMIF region start address"
147 depends on TI_SECURE_DEVICE
150 Reserved EMIF region start address. Set to "0" to auto-select
151 to be at the end of the external memory region.
153 config TI_SECURE_EMIF_TOTAL_REGION_SIZE
154 hex "Reserved EMIF region size"
155 depends on TI_SECURE_DEVICE
158 Total reserved EMIF region size. Default is 0, which means no reserved EMIF
159 region on secure devices.
161 config TI_SECURE_EMIF_PROTECTED_REGION_SIZE
162 hex "Size of protected region within reserved EMIF region"
163 depends on TI_SECURE_DEVICE
166 This config option is used to specify the size of the portion of the total
167 reserved EMIF region set aside for secure OS needs that will be protected
168 using hardware memory firewalls. This value must be smaller than the
169 TI_SECURE_EMIF_TOTAL_REGION_SIZE value.
171 source "arch/arm/mach-omap2/omap3/Kconfig"
173 source "arch/arm/mach-omap2/omap4/Kconfig"
175 source "arch/arm/mach-omap2/omap5/Kconfig"
177 source "arch/arm/mach-omap2/am33xx/Kconfig"
179 source "board/BuR/brxre1/Kconfig"
180 source "board/BuR/brsmarc1/Kconfig"
181 source "board/BuR/brppt1/Kconfig"
182 source "board/siemens/draco/Kconfig"
183 source "board/siemens/pxm2/Kconfig"
184 source "board/siemens/rut/Kconfig"
185 source "board/ti/ti816x/Kconfig"
186 source "board/ti/am43xx/Kconfig"
187 source "board/ti/am335x/Kconfig"
188 source "board/compulab/cm_t335/Kconfig"
189 source "board/compulab/cm_t43/Kconfig"
190 source "board/phytec/phycore_am335x_r2/Kconfig"
193 default "arch/arm/mach-omap2/u-boot-spl.lds"