arch/arm/mach-omap1/board-fsample.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * linux/arch/arm/mach-omap1/board-fsample.c
   4  *
   5  * Modified from board-perseus2.c
   6  *
   7  * Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
   8  * Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
   9  */
  10 #include <linux/gpio.h>
  11 #include <linux/kernel.h>
  12 #include <linux/init.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/delay.h>
  15 #include <linux/mtd/mtd.h>
  16 #include <linux/mtd/platnand.h>
  17 #include <linux/mtd/physmap.h>
  18 #include <linux/input.h>
  19 #include <linux/smc91x.h>
  20 #include <linux/omapfb.h>
  21
  22 #include <asm/mach-types.h>
  23 #include <asm/mach/arch.h>
  24 #include <asm/mach/map.h>
  25
  26 #include <mach/tc.h>
  27 #include <mach/mux.h>
  28 #include "flash.h"
  29 #include <linux/platform_data/keypad-omap.h>
  30
  31 #include <mach/hardware.h>
  32
  33 #include "iomap.h"
  34 #include "common.h"
  35 #include "fpga.h"
  36
  37 /* fsample is pretty close to p2-sample */
  38
  39 #define fsample_cpld_read(reg) __raw_readb(reg)
  40 #define fsample_cpld_write(val, reg) __raw_writeb(val, reg)
  41
  42 #define FSAMPLE_CPLD_BASE    0xE8100000
  43 #define FSAMPLE_CPLD_SIZE    SZ_4K
  44 #define FSAMPLE_CPLD_START   0x05080000
  45
  46 #define FSAMPLE_CPLD_REG_A   (FSAMPLE_CPLD_BASE + 0x00)
  47 #define FSAMPLE_CPLD_SWITCH  (FSAMPLE_CPLD_BASE + 0x02)
  48 #define FSAMPLE_CPLD_UART    (FSAMPLE_CPLD_BASE + 0x02)
  49 #define FSAMPLE_CPLD_REG_B   (FSAMPLE_CPLD_BASE + 0x04)
  50 #define FSAMPLE_CPLD_VERSION (FSAMPLE_CPLD_BASE + 0x06)
  51 #define FSAMPLE_CPLD_SET_CLR (FSAMPLE_CPLD_BASE + 0x06)
  52
  53 #define FSAMPLE_CPLD_BIT_BT_RESET         0
  54 #define FSAMPLE_CPLD_BIT_LCD_RESET        1
  55 #define FSAMPLE_CPLD_BIT_CAM_PWDN         2
  56 #define FSAMPLE_CPLD_BIT_CHARGER_ENABLE   3
  57 #define FSAMPLE_CPLD_BIT_SD_MMC_EN        4
  58 #define FSAMPLE_CPLD_BIT_aGPS_PWREN       5
  59 #define FSAMPLE_CPLD_BIT_BACKLIGHT        6
  60 #define FSAMPLE_CPLD_BIT_aGPS_EN_RESET    7
  61 #define FSAMPLE_CPLD_BIT_aGPS_SLEEPx_N    8
  62 #define FSAMPLE_CPLD_BIT_OTG_RESET        9
  63
  64 #define fsample_cpld_set(bit) \
  65     fsample_cpld_write((((bit) & 15) << 4) | 0x0f, FSAMPLE_CPLD_SET_CLR)
  66
  67 #define fsample_cpld_clear(bit) \
  68     fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR)
  69
  70 static const unsigned int fsample_keymap[] = {
  71         KEY(0, 0, KEY_UP),
  72         KEY(1, 0, KEY_RIGHT),
  73         KEY(2, 0, KEY_LEFT),
  74         KEY(3, 0, KEY_DOWN),
  75         KEY(4, 0, KEY_ENTER),
  76         KEY(0, 1, KEY_F10),
  77         KEY(1, 1, KEY_SEND),
  78         KEY(2, 1, KEY_END),
  79         KEY(3, 1, KEY_VOLUMEDOWN),
  80         KEY(4, 1, KEY_VOLUMEUP),
  81         KEY(5, 1, KEY_RECORD),
  82         KEY(0, 2, KEY_F9),
  83         KEY(1, 2, KEY_3),
  84         KEY(2, 2, KEY_6),
  85         KEY(3, 2, KEY_9),
  86         KEY(4, 2, KEY_KPDOT),
  87         KEY(0, 3, KEY_BACK),
  88         KEY(1, 3, KEY_2),
  89         KEY(2, 3, KEY_5),
  90         KEY(3, 3, KEY_8),
  91         KEY(4, 3, KEY_0),
  92         KEY(5, 3, KEY_KPSLASH),
  93         KEY(0, 4, KEY_HOME),
  94         KEY(1, 4, KEY_1),
  95         KEY(2, 4, KEY_4),
  96         KEY(3, 4, KEY_7),
  97         KEY(4, 4, KEY_KPASTERISK),
  98         KEY(5, 4, KEY_POWER),
  99 };
 100
 101 static struct smc91x_platdata smc91x_info = {
 102         .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT,
 103         .leda   = RPC_LED_100_10,
 104         .ledb   = RPC_LED_TX_RX,
 105 };
 106
 107 static struct resource smc91x_resources[] = {
 108         [0] = {
 109                 .start  = H2P2_DBG_FPGA_ETHR_START,     /* Physical */
 110                 .end    = H2P2_DBG_FPGA_ETHR_START + 0xf,
 111                 .flags  = IORESOURCE_MEM,
 112         },
 113         [1] = {
 114                 .start  = INT_7XX_MPU_EXT_NIRQ,
 115                 .end    = 0,
 116                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
 117         },
 118 };
 119
 120 static void __init fsample_init_smc91x(void)
 121 {
 122         __raw_writeb(1, H2P2_DBG_FPGA_LAN_RESET);
 123         mdelay(50);
 124         __raw_writeb(__raw_readb(H2P2_DBG_FPGA_LAN_RESET) & ~1,
 125                    H2P2_DBG_FPGA_LAN_RESET);
 126         mdelay(50);
 127 }
 128
 129 static struct mtd_partition nor_partitions[] = {
 130         /* bootloader (U-Boot, etc) in first sector */
 131         {
 132               .name             = "bootloader",
 133               .offset           = 0,
 134               .size             = SZ_128K,
 135               .mask_flags       = MTD_WRITEABLE, /* force read-only */
 136         },
 137         /* bootloader params in the next sector */
 138         {
 139               .name             = "params",
 140               .offset           = MTDPART_OFS_APPEND,
 141               .size             = SZ_128K,
 142               .mask_flags       = 0,
 143         },
 144         /* kernel */
 145         {
 146               .name             = "kernel",
 147               .offset           = MTDPART_OFS_APPEND,
 148               .size             = SZ_2M,
 149               .mask_flags       = 0
 150         },
 151         /* rest of flash is a file system */
 152         {
 153               .name             = "rootfs",
 154               .offset           = MTDPART_OFS_APPEND,
 155               .size             = MTDPART_SIZ_FULL,
 156               .mask_flags       = 0
 157         },
 158 };
 159
 160 static struct physmap_flash_data nor_data = {
 161         .width          = 2,
 162         .set_vpp        = omap1_set_vpp,
 163         .parts          = nor_partitions,
 164         .nr_parts       = ARRAY_SIZE(nor_partitions),
 165 };
 166
 167 static struct resource nor_resource = {
 168         .start          = OMAP_CS0_PHYS,
 169         .end            = OMAP_CS0_PHYS + SZ_32M - 1,
 170         .flags          = IORESOURCE_MEM,
 171 };
 172
 173 static struct platform_device nor_device = {
 174         .name           = "physmap-flash",
 175         .id             = 0,
 176         .dev            = {
 177                 .platform_data  = &nor_data,
 178         },
 179         .num_resources  = 1,
 180         .resource       = &nor_resource,
 181 };
 182
 183 #define FSAMPLE_NAND_RB_GPIO_PIN        62
 184
 185 static int nand_dev_ready(struct nand_chip *chip)
 186 {
 187         return gpio_get_value(FSAMPLE_NAND_RB_GPIO_PIN);
 188 }
 189
 190 static struct platform_nand_data nand_data = {
 191         .chip   = {
 192                 .nr_chips               = 1,
 193                 .chip_offset            = 0,
 194                 .options                = NAND_SAMSUNG_LP_OPTIONS,
 195         },
 196         .ctrl   = {
 197                 .cmd_ctrl       = omap1_nand_cmd_ctl,
 198                 .dev_ready      = nand_dev_ready,
 199         },
 200 };
 201
 202 static struct resource nand_resource = {
 203         .start          = OMAP_CS3_PHYS,
 204         .end            = OMAP_CS3_PHYS + SZ_4K - 1,
 205         .flags          = IORESOURCE_MEM,
 206 };
 207
 208 static struct platform_device nand_device = {
 209         .name           = "gen_nand",
 210         .id             = 0,
 211         .dev            = {
 212                 .platform_data  = &nand_data,
 213         },
 214         .num_resources  = 1,
 215         .resource       = &nand_resource,
 216 };
 217
 218 static struct platform_device smc91x_device = {
 219         .name           = "smc91x",
 220         .id             = 0,
 221         .dev    = {
 222                 .platform_data  = &smc91x_info,
 223         },
 224         .num_resources  = ARRAY_SIZE(smc91x_resources),
 225         .resource       = smc91x_resources,
 226 };
 227
 228 static struct resource kp_resources[] = {
 229         [0] = {
 230                 .start  = INT_7XX_MPUIO_KEYPAD,
 231                 .end    = INT_7XX_MPUIO_KEYPAD,
 232                 .flags  = IORESOURCE_IRQ,
 233         },
 234 };
 235
 236 static const struct matrix_keymap_data fsample_keymap_data = {
 237         .keymap         = fsample_keymap,
 238         .keymap_size    = ARRAY_SIZE(fsample_keymap),
 239 };
 240
 241 static struct omap_kp_platform_data kp_data = {
 242         .rows           = 8,
 243         .cols           = 8,
 244         .keymap_data    = &fsample_keymap_data,
 245         .delay          = 4,
 246 };
 247
 248 static struct platform_device kp_device = {
 249         .name           = "omap-keypad",
 250         .id             = -1,
 251         .dev            = {
 252                 .platform_data = &kp_data,
 253         },
 254         .num_resources  = ARRAY_SIZE(kp_resources),
 255         .resource       = kp_resources,
 256 };
 257
 258 static struct platform_device *devices[] __initdata = {
 259         &nor_device,
 260         &nand_device,
 261         &smc91x_device,
 262         &kp_device,
 263 };
 264
 265 static const struct omap_lcd_config fsample_lcd_config = {
 266         .ctrl_name      = "internal",
 267 };
 268
 269 static void __init omap_fsample_init(void)
 270 {
 271         /* Early, board-dependent init */
 272
 273         /*
 274          * Hold GSM Reset until needed
 275          */
 276         omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);
 277
 278         /*
 279          * UARTs -> done automagically by 8250 driver
 280          */
 281
 282         /*
 283          * CSx timings, GPIO Mux ... setup
 284          */
 285
 286         /* Flash: CS0 timings setup */
 287         omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
 288         omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);
 289
 290         /*
 291          * Ethernet support through the debug board
 292          * CS1 timings setup
 293          */
 294         omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
 295         omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);
 296
 297         /*
 298          * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
 299          * It is used as the Ethernet controller interrupt
 300          */
 301         omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF,
 302                         OMAP7XX_IO_CONF_9);
 303
 304         fsample_init_smc91x();
 305
 306         BUG_ON(gpio_request(FSAMPLE_NAND_RB_GPIO_PIN, "NAND ready") < 0);
 307         gpio_direction_input(FSAMPLE_NAND_RB_GPIO_PIN);
 308
 309         omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
 310         omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
 311
 312         /* Mux pins for keypad */
 313         omap_cfg_reg(E2_7XX_KBR0);
 314         omap_cfg_reg(J7_7XX_KBR1);
 315         omap_cfg_reg(E1_7XX_KBR2);
 316         omap_cfg_reg(F3_7XX_KBR3);
 317         omap_cfg_reg(D2_7XX_KBR4);
 318         omap_cfg_reg(C2_7XX_KBC0);
 319         omap_cfg_reg(D3_7XX_KBC1);
 320         omap_cfg_reg(E4_7XX_KBC2);
 321         omap_cfg_reg(F4_7XX_KBC3);
 322         omap_cfg_reg(E3_7XX_KBC4);
 323
 324         platform_add_devices(devices, ARRAY_SIZE(devices));
 325
 326         omap_serial_init();
 327         omap_register_i2c_bus(1, 100, NULL, 0);
 328
 329         omapfb_set_lcd_config(&fsample_lcd_config);
 330 }
 331
 332 /* Only FPGA needs to be mapped here. All others are done with ioremap */
 333 static struct map_desc omap_fsample_io_desc[] __initdata = {
 334         {
 335                 .virtual        = H2P2_DBG_FPGA_BASE,
 336                 .pfn            = __phys_to_pfn(H2P2_DBG_FPGA_START),
 337                 .length         = H2P2_DBG_FPGA_SIZE,
 338                 .type           = MT_DEVICE
 339         },
 340         {
 341                 .virtual        = FSAMPLE_CPLD_BASE,
 342                 .pfn            = __phys_to_pfn(FSAMPLE_CPLD_START),
 343                 .length         = FSAMPLE_CPLD_SIZE,
 344                 .type           = MT_DEVICE
 345         }
 346 };
 347
 348 static void __init omap_fsample_map_io(void)
 349 {
 350         omap15xx_map_io();
 351         iotable_init(omap_fsample_io_desc,
 352                      ARRAY_SIZE(omap_fsample_io_desc));
 353 }
 354
 355 MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
 356 /* Maintainer: Brian Swetland <swetland@google.com> */
 357         .atag_offset    = 0x100,
 358         .map_io         = omap_fsample_map_io,
 359         .init_early     = omap1_init_early,
 360         .init_irq       = omap1_init_irq,
 361         .handle_irq     = omap1_handle_irq,
 362         .init_machine   = omap_fsample_init,
 363         .init_late      = omap1_init_late,
 364         .init_time      = omap1_timer_init,
 365         .restart        = omap1_restart,
 366 MACHINE_END