1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2014-2016 Stefan Roese <sr@denx.de>
15 #include <asm/global_data.h>
17 #include <asm/arch/cpu.h>
18 #include <asm/arch/soc.h>
20 #if defined(CONFIG_SPL_SPI_FLASH_SUPPORT) || defined(CONFIG_SPL_MMC) || \
21 defined(CONFIG_SPL_SATA)
24 * When loading U-Boot via SPL from SPI NOR, CONFIG_SYS_SPI_U_BOOT_OFFS must
25 * point to the offset of kwbimage main header which is always at offset zero
26 * (defined by BootROM). Therefore other values of CONFIG_SYS_SPI_U_BOOT_OFFS
27 * makes U-Boot non-bootable.
29 #ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
30 #if defined(CONFIG_SYS_SPI_U_BOOT_OFFS) && CONFIG_SYS_SPI_U_BOOT_OFFS != 0
31 #error CONFIG_SYS_SPI_U_BOOT_OFFS must be set to 0
36 * When loading U-Boot via SPL from eMMC (in Marvell terminology SDIO), the
37 * kwbimage main header is stored at sector 0. U-Boot SPL needs to parse this
38 * header and figure out at which sector the U-Boot proper binary is stored.
39 * Partition booting is therefore not supported and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
40 * and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET need to point to the
41 * kwbimage main header.
44 #ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
45 #error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is unsupported
47 #if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR) && CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR != 0
48 #error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR must be set to 0
50 #if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET) && \
51 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET != 0
52 #error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET must be set to 0
57 * When loading U-Boot via SPL from SATA disk, the kwbimage main header is
58 * stored at sector 1. Therefore CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR must be
59 * set to 1. Otherwise U-Boot SPL would not be able to load U-Boot proper.
61 #ifdef CONFIG_SPL_SATA
62 #if !defined(CONFIG_SPL_SATA_RAW_U_BOOT_USE_SECTOR) || \
63 !defined(CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR) || CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR != 1
64 #error CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR must be set to 1
68 /* Boot Type - block ID */
69 #define IBR_HDR_I2C_ID 0x4D
70 #define IBR_HDR_SPI_ID 0x5A
71 #define IBR_HDR_NAND_ID 0x8B
72 #define IBR_HDR_SATA_ID 0x78
73 #define IBR_HDR_PEX_ID 0x9C
74 #define IBR_HDR_UART_ID 0x69
75 #define IBR_HDR_SDIO_ID 0xAE
77 /* Structure of the main header, version 1 (Armada 370/XP/375/38x/39x) */
78 struct kwbimage_main_hdr_v1 {
81 u16 nandpagesize; /* 0x2-0x3 */
82 u32 blocksize; /* 0x4-0x7 */
84 u8 headersz_msb; /* 0x9 */
85 u16 headersz_lsb; /* 0xA-0xB */
86 u32 srcaddr; /* 0xC-0xF */
87 u32 destaddr; /* 0x10-0x13 */
88 u32 execaddr; /* 0x14-0x17 */
89 u8 options; /* 0x18 */
90 u8 nandblocksize; /* 0x19 */
91 u8 nandbadblklocation; /* 0x1A */
92 u8 reserved4; /* 0x1B */
93 u16 reserved5; /* 0x1C-0x1D */
95 u8 checksum; /* 0x1F */
99 u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)
101 return MMCSD_MODE_RAW;
105 static u32 checksum32(void *start, u32 len)
118 int spl_check_board_image(struct spl_image_info *spl_image,
119 const struct spl_boot_device *bootdev)
121 u32 csum = *(u32 *)(spl_image->load_addr + spl_image->size - 4);
123 if (checksum32((void *)spl_image->load_addr,
124 spl_image->size - 4) != csum) {
125 printf("ERROR: Invalid data checksum in kwbimage\n");
132 int spl_parse_board_header(struct spl_image_info *spl_image,
133 const struct spl_boot_device *bootdev,
134 const void *image_header, size_t size)
136 const struct kwbimage_main_hdr_v1 *mhdr = image_header;
138 if (size < sizeof(*mhdr)) {
139 /* This should be compile time assert */
140 printf("FATAL ERROR: Image header size is too small\n");
145 * Very basic check for image validity. We cannot check mhdr->checksum
146 * as it is calculated also from variable length extended headers
147 * (including SPL content) which is not included in U-Boot image_header.
149 if (mhdr->version != 1 ||
150 ((mhdr->headersz_msb << 16) | mhdr->headersz_lsb) < sizeof(*mhdr)) {
151 printf("ERROR: Invalid kwbimage v1\n");
155 if (IS_ENABLED(CONFIG_SPL_SPI_FLASH_SUPPORT) &&
156 bootdev->boot_device == BOOT_DEVICE_SPI &&
157 mhdr->blockid != IBR_HDR_SPI_ID) {
158 printf("ERROR: Wrong blockid (0x%x) in SPI kwbimage\n",
163 if (IS_ENABLED(CONFIG_SPL_SATA) &&
164 bootdev->boot_device == BOOT_DEVICE_SATA &&
165 mhdr->blockid != IBR_HDR_SATA_ID) {
166 printf("ERROR: Wrong blockid (0x%x) in SATA kwbimage\n",
171 if (IS_ENABLED(CONFIG_SPL_MMC) &&
172 (bootdev->boot_device == BOOT_DEVICE_MMC1 ||
173 bootdev->boot_device == BOOT_DEVICE_MMC2 ||
174 bootdev->boot_device == BOOT_DEVICE_MMC2_2) &&
175 mhdr->blockid != IBR_HDR_SDIO_ID) {
176 printf("ERROR: Wrong blockid (0x%x) in SDIO kwbimage\n",
181 spl_image->offset = mhdr->srcaddr;
184 * For SATA srcaddr is specified in number of sectors.
185 * The main header is must be stored at sector number 1.
186 * This expects that sector size is 512 bytes and recalculates
187 * data offset to bytes relative to the main header.
189 if (IS_ENABLED(CONFIG_SPL_SATA) && mhdr->blockid == IBR_HDR_SATA_ID) {
190 if (spl_image->offset < 1) {
191 printf("ERROR: Wrong srcaddr (0x%08x) in SATA kwbimage\n",
195 spl_image->offset -= 1;
196 spl_image->offset *= 512;
200 * For SDIO (eMMC) srcaddr is specified in number of sectors.
201 * This expects that sector size is 512 bytes and recalculates
202 * data offset to bytes.
204 if (IS_ENABLED(CONFIG_SPL_MMC) && mhdr->blockid == IBR_HDR_SDIO_ID)
205 spl_image->offset *= 512;
207 if (spl_image->offset % 4 != 0) {
208 printf("ERROR: Wrong srcaddr (0x%08x) in kwbimage\n",
213 if (mhdr->blocksize <= 4 || mhdr->blocksize % 4 != 0) {
214 printf("ERROR: Wrong blocksize (0x%08x) in kwbimage\n",
219 spl_image->size = mhdr->blocksize;
220 spl_image->entry_point = mhdr->execaddr;
221 spl_image->load_addr = mhdr->destaddr;
222 spl_image->os = IH_OS_U_BOOT;
223 spl_image->name = "U-Boot";
228 u32 spl_boot_device(void)
230 u32 boot_device = get_boot_device();
232 switch (boot_device) {
234 * Return to the BootROM to continue the Marvell xmodem
235 * UART boot protocol. As initiated by the kwboot tool.
237 * This can only be done by the BootROM since the beginning
238 * of the image is already read and interpreted by the BootROM.
239 * SPL has no chance to receive this information. So we
240 * need to return to the BootROM to enable this xmodem
241 * UART download. Use SPL infrastructure to return to BootROM.
243 case BOOT_DEVICE_UART:
244 return BOOT_DEVICE_BOOTROM;
247 * If SPL is compiled with chosen boot_device support
248 * then use SPL driver for loading U-Boot proper.
250 #ifdef CONFIG_SPL_MMC
251 case BOOT_DEVICE_MMC1:
252 return BOOT_DEVICE_MMC1;
254 #ifdef CONFIG_SPL_SATA
255 case BOOT_DEVICE_SATA:
256 return BOOT_DEVICE_SATA;
258 #ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
259 case BOOT_DEVICE_SPI:
260 return BOOT_DEVICE_SPI;
264 * If SPL is not compiled with chosen boot_device support
265 * then return to the BootROM. BootROM supports loading
266 * U-Boot proper from any valid boot_device present in SAR
270 return BOOT_DEVICE_BOOTROM;
276 u32 spl_boot_device(void)
278 return BOOT_DEVICE_BOOTROM;
283 int board_return_to_bootrom(struct spl_image_info *spl_image,
284 struct spl_boot_device *bootdev)
286 u32 *regs = *(u32 **)CONFIG_SPL_BOOTROM_SAVE;
288 printf("Returning to BootROM (return address 0x%08x)...\n", regs[13]);
291 /* NOTREACHED - return_to_bootrom() does not return */
295 void board_init_f(ulong dummy)
300 * Pin muxing needs to be done before UART output, since
301 * on A38x the UART pins need some re-muxing for output
304 board_early_init_f();
307 * Use special translation offset for SPL. This needs to be
308 * configured *before* spl_init() is called as this function
309 * calls dm_init() which calls the bind functions of the
310 * device drivers. Here the base address needs to be configured
311 * (translated) correctly.
313 gd->translation_offset = 0xd0000000 - 0xf1000000;
317 printf("spl_init() failed: %d\n", ret);
321 preloader_console_init();
325 /* Armada 375 does not support SerDes and DDR3 init yet */
326 #if !defined(CONFIG_ARMADA_375)
327 /* First init the serdes PHY's */
333 printf("ddr3_init() failed: %d\n", ret);
334 if (IS_ENABLED(CONFIG_DDR_RESET_ON_TRAINING_FAILURE) &&
335 get_boot_device() != BOOT_DEVICE_UART)
342 /* Initialize Auto Voltage Scaling */
345 /* Update read timing control for PCIe */