2 * Copyright (C) Marvell International Ltd. and its affiliates
4 * SPDX-License-Identifier: GPL-2.0
11 #include <asm/arch/cpu.h>
12 #include <asm/arch/soc.h>
15 #include "high_speed_env_spec.h"
17 #include "../../../drivers/ddr/marvell/a38x/ddr3_init.h"
19 #if defined(MV_DEBUG_INIT_FULL) || defined(MV_DEBUG)
25 /* Array for mapping the operation (write, poll or delay) functions */
26 op_execute_func_ptr op_execute_func_arr[] = {
32 int write_op_execute(u32 serdes_num, struct op_params *params, u32 data_arr_idx)
34 u32 unit_base_reg, unit_offset, data, mask, reg_data, reg_addr;
36 /* Getting write op params from the input parameter */
37 data = params->data[data_arr_idx];
40 /* an empty operation */
44 /* get updated base address since it can be different between Serdes */
45 CHECK_STATUS(hws_get_ext_base_addr(serdes_num, params->unit_base_reg,
47 &unit_base_reg, &unit_offset));
49 /* Address calculation */
50 reg_addr = unit_base_reg + unit_offset * serdes_num;
53 printf("Write: 0x%x: 0x%x (mask 0x%x) - ", reg_addr, data, mask);
55 /* Reading old value */
56 reg_data = reg_read(reg_addr);
59 /* Writing new data */
62 reg_write(reg_addr, reg_data);
65 printf(" - 0x%x\n", reg_data);
71 int delay_op_execute(u32 serdes_num, struct op_params *params, u32 data_arr_idx)
75 /* Getting delay op params from the input parameter */
76 delay = params->wait_time;
78 printf("Delay: %d\n", delay);
85 int poll_op_execute(u32 serdes_num, struct op_params *params, u32 data_arr_idx)
87 u32 unit_base_reg, unit_offset, data, mask, num_of_loops, wait_time;
89 u32 reg_addr, reg_data;
91 /* Getting poll op params from the input parameter */
92 data = params->data[data_arr_idx];
94 num_of_loops = params->num_of_loops;
95 wait_time = params->wait_time;
97 /* an empty operation */
101 /* get updated base address since it can be different between Serdes */
102 CHECK_STATUS(hws_get_ext_base_addr(serdes_num, params->unit_base_reg,
104 &unit_base_reg, &unit_offset));
106 /* Address calculation */
107 reg_addr = unit_base_reg + unit_offset * serdes_num;
111 printf("Poll: 0x%x: 0x%x (mask 0x%x)\n", reg_addr, data, mask);
115 reg_data = reg_read(reg_addr) & mask;
118 } while ((reg_data != data) && (poll_counter < num_of_loops));
120 if ((poll_counter >= num_of_loops) && (reg_data != data)) {
121 DEBUG_INIT_S("poll_op_execute: TIMEOUT\n");
128 enum mv_op get_cfg_seq_op(struct op_params *params)
130 if (params->wait_time == 0)
132 else if (params->num_of_loops == 0)
138 int mv_seq_exec(u32 serdes_num, u32 seq_id)
141 struct op_params *seq_arr;
146 DB(printf("\n### mv_seq_exec ###\n"));
147 DB(printf("seq id: %d\n", seq_id));
149 if (hws_is_serdes_active(serdes_num) != 1) {
150 printf("mv_seq_exec_ext:Error: SerDes lane %d is not valid\n",
155 seq_arr = serdes_seq_db[seq_id].op_params_ptr;
156 seq_size = serdes_seq_db[seq_id].cfg_seq_size;
157 data_arr_idx = serdes_seq_db[seq_id].data_arr_idx;
159 DB(printf("seq_size: %d\n", seq_size));
160 DB(printf("data_arr_idx: %d\n", data_arr_idx));
162 /* Executing the sequence operations */
163 for (seq_idx = 0; seq_idx < seq_size; seq_idx++) {
164 curr_op = get_cfg_seq_op(&seq_arr[seq_idx]);
165 op_execute_func_arr[curr_op](serdes_num, &seq_arr[seq_idx],