1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Marvell Semiconductor <www.marvell.com>
5 * Written-by: Lei Wen <leiwen@marvell.com>
9 * This file should be included in board config header file.
11 * It supports common definitions for MVEBU platforms
14 #ifndef _MVEBU_CONFIG_H
15 #define _MVEBU_CONFIG_H
17 #include <asm/arch/soc.h>
19 #if defined(CONFIG_ARMADA_XP) || defined(CONFIG_ARMADA_375) \
20 || defined(CONFIG_ARMADA_38X) || defined(CONFIG_ARMADA_MSYS)
22 * Set this for the common xor register definitions needed in dram.c
23 * for A38x as well here.
25 #define MV88F78X60 /* for the DDR training bin_hdr code */
28 #define CONFIG_SYS_L2_PL310
30 /* end of 16M scrubbed by training in bootrom */
31 #define CONFIG_SYS_INIT_SP_ADDR 0x00FF0000
33 #define MV_UART_CONSOLE_BASE MVEBU_UART0_BASE
35 /* Needed for SPI NOR booting in SPL */
36 #define CONFIG_DM_SEQ_ALIAS 1
39 * Ethernet Driver configuration
42 #define CONFIG_ARP_TIMEOUT 200
43 #define CONFIG_NET_RETRY_COUNT 50
44 #endif /* CONFIG_CMD_NET */
50 #ifndef CONFIG_SYS_I2C_SOFT
51 #define CONFIG_I2C_MVTWSI
55 /* Use common timer */
56 #define CONFIG_SYS_TIMER_COUNTS_DOWN
57 #define CONFIG_SYS_TIMER_COUNTER (MVEBU_TIMER_BASE + 0x14)
58 #define CONFIG_SYS_TIMER_RATE 25000000
60 #endif /* __MVEBU_CONFIG_H */