5 * Texas Instruments Incorporated, <www.ti.com>
7 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/arch/hardware.h>
15 struct ddr3_phy_config {
17 unsigned int pgcr1_mask;
18 unsigned int pgcr1_val;
24 unsigned int dcr_mask;
41 struct ddr3_emif_config {
53 struct ddr3_phy_config phy_cfg;
54 struct ddr3_emif_config emif_cfg;
55 unsigned int ddrspdclock;
60 void ddr3_reset_ddrphy(void);
61 void ddr3_init_ecc(u32 base, u32 ddr3_size);
62 void ddr3_disable_ecc(u32 base);
63 void ddr3_check_ecc_int(u32 base);
64 int ddr3_ecc_support_rmw(u32 base);
65 void ddr3_err_reset_workaround(void);
66 void ddr3_enable_ecc(u32 base, int test);
67 void ddr3_init_ddrphy(u32 base, struct ddr3_phy_config *phy_cfg);
68 void ddr3_init_ddremif(u32 base, struct ddr3_emif_config *emif_cfg);
69 int ddr3_get_size(void);