1 // SPDX-License-Identifier: GPL-2.0+
3 * K3: Common Architecture initialization
5 * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
6 * Lokesh Vutla <lokeshvutla@ti.com>
17 #include <remoteproc.h>
18 #include <asm/cache.h>
19 #include <linux/soc/ti/ti_sci_protocol.h>
20 #include <fdt_support.h>
21 #include <asm/arch/sys_proto.h>
22 #include <asm/hardware.h>
24 #include <fs_loader.h>
30 struct ti_sci_handle *get_ti_sci_handle(void)
35 ret = uclass_get_device_by_driver(UCLASS_FIRMWARE,
36 DM_DRIVER_GET(ti_sci), &dev);
38 panic("Failed to get SYSFW (%d)\n", ret);
40 return (struct ti_sci_handle *)ti_sci_get_handle_from_sysfw(dev);
43 void k3_sysfw_print_ver(void)
45 struct ti_sci_handle *ti_sci = get_ti_sci_handle();
46 char fw_desc[sizeof(ti_sci->version.firmware_description) + 1];
49 * Output System Firmware version info. Note that since the
50 * 'firmware_description' field is not guaranteed to be zero-
51 * terminated we manually add a \0 terminator if needed. Further
52 * note that we intentionally no longer rely on the extended
53 * printf() formatter '%.*s' to not having to require a more
54 * full-featured printf() implementation.
56 strncpy(fw_desc, ti_sci->version.firmware_description,
57 sizeof(ti_sci->version.firmware_description));
58 fw_desc[sizeof(fw_desc) - 1] = '\0';
60 printf("SYSFW ABI: %d.%d (firmware rev 0x%04x '%s')\n",
61 ti_sci->version.abi_major, ti_sci->version.abi_minor,
62 ti_sci->version.firmware_revision, fw_desc);
65 void mmr_unlock(phys_addr_t base, u32 partition)
67 /* Translate the base address */
68 phys_addr_t part_base = base + partition * CTRL_MMR0_PARTITION_SIZE;
70 /* Unlock the requested partition if locked using two-step sequence */
71 writel(CTRLMMR_LOCK_KICK0_UNLOCK_VAL, part_base + CTRLMMR_LOCK_KICK0);
72 writel(CTRLMMR_LOCK_KICK1_UNLOCK_VAL, part_base + CTRLMMR_LOCK_KICK1);
75 bool is_rom_loaded_sysfw(struct rom_extended_boot_data *data)
77 if (strncmp(data->header, K3_ROM_BOOT_HEADER_MAGIC, 7))
80 return data->num_components > 1;
83 DECLARE_GLOBAL_DATA_PTR;
85 #ifdef CONFIG_K3_EARLY_CONS
86 int early_console_init(void)
91 gd->baudrate = CONFIG_BAUDRATE;
93 ret = uclass_get_device_by_seq(UCLASS_SERIAL, CONFIG_K3_EARLY_CONS_IDX,
96 printf("Error getting serial dev for early console! (%d)\n",
101 gd->cur_serial_dev = dev;
102 gd->flags |= GD_FLG_SERIAL_READY;
103 gd->have_console = 1;
109 #ifdef CONFIG_SYS_K3_SPL_ATF
113 #ifdef CONFIG_SPL_ENV_SUPPORT
118 switch (spl_boot_device()) {
119 case BOOT_DEVICE_MMC2:
120 part = env_get("bootpart");
121 env_set("storage_interface", "mmc");
122 env_set("fw_dev_part", part);
124 case BOOT_DEVICE_SPI:
125 env_set("storage_interface", "ubi");
126 env_set("fw_ubi_mtdpart", "UBI");
127 env_set("fw_ubi_volume", "UBI0");
130 printf("%s from device %u not supported!\n",
131 __func__, spl_boot_device());
137 #ifdef CONFIG_FS_LOADER
138 int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr)
140 struct udevice *fsdev;
145 #ifdef CONFIG_SPL_ENV_SUPPORT
146 switch (spl_boot_device()) {
147 case BOOT_DEVICE_MMC2:
148 name = env_get(name_fw);
149 *loadaddr = env_get_hex(name_loadaddr, *loadaddr);
152 printf("Loading rproc fw image from device %u not supported!\n",
160 if (!uclass_get_device(UCLASS_FS_FIRMWARE_LOADER, 0, &fsdev)) {
161 size = request_firmware_into_buf(fsdev, name, (void *)*loadaddr,
168 int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr)
174 __weak void start_non_linux_remote_cores(void)
178 void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
180 typedef void __noreturn (*image_entry_noargs_t)(void);
181 struct ti_sci_handle *ti_sci = get_ti_sci_handle();
185 /* Release all the exclusive devices held by SPL before starting ATF */
186 ti_sci->ops.dev_ops.release_exclusive_devices(ti_sci);
190 panic("rproc failed to be initialized (%d)\n", ret);
193 start_non_linux_remote_cores();
194 size = load_firmware("name_mcur5f0_0fw", "addr_mcur5f0_0load",
199 * It is assumed that remoteproc device 1 is the corresponding
200 * Cortex-A core which runs ATF. Make sure DT reflects the same.
202 ret = rproc_load(1, spl_image->entry_point, 0x200);
204 panic("%s: ATF failed to load on rproc (%d)\n", __func__, ret);
206 /* Add an extra newline to differentiate the ATF logs from SPL */
207 printf("Starting ATF on ARM64 core...\n\n");
209 ret = rproc_start(1);
211 panic("%s: ATF failed to start on rproc (%d)\n", __func__, ret);
212 if (!(size > 0 && valid_elf_image(loadaddr))) {
213 debug("Shutting down...\n");
214 release_resources_for_core_shutdown();
220 image_entry_noargs_t image_entry =
221 (image_entry_noargs_t)load_elf_image_phdr(loadaddr);
227 #if defined(CONFIG_OF_LIBFDT)
228 int fdt_fixup_msmc_ram(void *blob, char *parent_path, char *node_name)
230 u64 msmc_start = 0, msmc_end = 0, msmc_size, reg[2];
231 struct ti_sci_handle *ti_sci = get_ti_sci_handle();
232 int ret, node, subnode, len, prev_node;
233 u32 range[4], addr, size;
234 const fdt32_t *sub_reg;
236 ti_sci->ops.core_ops.query_msmc(ti_sci, &msmc_start, &msmc_end);
237 msmc_size = msmc_end - msmc_start + 1;
238 debug("%s: msmc_start = 0x%llx, msmc_size = 0x%llx\n", __func__,
239 msmc_start, msmc_size);
241 /* find or create "msmc_sram node */
242 ret = fdt_path_offset(blob, parent_path);
246 node = fdt_find_or_add_subnode(blob, ret, node_name);
250 ret = fdt_setprop_string(blob, node, "compatible", "mmio-sram");
254 reg[0] = cpu_to_fdt64(msmc_start);
255 reg[1] = cpu_to_fdt64(msmc_size);
256 ret = fdt_setprop(blob, node, "reg", reg, sizeof(reg));
260 fdt_setprop_cell(blob, node, "#address-cells", 1);
261 fdt_setprop_cell(blob, node, "#size-cells", 1);
264 range[1] = cpu_to_fdt32(msmc_start >> 32);
265 range[2] = cpu_to_fdt32(msmc_start & 0xffffffff);
266 range[3] = cpu_to_fdt32(msmc_size);
267 ret = fdt_setprop(blob, node, "ranges", range, sizeof(range));
271 subnode = fdt_first_subnode(blob, node);
274 /* Look for invalid subnodes and delete them */
275 while (subnode >= 0) {
276 sub_reg = fdt_getprop(blob, subnode, "reg", &len);
277 addr = fdt_read_number(sub_reg, 1);
279 size = fdt_read_number(sub_reg, 1);
280 debug("%s: subnode = %d, addr = 0x%x. size = 0x%x\n", __func__,
281 subnode, addr, size);
282 if (addr + size > msmc_size ||
283 !strncmp(fdt_get_name(blob, subnode, &len), "sysfw", 5) ||
284 !strncmp(fdt_get_name(blob, subnode, &len), "l3cache", 7)) {
285 fdt_del_node(blob, subnode);
286 debug("%s: deleting subnode %d\n", __func__, subnode);
288 subnode = fdt_first_subnode(blob, node);
290 subnode = fdt_next_subnode(blob, prev_node);
293 subnode = fdt_next_subnode(blob, prev_node);
300 int fdt_disable_node(void *blob, char *node_path)
305 offs = fdt_path_offset(blob, node_path);
307 printf("Node %s not found.\n", node_path);
310 ret = fdt_setprop_string(blob, offs, "status", "disabled");
312 printf("Could not add status property to node %s: %s\n",
313 node_path, fdt_strerror(ret));
321 #ifndef CONFIG_SYSRESET
322 void reset_cpu(ulong ignored)
327 #if defined(CONFIG_DISPLAY_CPUINFO)
328 int print_cpuinfo(void)
342 ret = soc_get_family(soc, name, 64);
347 ret = soc_get_revision(soc, name, 64);
349 printf("%s\n", name);
356 bool soc_is_j721e(void)
360 soc = (readl(CTRLMMR_WKUP_JTAG_ID) &
361 JTAG_ID_PARTNO_MASK) >> JTAG_ID_PARTNO_SHIFT;
366 bool soc_is_j7200(void)
370 soc = (readl(CTRLMMR_WKUP_JTAG_ID) &
371 JTAG_ID_PARTNO_MASK) >> JTAG_ID_PARTNO_SHIFT;
377 void board_prep_linux(bootm_headers_t *images)
379 debug("Linux kernel Image start = 0x%lx end = 0x%lx\n",
380 images->os.start, images->os.end);
381 __asm_flush_dcache_range(images->os.start,
382 ROUND(images->os.end,
383 CONFIG_SYS_CACHELINE_SIZE));
387 #ifdef CONFIG_CPU_V7R
388 void disable_linefill_optimization(void)
393 * On K3 devices there are 2 conditions where R5F can deadlock:
394 * 1.When software is performing series of store operations to
395 * cacheable write back/write allocate memory region and later
396 * on software execute barrier operation (DSB or DMB). R5F may
397 * hang at the barrier instruction.
398 * 2.When software is performing a mix of load and store operations
399 * within a tight loop and store operations are all writing to
400 * cacheable write back/write allocates memory regions, R5F may
401 * hang at one of the load instruction.
403 * To avoid the above two conditions disable linefill optimization
406 asm("mrc p15, 0, %0, c1, c0, 1" : "=r" (actlr));
407 actlr |= (1 << 13); /* Set DLFO bit */
408 asm("mcr p15, 0, %0, c1, c0, 1" : : "r" (actlr));
412 void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size)
414 struct ti_sci_msg_fwl_region region;
415 struct ti_sci_fwl_ops *fwl_ops;
416 struct ti_sci_handle *ti_sci;
419 ti_sci = get_ti_sci_handle();
420 fwl_ops = &ti_sci->ops.fwl_ops;
421 for (i = 0; i < fwl_data_size; i++) {
422 for (j = 0; j < fwl_data[i].regions; j++) {
423 region.fwl_id = fwl_data[i].fwl_id;
425 region.n_permission_regs = 3;
427 fwl_ops->get_fwl_region(ti_sci, ®ion);
429 if (region.control != 0) {
430 pr_debug("Attempting to disable firewall %5d (%25s)\n",
431 region.fwl_id, fwl_data[i].name);
434 if (fwl_ops->set_fwl_region(ti_sci, ®ion))
435 pr_err("Could not disable firewall %5d (%25s)\n",
436 region.fwl_id, fwl_data[i].name);
442 void spl_enable_dcache(void)
444 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
445 phys_addr_t ram_top = CONFIG_SYS_SDRAM_BASE;
447 dram_init_banksize();
449 /* reserve TLB table */
450 gd->arch.tlb_size = PGTABLE_SIZE;
452 ram_top += get_effective_memsize();
453 /* keep ram_top in the 32-bit address space */
454 if (ram_top >= 0x100000000)
455 ram_top = (phys_addr_t) 0x100000000;
457 gd->arch.tlb_addr = ram_top - gd->arch.tlb_size;
458 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
459 gd->arch.tlb_addr + gd->arch.tlb_size);
465 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
466 void spl_board_prepare_for_boot(void)
471 void spl_board_prepare_for_linux(void)