arch/arm/mach-k3/common.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * K3: Common Architecture initialization
   4  *
   5  * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
   6  *      Lokesh Vutla <lokeshvutla@ti.com>
   7  */
   8
   9 #include <common.h>
  10 #include <cpu_func.h>
  11 #include <image.h>
  12 #include <init.h>
  13 #include <log.h>
  14 #include <spl.h>
  15 #include "common.h"
  16 #include <dm.h>
  17 #include <remoteproc.h>
  18 #include <asm/cache.h>
  19 #include <linux/soc/ti/ti_sci_protocol.h>
  20 #include <fdt_support.h>
  21 #include <asm/arch/sys_proto.h>
  22 #include <asm/hardware.h>
  23 #include <asm/io.h>
  24 #include <fs_loader.h>
  25 #include <fs.h>
  26 #include <env.h>
  27 #include <elf.h>
  28 #include <soc.h>
  29
  30 struct ti_sci_handle *get_ti_sci_handle(void)
  31 {
  32         struct udevice *dev;
  33         int ret;
  34
  35         ret = uclass_get_device_by_driver(UCLASS_FIRMWARE,
  36                                           DM_GET_DRIVER(ti_sci), &dev);
  37         if (ret)
  38                 panic("Failed to get SYSFW (%d)\n", ret);
  39
  40         return (struct ti_sci_handle *)ti_sci_get_handle_from_sysfw(dev);
  41 }
  42
  43 void k3_sysfw_print_ver(void)
  44 {
  45         struct ti_sci_handle *ti_sci = get_ti_sci_handle();
  46         char fw_desc[sizeof(ti_sci->version.firmware_description) + 1];
  47
  48         /*
  49          * Output System Firmware version info. Note that since the
  50          * 'firmware_description' field is not guaranteed to be zero-
  51          * terminated we manually add a \0 terminator if needed. Further
  52          * note that we intentionally no longer rely on the extended
  53          * printf() formatter '%.*s' to not having to require a more
  54          * full-featured printf() implementation.
  55          */
  56         strncpy(fw_desc, ti_sci->version.firmware_description,
  57                 sizeof(ti_sci->version.firmware_description));
  58         fw_desc[sizeof(fw_desc) - 1] = '\0';
  59
  60         printf("SYSFW ABI: %d.%d (firmware rev 0x%04x '%s')\n",
  61                ti_sci->version.abi_major, ti_sci->version.abi_minor,
  62                ti_sci->version.firmware_revision, fw_desc);
  63 }
  64
  65 DECLARE_GLOBAL_DATA_PTR;
  66
  67 #ifdef CONFIG_K3_EARLY_CONS
  68 int early_console_init(void)
  69 {
  70         struct udevice *dev;
  71         int ret;
  72
  73         gd->baudrate = CONFIG_BAUDRATE;
  74
  75         ret = uclass_get_device_by_seq(UCLASS_SERIAL, CONFIG_K3_EARLY_CONS_IDX,
  76                                        &dev);
  77         if (ret) {
  78                 printf("Error getting serial dev for early console! (%d)\n",
  79                        ret);
  80                 return ret;
  81         }
  82
  83         gd->cur_serial_dev = dev;
  84         gd->flags |= GD_FLG_SERIAL_READY;
  85         gd->have_console = 1;
  86
  87         return 0;
  88 }
  89 #endif
  90
  91 #ifdef CONFIG_SYS_K3_SPL_ATF
  92
  93 void init_env(void)
  94 {
  95 #ifdef CONFIG_SPL_ENV_SUPPORT
  96         char *part;
  97
  98         env_init();
  99         env_relocate();
 100         switch (spl_boot_device()) {
 101         case BOOT_DEVICE_MMC2:
 102                 part = env_get("bootpart");
 103                 env_set("storage_interface", "mmc");
 104                 env_set("fw_dev_part", part);
 105                 break;
 106         case BOOT_DEVICE_SPI:
 107                 env_set("storage_interface", "ubi");
 108                 env_set("fw_ubi_mtdpart", "UBI");
 109                 env_set("fw_ubi_volume", "UBI0");
 110                 break;
 111         default:
 112                 printf("%s from device %u not supported!\n",
 113                        __func__, spl_boot_device());
 114                 return;
 115         }
 116 #endif
 117 }
 118
 119 #ifdef CONFIG_FS_LOADER
 120 int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr)
 121 {
 122         struct udevice *fsdev;
 123         char *name = NULL;
 124         int size = 0;
 125
 126         *loadaddr = 0;
 127 #ifdef CONFIG_SPL_ENV_SUPPORT
 128         switch (spl_boot_device()) {
 129         case BOOT_DEVICE_MMC2:
 130                 name = env_get(name_fw);
 131                 *loadaddr = env_get_hex(name_loadaddr, *loadaddr);
 132                 break;
 133         default:
 134                 printf("Loading rproc fw image from device %u not supported!\n",
 135                        spl_boot_device());
 136                 return 0;
 137         }
 138 #endif
 139         if (!*loadaddr)
 140                 return 0;
 141
 142         if (!uclass_get_device(UCLASS_FS_FIRMWARE_LOADER, 0, &fsdev)) {
 143                 size = request_firmware_into_buf(fsdev, name, (void *)*loadaddr,
 144                                                  0, 0);
 145         }
 146
 147         return size;
 148 }
 149 #else
 150 int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr)
 151 {
 152         return 0;
 153 }
 154 #endif
 155
 156 __weak void start_non_linux_remote_cores(void)
 157 {
 158 }
 159
 160 void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
 161 {
 162         typedef void __noreturn (*image_entry_noargs_t)(void);
 163         struct ti_sci_handle *ti_sci = get_ti_sci_handle();
 164         u32 loadaddr = 0;
 165         int ret, size;
 166
 167         /* Release all the exclusive devices held by SPL before starting ATF */
 168         ti_sci->ops.dev_ops.release_exclusive_devices(ti_sci);
 169
 170         ret = rproc_init();
 171         if (ret)
 172                 panic("rproc failed to be initialized (%d)\n", ret);
 173
 174         init_env();
 175         start_non_linux_remote_cores();
 176         size = load_firmware("name_mcur5f0_0fw", "addr_mcur5f0_0load",
 177                              &loadaddr);
 178
 179
 180         /*
 181          * It is assumed that remoteproc device 1 is the corresponding
 182          * Cortex-A core which runs ATF. Make sure DT reflects the same.
 183          */
 184         ret = rproc_load(1, spl_image->entry_point, 0x200);
 185         if (ret)
 186                 panic("%s: ATF failed to load on rproc (%d)\n", __func__, ret);
 187
 188         /* Add an extra newline to differentiate the ATF logs from SPL */
 189         printf("Starting ATF on ARM64 core...\n\n");
 190
 191         ret = rproc_start(1);
 192         if (ret)
 193                 panic("%s: ATF failed to start on rproc (%d)\n", __func__, ret);
 194         if (!(size > 0 && valid_elf_image(loadaddr))) {
 195                 debug("Shutting down...\n");
 196                 release_resources_for_core_shutdown();
 197
 198                 while (1)
 199                         asm volatile("wfe");
 200         }
 201
 202         image_entry_noargs_t image_entry =
 203                 (image_entry_noargs_t)load_elf_image_phdr(loadaddr);
 204
 205         image_entry();
 206 }
 207 #endif
 208
 209 #if defined(CONFIG_OF_LIBFDT)
 210 int fdt_fixup_msmc_ram(void *blob, char *parent_path, char *node_name)
 211 {
 212         u64 msmc_start = 0, msmc_end = 0, msmc_size, reg[2];
 213         struct ti_sci_handle *ti_sci = get_ti_sci_handle();
 214         int ret, node, subnode, len, prev_node;
 215         u32 range[4], addr, size;
 216         const fdt32_t *sub_reg;
 217
 218         ti_sci->ops.core_ops.query_msmc(ti_sci, &msmc_start, &msmc_end);
 219         msmc_size = msmc_end - msmc_start + 1;
 220         debug("%s: msmc_start = 0x%llx, msmc_size = 0x%llx\n", __func__,
 221               msmc_start, msmc_size);
 222
 223         /* find or create "msmc_sram node */
 224         ret = fdt_path_offset(blob, parent_path);
 225         if (ret < 0)
 226                 return ret;
 227
 228         node = fdt_find_or_add_subnode(blob, ret, node_name);
 229         if (node < 0)
 230                 return node;
 231
 232         ret = fdt_setprop_string(blob, node, "compatible", "mmio-sram");
 233         if (ret < 0)
 234                 return ret;
 235
 236         reg[0] = cpu_to_fdt64(msmc_start);
 237         reg[1] = cpu_to_fdt64(msmc_size);
 238         ret = fdt_setprop(blob, node, "reg", reg, sizeof(reg));
 239         if (ret < 0)
 240                 return ret;
 241
 242         fdt_setprop_cell(blob, node, "#address-cells", 1);
 243         fdt_setprop_cell(blob, node, "#size-cells", 1);
 244
 245         range[0] = 0;
 246         range[1] = cpu_to_fdt32(msmc_start >> 32);
 247         range[2] = cpu_to_fdt32(msmc_start & 0xffffffff);
 248         range[3] = cpu_to_fdt32(msmc_size);
 249         ret = fdt_setprop(blob, node, "ranges", range, sizeof(range));
 250         if (ret < 0)
 251                 return ret;
 252
 253         subnode = fdt_first_subnode(blob, node);
 254         prev_node = 0;
 255
 256         /* Look for invalid subnodes and delete them */
 257         while (subnode >= 0) {
 258                 sub_reg = fdt_getprop(blob, subnode, "reg", &len);
 259                 addr = fdt_read_number(sub_reg, 1);
 260                 sub_reg++;
 261                 size = fdt_read_number(sub_reg, 1);
 262                 debug("%s: subnode = %d, addr = 0x%x. size = 0x%x\n", __func__,
 263                       subnode, addr, size);
 264                 if (addr + size > msmc_size ||
 265                     !strncmp(fdt_get_name(blob, subnode, &len), "sysfw", 5) ||
 266                     !strncmp(fdt_get_name(blob, subnode, &len), "l3cache", 7)) {
 267                         fdt_del_node(blob, subnode);
 268                         debug("%s: deleting subnode %d\n", __func__, subnode);
 269                         if (!prev_node)
 270                                 subnode = fdt_first_subnode(blob, node);
 271                         else
 272                                 subnode = fdt_next_subnode(blob, prev_node);
 273                 } else {
 274                         prev_node = subnode;
 275                         subnode = fdt_next_subnode(blob, prev_node);
 276                 }
 277         }
 278
 279         return 0;
 280 }
 281
 282 int fdt_disable_node(void *blob, char *node_path)
 283 {
 284         int offs;
 285         int ret;
 286
 287         offs = fdt_path_offset(blob, node_path);
 288         if (offs < 0) {
 289                 printf("Node %s not found.\n", node_path);
 290                 return offs;
 291         }
 292         ret = fdt_setprop_string(blob, offs, "status", "disabled");
 293         if (ret < 0) {
 294                 printf("Could not add status property to node %s: %s\n",
 295                        node_path, fdt_strerror(ret));
 296                 return ret;
 297         }
 298         return 0;
 299 }
 300
 301 #endif
 302
 303 #ifndef CONFIG_SYSRESET
 304 void reset_cpu(ulong ignored)
 305 {
 306 }
 307 #endif
 308
 309 #if defined(CONFIG_DISPLAY_CPUINFO)
 310 int print_cpuinfo(void)
 311 {
 312         struct udevice *soc;
 313         char name[64];
 314         int ret;
 315
 316         printf("SoC:   ");
 317
 318         ret = soc_get(&soc);
 319         if (ret) {
 320                 printf("UNKNOWN\n");
 321                 return 0;
 322         }
 323
 324         ret = soc_get_family(soc, name, 64);
 325         if (!ret) {
 326                 printf("%s ", name);
 327         }
 328
 329         ret = soc_get_revision(soc, name, 64);
 330         if (!ret) {
 331                 printf("%s\n", name);
 332         }
 333
 334         return 0;
 335 }
 336 #endif
 337
 338 #ifdef CONFIG_ARM64
 339 void board_prep_linux(bootm_headers_t *images)
 340 {
 341         debug("Linux kernel Image start = 0x%lx end = 0x%lx\n",
 342               images->os.start, images->os.end);
 343         __asm_flush_dcache_range(images->os.start,
 344                                  ROUND(images->os.end,
 345                                        CONFIG_SYS_CACHELINE_SIZE));
 346 }
 347 #endif
 348
 349 #ifdef CONFIG_CPU_V7R
 350 void disable_linefill_optimization(void)
 351 {
 352         u32 actlr;
 353
 354         /*
 355          * On K3 devices there are 2 conditions where R5F can deadlock:
 356          * 1.When software is performing series of store operations to
 357          *   cacheable write back/write allocate memory region and later
 358          *   on software execute barrier operation (DSB or DMB). R5F may
 359          *   hang at the barrier instruction.
 360          * 2.When software is performing a mix of load and store operations
 361          *   within a tight loop and store operations are all writing to
 362          *   cacheable write back/write allocates memory regions, R5F may
 363          *   hang at one of the load instruction.
 364          *
 365          * To avoid the above two conditions disable linefill optimization
 366          * inside Cortex R5F.
 367          */
 368         asm("mrc p15, 0, %0, c1, c0, 1" : "=r" (actlr));
 369         actlr |= (1 << 13); /* Set DLFO bit  */
 370         asm("mcr p15, 0, %0, c1, c0, 1" : : "r" (actlr));
 371 }
 372 #endif
 373
 374 void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size)
 375 {
 376         struct ti_sci_msg_fwl_region region;
 377         struct ti_sci_fwl_ops *fwl_ops;
 378         struct ti_sci_handle *ti_sci;
 379         size_t i, j;
 380
 381         ti_sci = get_ti_sci_handle();
 382         fwl_ops = &ti_sci->ops.fwl_ops;
 383         for (i = 0; i < fwl_data_size; i++) {
 384                 for (j = 0; j <  fwl_data[i].regions; j++) {
 385                         region.fwl_id = fwl_data[i].fwl_id;
 386                         region.region = j;
 387                         region.n_permission_regs = 3;
 388
 389                         fwl_ops->get_fwl_region(ti_sci, &region);
 390
 391                         if (region.control != 0) {
 392                                 pr_debug("Attempting to disable firewall %5d (%25s)\n",
 393                                          region.fwl_id, fwl_data[i].name);
 394                                 region.control = 0;
 395
 396                                 if (fwl_ops->set_fwl_region(ti_sci, &region))
 397                                         pr_err("Could not disable firewall %5d (%25s)\n",
 398                                                region.fwl_id, fwl_data[i].name);
 399                         }
 400                 }
 401         }
 402 }
 403
 404 void spl_enable_dcache(void)
 405 {
 406 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
 407         phys_addr_t ram_top = CONFIG_SYS_SDRAM_BASE;
 408
 409         dram_init_banksize();
 410
 411         /* reserve TLB table */
 412         gd->arch.tlb_size = PGTABLE_SIZE;
 413
 414         ram_top += get_effective_memsize();
 415         /* keep ram_top in the 32-bit address space */
 416         if (ram_top >= 0x100000000)
 417                 ram_top = (phys_addr_t) 0x100000000;
 418
 419         gd->arch.tlb_addr = ram_top - gd->arch.tlb_size;
 420         debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
 421               gd->arch.tlb_addr + gd->arch.tlb_size);
 422
 423         dcache_enable();
 424 #endif
 425 }
 426
 427 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
 428 void spl_board_prepare_for_boot(void)
 429 {
 430         dcache_disable();
 431 }
 432
 433 void spl_board_prepare_for_linux(void)
 434 {
 435         dcache_disable();
 436 }
 437 #endif