arch/arm/mach-k3/common.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * K3: Common Architecture initialization
   4  *
   5  * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
   6  *      Lokesh Vutla <lokeshvutla@ti.com>
   7  */
   8
   9 #include <common.h>
  10 #include <cpu_func.h>
  11 #include <image.h>
  12 #include <init.h>
  13 #include <log.h>
  14 #include <spl.h>
  15 #include <asm/global_data.h>
  16 #include "common.h"
  17 #include <dm.h>
  18 #include <remoteproc.h>
  19 #include <asm/cache.h>
  20 #include <linux/soc/ti/ti_sci_protocol.h>
  21 #include <fdt_support.h>
  22 #include <asm/hardware.h>
  23 #include <asm/io.h>
  24 #include <fs_loader.h>
  25 #include <fs.h>
  26 #include <env.h>
  27 #include <elf.h>
  28 #include <soc.h>
  29
  30 #if IS_ENABLED(CONFIG_SYS_K3_SPL_ATF)
  31 enum {
  32         IMAGE_ID_ATF,
  33         IMAGE_ID_OPTEE,
  34         IMAGE_ID_SPL,
  35         IMAGE_ID_DM_FW,
  36         IMAGE_AMT,
  37 };
  38
  39 #if CONFIG_IS_ENABLED(FIT_IMAGE_POST_PROCESS)
  40 static const char *image_os_match[IMAGE_AMT] = {
  41         "arm-trusted-firmware",
  42         "tee",
  43         "U-Boot",
  44         "DM",
  45 };
  46 #endif
  47
  48 static struct image_info fit_image_info[IMAGE_AMT];
  49 #endif
  50
  51 struct ti_sci_handle *get_ti_sci_handle(void)
  52 {
  53         struct udevice *dev;
  54         int ret;
  55
  56         ret = uclass_get_device_by_driver(UCLASS_FIRMWARE,
  57                                           DM_DRIVER_GET(ti_sci), &dev);
  58         if (ret)
  59                 panic("Failed to get SYSFW (%d)\n", ret);
  60
  61         return (struct ti_sci_handle *)ti_sci_get_handle_from_sysfw(dev);
  62 }
  63
  64 void k3_sysfw_print_ver(void)
  65 {
  66         struct ti_sci_handle *ti_sci = get_ti_sci_handle();
  67         char fw_desc[sizeof(ti_sci->version.firmware_description) + 1];
  68
  69         /*
  70          * Output System Firmware version info. Note that since the
  71          * 'firmware_description' field is not guaranteed to be zero-
  72          * terminated we manually add a \0 terminator if needed. Further
  73          * note that we intentionally no longer rely on the extended
  74          * printf() formatter '%.*s' to not having to require a more
  75          * full-featured printf() implementation.
  76          */
  77         strncpy(fw_desc, ti_sci->version.firmware_description,
  78                 sizeof(ti_sci->version.firmware_description));
  79         fw_desc[sizeof(fw_desc) - 1] = '\0';
  80
  81         printf("SYSFW ABI: %d.%d (firmware rev 0x%04x '%s')\n",
  82                ti_sci->version.abi_major, ti_sci->version.abi_minor,
  83                ti_sci->version.firmware_revision, fw_desc);
  84 }
  85
  86 void mmr_unlock(phys_addr_t base, u32 partition)
  87 {
  88         /* Translate the base address */
  89         phys_addr_t part_base = base + partition * CTRL_MMR0_PARTITION_SIZE;
  90
  91         /* Unlock the requested partition if locked using two-step sequence */
  92         writel(CTRLMMR_LOCK_KICK0_UNLOCK_VAL, part_base + CTRLMMR_LOCK_KICK0);
  93         writel(CTRLMMR_LOCK_KICK1_UNLOCK_VAL, part_base + CTRLMMR_LOCK_KICK1);
  94 }
  95
  96 bool is_rom_loaded_sysfw(struct rom_extended_boot_data *data)
  97 {
  98         if (strncmp(data->header, K3_ROM_BOOT_HEADER_MAGIC, 7))
  99                 return false;
 100
 101         return data->num_components > 1;
 102 }
 103
 104 DECLARE_GLOBAL_DATA_PTR;
 105
 106 #ifdef CONFIG_K3_EARLY_CONS
 107 int early_console_init(void)
 108 {
 109         struct udevice *dev;
 110         int ret;
 111
 112         gd->baudrate = CONFIG_BAUDRATE;
 113
 114         ret = uclass_get_device_by_seq(UCLASS_SERIAL, CONFIG_K3_EARLY_CONS_IDX,
 115                                        &dev);
 116         if (ret) {
 117                 printf("Error getting serial dev for early console! (%d)\n",
 118                        ret);
 119                 return ret;
 120         }
 121
 122         gd->cur_serial_dev = dev;
 123         gd->flags |= GD_FLG_SERIAL_READY;
 124         gd->have_console = 1;
 125
 126         return 0;
 127 }
 128 #endif
 129
 130 #if IS_ENABLED(CONFIG_SYS_K3_SPL_ATF)
 131
 132 void init_env(void)
 133 {
 134 #ifdef CONFIG_SPL_ENV_SUPPORT
 135         char *part;
 136
 137         env_init();
 138         env_relocate();
 139         switch (spl_boot_device()) {
 140         case BOOT_DEVICE_MMC2:
 141                 part = env_get("bootpart");
 142                 env_set("storage_interface", "mmc");
 143                 env_set("fw_dev_part", part);
 144                 break;
 145         case BOOT_DEVICE_SPI:
 146                 env_set("storage_interface", "ubi");
 147                 env_set("fw_ubi_mtdpart", "UBI");
 148                 env_set("fw_ubi_volume", "UBI0");
 149                 break;
 150         default:
 151                 printf("%s from device %u not supported!\n",
 152                        __func__, spl_boot_device());
 153                 return;
 154         }
 155 #endif
 156 }
 157
 158 int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr)
 159 {
 160         struct udevice *fsdev;
 161         char *name = NULL;
 162         int size = 0;
 163
 164         if (!IS_ENABLED(CONFIG_FS_LOADER))
 165                 return 0;
 166
 167         *loadaddr = 0;
 168 #ifdef CONFIG_SPL_ENV_SUPPORT
 169         switch (spl_boot_device()) {
 170         case BOOT_DEVICE_MMC2:
 171                 name = env_get(name_fw);
 172                 *loadaddr = env_get_hex(name_loadaddr, *loadaddr);
 173                 break;
 174         default:
 175                 printf("Loading rproc fw image from device %u not supported!\n",
 176                        spl_boot_device());
 177                 return 0;
 178         }
 179 #endif
 180         if (!*loadaddr)
 181                 return 0;
 182
 183         if (!get_fs_loader(&fsdev)) {
 184                 size = request_firmware_into_buf(fsdev, name, (void *)*loadaddr,
 185                                                  0, 0);
 186         }
 187
 188         return size;
 189 }
 190
 191 void release_resources_for_core_shutdown(void)
 192 {
 193         struct ti_sci_handle *ti_sci = get_ti_sci_handle();
 194         struct ti_sci_dev_ops *dev_ops = &ti_sci->ops.dev_ops;
 195         struct ti_sci_proc_ops *proc_ops = &ti_sci->ops.proc_ops;
 196         int ret;
 197         u32 i;
 198
 199         /* Iterate through list of devices to put (shutdown) */
 200         for (i = 0; i < ARRAY_SIZE(put_device_ids); i++) {
 201                 u32 id = put_device_ids[i];
 202
 203                 ret = dev_ops->put_device(ti_sci, id);
 204                 if (ret)
 205                         panic("Failed to put device %u (%d)\n", id, ret);
 206         }
 207
 208         /* Iterate through list of cores to put (shutdown) */
 209         for (i = 0; i < ARRAY_SIZE(put_core_ids); i++) {
 210                 u32 id = put_core_ids[i];
 211
 212                 /*
 213                  * Queue up the core shutdown request. Note that this call
 214                  * needs to be followed up by an actual invocation of an WFE
 215                  * or WFI CPU instruction.
 216                  */
 217                 ret = proc_ops->proc_shutdown_no_wait(ti_sci, id);
 218                 if (ret)
 219                         panic("Failed sending core %u shutdown message (%d)\n",
 220                               id, ret);
 221         }
 222 }
 223
 224 void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
 225 {
 226         typedef void __noreturn (*image_entry_noargs_t)(void);
 227         struct ti_sci_handle *ti_sci = get_ti_sci_handle();
 228         u32 loadaddr = 0;
 229         int ret, size = 0, shut_cpu = 0;
 230
 231         /* Release all the exclusive devices held by SPL before starting ATF */
 232         ti_sci->ops.dev_ops.release_exclusive_devices(ti_sci);
 233
 234         ret = rproc_init();
 235         if (ret)
 236                 panic("rproc failed to be initialized (%d)\n", ret);
 237
 238         init_env();
 239
 240         if (!fit_image_info[IMAGE_ID_DM_FW].image_start) {
 241                 size = load_firmware("name_mcur5f0_0fw", "addr_mcur5f0_0load",
 242                                      &loadaddr);
 243         }
 244
 245         /*
 246          * It is assumed that remoteproc device 1 is the corresponding
 247          * Cortex-A core which runs ATF. Make sure DT reflects the same.
 248          */
 249         if (!fit_image_info[IMAGE_ID_ATF].image_start)
 250                 fit_image_info[IMAGE_ID_ATF].image_start =
 251                         spl_image->entry_point;
 252
 253         ret = rproc_load(1, fit_image_info[IMAGE_ID_ATF].image_start, 0x200);
 254         if (ret)
 255                 panic("%s: ATF failed to load on rproc (%d)\n", __func__, ret);
 256
 257 #if (CONFIG_IS_ENABLED(FIT_IMAGE_POST_PROCESS) && IS_ENABLED(CONFIG_SYS_K3_SPL_ATF))
 258         /* Authenticate ATF */
 259         void *image_addr = (void *)fit_image_info[IMAGE_ID_ATF].image_start;
 260
 261         debug("%s: Authenticating image: addr=%lx, size=%ld, os=%s\n", __func__,
 262               fit_image_info[IMAGE_ID_ATF].image_start,
 263               fit_image_info[IMAGE_ID_ATF].image_len,
 264               image_os_match[IMAGE_ID_ATF]);
 265
 266         ti_secure_image_post_process(&image_addr,
 267                                      (size_t *)&fit_image_info[IMAGE_ID_ATF].image_len);
 268
 269         /* Authenticate OPTEE */
 270         image_addr = (void *)fit_image_info[IMAGE_ID_OPTEE].image_start;
 271
 272         debug("%s: Authenticating image: addr=%lx, size=%ld, os=%s\n", __func__,
 273               fit_image_info[IMAGE_ID_OPTEE].image_start,
 274               fit_image_info[IMAGE_ID_OPTEE].image_len,
 275               image_os_match[IMAGE_ID_OPTEE]);
 276
 277         ti_secure_image_post_process(&image_addr,
 278                                      (size_t *)&fit_image_info[IMAGE_ID_OPTEE].image_len);
 279
 280 #endif
 281
 282         if (!fit_image_info[IMAGE_ID_DM_FW].image_len &&
 283             !(size > 0 && valid_elf_image(loadaddr))) {
 284                 shut_cpu = 1;
 285                 goto start_arm64;
 286         }
 287
 288         if (!fit_image_info[IMAGE_ID_DM_FW].image_start) {
 289                 loadaddr = load_elf_image_phdr(loadaddr);
 290         } else {
 291                 loadaddr = fit_image_info[IMAGE_ID_DM_FW].image_start;
 292                 if (valid_elf_image(loadaddr))
 293                         loadaddr = load_elf_image_phdr(loadaddr);
 294         }
 295
 296         debug("%s: jumping to address %x\n", __func__, loadaddr);
 297
 298 start_arm64:
 299         /* Add an extra newline to differentiate the ATF logs from SPL */
 300         printf("Starting ATF on ARM64 core...\n\n");
 301
 302         ret = rproc_start(1);
 303         if (ret)
 304                 panic("%s: ATF failed to start on rproc (%d)\n", __func__, ret);
 305
 306         if (shut_cpu) {
 307                 debug("Shutting down...\n");
 308                 release_resources_for_core_shutdown();
 309
 310                 while (1)
 311                         asm volatile("wfe");
 312         }
 313         image_entry_noargs_t image_entry = (image_entry_noargs_t)loadaddr;
 314
 315         image_entry();
 316 }
 317 #endif
 318
 319 #if CONFIG_IS_ENABLED(FIT_IMAGE_POST_PROCESS)
 320 void board_fit_image_post_process(const void *fit, int node, void **p_image,
 321                                   size_t *p_size)
 322 {
 323 #if IS_ENABLED(CONFIG_SYS_K3_SPL_ATF)
 324         int len;
 325         int i;
 326         const char *os;
 327         u32 addr;
 328
 329         os = fdt_getprop(fit, node, "os", &len);
 330         addr = fdt_getprop_u32_default_node(fit, node, 0, "entry", -1);
 331
 332         debug("%s: processing image: addr=%x, size=%d, os=%s\n", __func__,
 333               addr, *p_size, os);
 334
 335         for (i = 0; i < IMAGE_AMT; i++) {
 336                 if (!strcmp(os, image_os_match[i])) {
 337                         fit_image_info[i].image_start = addr;
 338                         fit_image_info[i].image_len = *p_size;
 339                         debug("%s: matched image for ID %d\n", __func__, i);
 340                         break;
 341                 }
 342         }
 343         /*
 344          * Only DM and the DTBs are being authenticated here,
 345          * rest will be authenticated when A72 cluster is up
 346          */
 347         if ((i != IMAGE_ID_ATF) && (i != IMAGE_ID_OPTEE))
 348 #endif
 349         {
 350                 ti_secure_image_post_process(p_image, p_size);
 351         }
 352 }
 353 #endif
 354
 355 #if defined(CONFIG_OF_LIBFDT)
 356 int fdt_fixup_msmc_ram(void *blob, char *parent_path, char *node_name)
 357 {
 358         u64 msmc_start = 0, msmc_end = 0, msmc_size, reg[2];
 359         struct ti_sci_handle *ti_sci = get_ti_sci_handle();
 360         int ret, node, subnode, len, prev_node;
 361         u32 range[4], addr, size;
 362         const fdt32_t *sub_reg;
 363
 364         ti_sci->ops.core_ops.query_msmc(ti_sci, &msmc_start, &msmc_end);
 365         msmc_size = msmc_end - msmc_start + 1;
 366         debug("%s: msmc_start = 0x%llx, msmc_size = 0x%llx\n", __func__,
 367               msmc_start, msmc_size);
 368
 369         /* find or create "msmc_sram node */
 370         ret = fdt_path_offset(blob, parent_path);
 371         if (ret < 0)
 372                 return ret;
 373
 374         node = fdt_find_or_add_subnode(blob, ret, node_name);
 375         if (node < 0)
 376                 return node;
 377
 378         ret = fdt_setprop_string(blob, node, "compatible", "mmio-sram");
 379         if (ret < 0)
 380                 return ret;
 381
 382         reg[0] = cpu_to_fdt64(msmc_start);
 383         reg[1] = cpu_to_fdt64(msmc_size);
 384         ret = fdt_setprop(blob, node, "reg", reg, sizeof(reg));
 385         if (ret < 0)
 386                 return ret;
 387
 388         fdt_setprop_cell(blob, node, "#address-cells", 1);
 389         fdt_setprop_cell(blob, node, "#size-cells", 1);
 390
 391         range[0] = 0;
 392         range[1] = cpu_to_fdt32(msmc_start >> 32);
 393         range[2] = cpu_to_fdt32(msmc_start & 0xffffffff);
 394         range[3] = cpu_to_fdt32(msmc_size);
 395         ret = fdt_setprop(blob, node, "ranges", range, sizeof(range));
 396         if (ret < 0)
 397                 return ret;
 398
 399         subnode = fdt_first_subnode(blob, node);
 400         prev_node = 0;
 401
 402         /* Look for invalid subnodes and delete them */
 403         while (subnode >= 0) {
 404                 sub_reg = fdt_getprop(blob, subnode, "reg", &len);
 405                 addr = fdt_read_number(sub_reg, 1);
 406                 sub_reg++;
 407                 size = fdt_read_number(sub_reg, 1);
 408                 debug("%s: subnode = %d, addr = 0x%x. size = 0x%x\n", __func__,
 409                       subnode, addr, size);
 410                 if (addr + size > msmc_size ||
 411                     !strncmp(fdt_get_name(blob, subnode, &len), "sysfw", 5) ||
 412                     !strncmp(fdt_get_name(blob, subnode, &len), "l3cache", 7)) {
 413                         fdt_del_node(blob, subnode);
 414                         debug("%s: deleting subnode %d\n", __func__, subnode);
 415                         if (!prev_node)
 416                                 subnode = fdt_first_subnode(blob, node);
 417                         else
 418                                 subnode = fdt_next_subnode(blob, prev_node);
 419                 } else {
 420                         prev_node = subnode;
 421                         subnode = fdt_next_subnode(blob, prev_node);
 422                 }
 423         }
 424
 425         return 0;
 426 }
 427
 428 #if defined(CONFIG_OF_SYSTEM_SETUP)
 429 int ft_system_setup(void *blob, struct bd_info *bd)
 430 {
 431         int ret;
 432
 433         ret = fdt_fixup_msmc_ram(blob, "/bus@100000", "sram@70000000");
 434         if (ret < 0)
 435                 ret = fdt_fixup_msmc_ram(blob, "/interconnect@100000",
 436                                          "sram@70000000");
 437         if (ret)
 438                 printf("%s: fixing up msmc ram failed %d\n", __func__, ret);
 439
 440         return ret;
 441 }
 442 #endif
 443
 444 #endif
 445
 446 #ifndef CONFIG_SYSRESET
 447 void reset_cpu(void)
 448 {
 449 }
 450 #endif
 451
 452 enum k3_device_type get_device_type(void)
 453 {
 454         u32 sys_status = readl(K3_SEC_MGR_SYS_STATUS);
 455
 456         u32 sys_dev_type = (sys_status & SYS_STATUS_DEV_TYPE_MASK) >>
 457                         SYS_STATUS_DEV_TYPE_SHIFT;
 458
 459         u32 sys_sub_type = (sys_status & SYS_STATUS_SUB_TYPE_MASK) >>
 460                         SYS_STATUS_SUB_TYPE_SHIFT;
 461
 462         switch (sys_dev_type) {
 463         case SYS_STATUS_DEV_TYPE_GP:
 464                 return K3_DEVICE_TYPE_GP;
 465         case SYS_STATUS_DEV_TYPE_TEST:
 466                 return K3_DEVICE_TYPE_TEST;
 467         case SYS_STATUS_DEV_TYPE_EMU:
 468                 return K3_DEVICE_TYPE_EMU;
 469         case SYS_STATUS_DEV_TYPE_HS:
 470                 if (sys_sub_type == SYS_STATUS_SUB_TYPE_VAL_FS)
 471                         return K3_DEVICE_TYPE_HS_FS;
 472                 else
 473                         return K3_DEVICE_TYPE_HS_SE;
 474         default:
 475                 return K3_DEVICE_TYPE_BAD;
 476         }
 477 }
 478
 479 #if defined(CONFIG_DISPLAY_CPUINFO)
 480 static const char *get_device_type_name(void)
 481 {
 482         enum k3_device_type type = get_device_type();
 483
 484         switch (type) {
 485         case K3_DEVICE_TYPE_GP:
 486                 return "GP";
 487         case K3_DEVICE_TYPE_TEST:
 488                 return "TEST";
 489         case K3_DEVICE_TYPE_EMU:
 490                 return "EMU";
 491         case K3_DEVICE_TYPE_HS_FS:
 492                 return "HS-FS";
 493         case K3_DEVICE_TYPE_HS_SE:
 494                 return "HS-SE";
 495         default:
 496                 return "BAD";
 497         }
 498 }
 499
 500 int print_cpuinfo(void)
 501 {
 502         struct udevice *soc;
 503         char name[64];
 504         int ret;
 505
 506         printf("SoC:   ");
 507
 508         ret = soc_get(&soc);
 509         if (ret) {
 510                 printf("UNKNOWN\n");
 511                 return 0;
 512         }
 513
 514         ret = soc_get_family(soc, name, 64);
 515         if (!ret) {
 516                 printf("%s ", name);
 517         }
 518
 519         ret = soc_get_revision(soc, name, 64);
 520         if (!ret) {
 521                 printf("%s ", name);
 522         }
 523
 524         printf("%s\n", get_device_type_name());
 525
 526         return 0;
 527 }
 528 #endif
 529
 530 #ifdef CONFIG_ARM64
 531 void board_prep_linux(struct bootm_headers *images)
 532 {
 533         debug("Linux kernel Image start = 0x%lx end = 0x%lx\n",
 534               images->os.start, images->os.end);
 535         __asm_flush_dcache_range(images->os.start,
 536                                  ROUND(images->os.end,
 537                                        CONFIG_SYS_CACHELINE_SIZE));
 538 }
 539 #endif
 540
 541 #ifdef CONFIG_CPU_V7R
 542 void disable_linefill_optimization(void)
 543 {
 544         u32 actlr;
 545
 546         /*
 547          * On K3 devices there are 2 conditions where R5F can deadlock:
 548          * 1.When software is performing series of store operations to
 549          *   cacheable write back/write allocate memory region and later
 550          *   on software execute barrier operation (DSB or DMB). R5F may
 551          *   hang at the barrier instruction.
 552          * 2.When software is performing a mix of load and store operations
 553          *   within a tight loop and store operations are all writing to
 554          *   cacheable write back/write allocates memory regions, R5F may
 555          *   hang at one of the load instruction.
 556          *
 557          * To avoid the above two conditions disable linefill optimization
 558          * inside Cortex R5F.
 559          */
 560         asm("mrc p15, 0, %0, c1, c0, 1" : "=r" (actlr));
 561         actlr |= (1 << 13); /* Set DLFO bit  */
 562         asm("mcr p15, 0, %0, c1, c0, 1" : : "r" (actlr));
 563 }
 564 #endif
 565
 566 static void remove_fwl_regions(struct fwl_data fwl_data, size_t num_regions,
 567                                enum k3_firewall_region_type fwl_type)
 568 {
 569         struct ti_sci_fwl_ops *fwl_ops;
 570         struct ti_sci_handle *ti_sci;
 571         struct ti_sci_msg_fwl_region region;
 572         size_t j;
 573
 574         ti_sci = get_ti_sci_handle();
 575         fwl_ops = &ti_sci->ops.fwl_ops;
 576
 577         for (j = 0; j < fwl_data.regions; j++) {
 578                 region.fwl_id = fwl_data.fwl_id;
 579                 region.region = j;
 580                 region.n_permission_regs = 3;
 581
 582                 fwl_ops->get_fwl_region(ti_sci, &region);
 583
 584                 /* Don't disable the background regions */
 585                 if (region.control != 0 &&
 586                     ((region.control & K3_FIREWALL_BACKGROUND_BIT) ==
 587                      fwl_type)) {
 588                         pr_debug("Attempting to disable firewall %5d (%25s)\n",
 589                                  region.fwl_id, fwl_data.name);
 590                         region.control = 0;
 591
 592                         if (fwl_ops->set_fwl_region(ti_sci, &region))
 593                                 pr_err("Could not disable firewall %5d (%25s)\n",
 594                                        region.fwl_id, fwl_data.name);
 595                 }
 596         }
 597 }
 598
 599 void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size)
 600 {
 601         size_t i;
 602
 603         for (i = 0; i < fwl_data_size; i++) {
 604                 remove_fwl_regions(fwl_data[i], fwl_data[i].regions,
 605                                    K3_FIREWALL_REGION_FOREGROUND);
 606                 remove_fwl_regions(fwl_data[i], fwl_data[i].regions,
 607                                    K3_FIREWALL_REGION_BACKGROUND);
 608         }
 609 }
 610
 611 void spl_enable_dcache(void)
 612 {
 613 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
 614         phys_addr_t ram_top = CFG_SYS_SDRAM_BASE;
 615
 616         dram_init();
 617
 618         /* reserve TLB table */
 619         gd->arch.tlb_size = PGTABLE_SIZE;
 620
 621         ram_top += get_effective_memsize();
 622         /* keep ram_top in the 32-bit address space */
 623         if (ram_top >= 0x100000000)
 624                 ram_top = (phys_addr_t) 0x100000000;
 625
 626         gd->arch.tlb_addr = ram_top - gd->arch.tlb_size;
 627         debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
 628               gd->arch.tlb_addr + gd->arch.tlb_size);
 629
 630         dcache_enable();
 631 #endif
 632 }
 633
 634 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
 635 void spl_board_prepare_for_boot(void)
 636 {
 637         dcache_disable();
 638 }
 639
 640 void spl_board_prepare_for_linux(void)
 641 {
 642         dcache_disable();
 643 }
 644 #endif
 645
 646 int misc_init_r(void)
 647 {
 648         if (IS_ENABLED(CONFIG_TI_AM65_CPSW_NUSS)) {
 649                 struct udevice *dev;
 650                 int ret;
 651
 652                 ret = uclass_get_device_by_driver(UCLASS_MISC,
 653                                                   DM_DRIVER_GET(am65_cpsw_nuss),
 654                                                   &dev);
 655                 if (ret)
 656                         printf("Failed to probe am65_cpsw_nuss driver\n");
 657         }
 658
 659         /* Default FIT boot on HS-SE devices */
 660         if (get_device_type() == K3_DEVICE_TYPE_HS_SE)
 661                 env_set("boot_fit", "1");
 662
 663         return 0;
 664 }
 665
 666 /**
 667  * do_board_detect() - Detect board description
 668  *
 669  * Function to detect board description. This is expected to be
 670  * overridden in the SoC family board file where desired.
 671  */
 672 void __weak do_board_detect(void)
 673 {
 674 }