arch/arm/mach-k3/am642_init.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * AM642: SoC specific initialization
   4  *
   5  * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
   6  *      Keerthy <j-keerthy@ti.com>
   7  *      Dave Gerlach <d-gerlach@ti.com>
   8  */
   9
  10 #include <common.h>
  11 #include <fdt_support.h>
  12 #include <spl.h>
  13 #include <asm/io.h>
  14 #include <asm/arch/hardware.h>
  15 #include <asm/arch/sysfw-loader.h>
  16 #include <asm/arch/sys_proto.h>
  17 #include "common.h"
  18 #include <asm/arch/sys_proto.h>
  19 #include <linux/soc/ti/ti_sci_protocol.h>
  20 #include <dm.h>
  21 #include <dm/uclass-internal.h>
  22 #include <dm/pinctrl.h>
  23 #include <mmc.h>
  24 #include <dm/root.h>
  25
  26 #define CTRLMMR_MCU_RST_CTRL                    0x04518170
  27
  28 static void ctrl_mmr_unlock(void)
  29 {
  30         /* Unlock all PADCFG_MMR1 module registers */
  31         mmr_unlock(PADCFG_MMR1_BASE, 1);
  32
  33         /* Unlock all MCU_CTRL_MMR0 module registers */
  34         mmr_unlock(MCU_CTRL_MMR0_BASE, 0);
  35         mmr_unlock(MCU_CTRL_MMR0_BASE, 1);
  36         mmr_unlock(MCU_CTRL_MMR0_BASE, 2);
  37         mmr_unlock(MCU_CTRL_MMR0_BASE, 3);
  38         mmr_unlock(MCU_CTRL_MMR0_BASE, 4);
  39         mmr_unlock(MCU_CTRL_MMR0_BASE, 6);
  40
  41         /* Unlock all CTRL_MMR0 module registers */
  42         mmr_unlock(CTRL_MMR0_BASE, 0);
  43         mmr_unlock(CTRL_MMR0_BASE, 1);
  44         mmr_unlock(CTRL_MMR0_BASE, 2);
  45         mmr_unlock(CTRL_MMR0_BASE, 3);
  46         mmr_unlock(CTRL_MMR0_BASE, 5);
  47         mmr_unlock(CTRL_MMR0_BASE, 6);
  48
  49         /* Unlock all MCU_PADCFG_MMR1 module registers */
  50         mmr_unlock(MCU_PADCFG_MMR1_BASE, 1);
  51 }
  52
  53 /*
  54  * This uninitialized global variable would normal end up in the .bss section,
  55  * but the .bss is cleared between writing and reading this variable, so move
  56  * it to the .data section.
  57  */
  58 u32 bootindex __section(".data");
  59 static struct rom_extended_boot_data bootdata __section(".data");
  60
  61 static void store_boot_info_from_rom(void)
  62 {
  63         bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
  64         memcpy(&bootdata, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO,
  65                sizeof(struct rom_extended_boot_data));
  66 }
  67
  68 #if defined(CONFIG_K3_LOAD_SYSFW) && CONFIG_IS_ENABLED(DM_MMC)
  69 void k3_mmc_stop_clock(void)
  70 {
  71         if (spl_boot_device() == BOOT_DEVICE_MMC1) {
  72                 struct mmc *mmc = find_mmc_device(0);
  73
  74                 if (!mmc)
  75                         return;
  76
  77                 mmc->saved_clock = mmc->clock;
  78                 mmc_set_clock(mmc, 0, true);
  79         }
  80 }
  81
  82 void k3_mmc_restart_clock(void)
  83 {
  84         if (spl_boot_device() == BOOT_DEVICE_MMC1) {
  85                 struct mmc *mmc = find_mmc_device(0);
  86
  87                 if (!mmc)
  88                         return;
  89
  90                 mmc_set_clock(mmc, mmc->saved_clock, false);
  91         }
  92 }
  93 #else
  94 void k3_mmc_stop_clock(void) {}
  95 void k3_mmc_restart_clock(void) {}
  96 #endif
  97
  98 #ifdef CONFIG_SPL_OF_LIST
  99 void do_dt_magic(void)
 100 {
 101         int ret, rescan;
 102
 103         if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT))
 104                 do_board_detect();
 105
 106         /*
 107          * Board detection has been done.
 108          * Let us see if another dtb wouldn't be a better match
 109          * for our board
 110          */
 111         if (IS_ENABLED(CONFIG_CPU_V7R)) {
 112                 ret = fdtdec_resetup(&rescan);
 113                 if (!ret && rescan) {
 114                         dm_uninit();
 115                         dm_init_and_scan(true);
 116                 }
 117         }
 118 }
 119 #endif
 120
 121 #if CONFIG_IS_ENABLED(USB_STORAGE)
 122 static int fixup_usb_boot(const void *fdt_blob)
 123 {
 124         int ret = 0;
 125
 126         switch (spl_boot_device()) {
 127         case BOOT_DEVICE_USB:
 128                 /*
 129                  * If the boot mode is host, fixup the dr_mode to host
 130                  * before cdns3 bind takes place
 131                  */
 132                 ret = fdt_find_and_setprop((void *)fdt_blob,
 133                                            "/bus@f4000/cdns-usb@f900000/usb@f400000",
 134                                            "dr_mode", "host", 5, 0);
 135                 if (ret)
 136                         printf("%s: fdt_find_and_setprop() failed:%d\n",
 137                                __func__, ret);
 138                 fallthrough;
 139         default:
 140                 break;
 141         }
 142
 143         return ret;
 144 }
 145
 146 int fdtdec_board_setup(const void *fdt_blob)
 147 {
 148         /* Can use the pointer from the function parameters */
 149         return fixup_usb_boot(fdt_blob);
 150 }
 151 #endif
 152
 153 #if defined(CONFIG_ESM_K3)
 154 static void enable_mcu_esm_reset(void)
 155 {
 156         /* Set CTRLMMR_MCU_RST_CTRL:MCU_ESM_ERROR_RST_EN_Z  to '0' (low active) */
 157         u32 stat = readl(CTRLMMR_MCU_RST_CTRL);
 158
 159         stat &= 0xFFFDFFFF;
 160         writel(stat, CTRLMMR_MCU_RST_CTRL);
 161 }
 162 #endif
 163
 164 void board_init_f(ulong dummy)
 165 {
 166 #if defined(CONFIG_K3_LOAD_SYSFW) || defined(CONFIG_K3_AM64_DDRSS) || defined(CONFIG_ESM_K3)
 167         struct udevice *dev;
 168         int ret;
 169 #endif
 170
 171 #if defined(CONFIG_CPU_V7R)
 172         setup_k3_mpu_regions();
 173 #endif
 174
 175         /*
 176          * Cannot delay this further as there is a chance that
 177          * K3_BOOT_PARAM_TABLE_INDEX can be over written by SPL MALLOC section.
 178          */
 179         store_boot_info_from_rom();
 180
 181         ctrl_mmr_unlock();
 182
 183         /* Init DM early */
 184         spl_early_init();
 185
 186         preloader_console_init();
 187
 188         do_dt_magic();
 189
 190 #if defined(CONFIG_K3_LOAD_SYSFW)
 191         /*
 192          * Process pinctrl for serial3 a.k.a. MAIN UART1 module and continue
 193          * regardless of the result of pinctrl. Do this without probing the
 194          * device, but instead by searching the device that would request the
 195          * given sequence number if probed. The UART will be used by the system
 196          * firmware (SYSFW) image for various purposes and SYSFW depends on us
 197          * to initialize its pin settings.
 198          */
 199         ret = uclass_find_device_by_seq(UCLASS_SERIAL, 3, &dev);
 200         if (!ret)
 201                 pinctrl_select_state(dev, "default");
 202
 203         /*
 204          * Load, start up, and configure system controller firmware.
 205          * This will determine whether or not ROM has already loaded
 206          * system firmware and if so, will only perform needed config
 207          * and not attempt to load firmware again.
 208          */
 209         k3_sysfw_loader(is_rom_loaded_sysfw(&bootdata), k3_mmc_stop_clock,
 210                         k3_mmc_restart_clock);
 211 #endif
 212
 213         /* Output System Firmware version info */
 214         k3_sysfw_print_ver();
 215
 216 #if defined(CONFIG_ESM_K3)
 217         /* Probe/configure ESM0 */
 218         ret = uclass_get_device_by_name(UCLASS_MISC, "esm@420000", &dev);
 219         if (ret)
 220                 printf("esm main init failed: %d\n", ret);
 221
 222         /* Probe/configure MCUESM */
 223         ret = uclass_get_device_by_name(UCLASS_MISC, "esm@4100000", &dev);
 224         if (ret)
 225                 printf("esm mcu init failed: %d\n", ret);
 226
 227         enable_mcu_esm_reset();
 228 #endif
 229
 230 #if defined(CONFIG_K3_AM64_DDRSS)
 231         ret = uclass_get_device(UCLASS_RAM, 0, &dev);
 232         if (ret)
 233                 panic("DRAM init failed: %d\n", ret);
 234 #endif
 235         if (IS_ENABLED(CONFIG_SPL_ETH) && IS_ENABLED(CONFIG_TI_AM65_CPSW_NUSS) &&
 236             spl_boot_device() == BOOT_DEVICE_ETHERNET) {
 237                 struct udevice *cpswdev;
 238
 239                 if (uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(am65_cpsw_nuss), &cpswdev))
 240                         printf("Failed to probe am65_cpsw_nuss driver\n");
 241         }
 242 }
 243
 244 u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)
 245 {
 246         switch (boot_device) {
 247         case BOOT_DEVICE_MMC1:
 248                 return MMCSD_MODE_EMMCBOOT;
 249
 250         case BOOT_DEVICE_MMC2:
 251                 return MMCSD_MODE_FS;
 252
 253         default:
 254                 return MMCSD_MODE_RAW;
 255         }
 256 }
 257
 258 static u32 __get_backup_bootmedia(u32 main_devstat)
 259 {
 260         u32 bkup_bootmode =
 261             (main_devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_MASK) >>
 262             MAIN_DEVSTAT_BACKUP_BOOTMODE_SHIFT;
 263         u32 bkup_bootmode_cfg =
 264             (main_devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_MASK) >>
 265             MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_SHIFT;
 266
 267         switch (bkup_bootmode) {
 268         case BACKUP_BOOT_DEVICE_UART:
 269                 return BOOT_DEVICE_UART;
 270
 271         case BACKUP_BOOT_DEVICE_DFU:
 272                 if (bkup_bootmode_cfg & MAIN_DEVSTAT_BACKUP_USB_MODE_MASK)
 273                         return BOOT_DEVICE_USB;
 274                 return BOOT_DEVICE_DFU;
 275
 276
 277         case BACKUP_BOOT_DEVICE_ETHERNET:
 278                 return BOOT_DEVICE_ETHERNET;
 279
 280         case BACKUP_BOOT_DEVICE_MMC:
 281                 if (bkup_bootmode_cfg)
 282                         return BOOT_DEVICE_MMC2;
 283                 return BOOT_DEVICE_MMC1;
 284
 285         case BACKUP_BOOT_DEVICE_SPI:
 286                 return BOOT_DEVICE_SPI;
 287
 288         case BACKUP_BOOT_DEVICE_I2C:
 289                 return BOOT_DEVICE_I2C;
 290         };
 291
 292         return BOOT_DEVICE_RAM;
 293 }
 294
 295 static u32 __get_primary_bootmedia(u32 main_devstat)
 296 {
 297         u32 bootmode = (main_devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK) >>
 298             MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT;
 299         u32 bootmode_cfg =
 300             (main_devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >>
 301             MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT;
 302
 303         switch (bootmode) {
 304         case BOOT_DEVICE_OSPI:
 305                 fallthrough;
 306         case BOOT_DEVICE_QSPI:
 307                 fallthrough;
 308         case BOOT_DEVICE_XSPI:
 309                 fallthrough;
 310         case BOOT_DEVICE_SPI:
 311                 return BOOT_DEVICE_SPI;
 312
 313         case BOOT_DEVICE_ETHERNET_RGMII:
 314                 fallthrough;
 315         case BOOT_DEVICE_ETHERNET_RMII:
 316                 return BOOT_DEVICE_ETHERNET;
 317
 318         case BOOT_DEVICE_EMMC:
 319                 return BOOT_DEVICE_MMC1;
 320
 321         case BOOT_DEVICE_MMC:
 322                 if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK) >>
 323                      MAIN_DEVSTAT_PRIMARY_MMC_PORT_SHIFT)
 324                         return BOOT_DEVICE_MMC2;
 325                 return BOOT_DEVICE_MMC1;
 326
 327         case BOOT_DEVICE_DFU:
 328                 if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_USB_MODE_MASK) >>
 329                     MAIN_DEVSTAT_PRIMARY_USB_MODE_SHIFT)
 330                         return BOOT_DEVICE_USB;
 331                 return BOOT_DEVICE_DFU;
 332
 333         case BOOT_DEVICE_NOBOOT:
 334                 return BOOT_DEVICE_RAM;
 335         }
 336
 337         return bootmode;
 338 }
 339
 340 u32 spl_boot_device(void)
 341 {
 342         u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT);
 343
 344         if (bootindex == K3_PRIMARY_BOOTMODE)
 345                 return __get_primary_bootmedia(devstat);
 346         else
 347                 return __get_backup_bootmedia(devstat);
 348 }
 349
 350 #if defined(CONFIG_SYS_K3_SPL_ATF)
 351
 352 #define AM64X_DEV_RTI8                  127
 353 #define AM64X_DEV_RTI9                  128
 354 #define AM64X_DEV_R5FSS0_CORE0          121
 355 #define AM64X_DEV_R5FSS0_CORE1          122
 356
 357 void release_resources_for_core_shutdown(void)
 358 {
 359         struct ti_sci_handle *ti_sci = get_ti_sci_handle();
 360         struct ti_sci_dev_ops *dev_ops = &ti_sci->ops.dev_ops;
 361         struct ti_sci_proc_ops *proc_ops = &ti_sci->ops.proc_ops;
 362         int ret;
 363         u32 i;
 364
 365         const u32 put_device_ids[] = {
 366                 AM64X_DEV_RTI9,
 367                 AM64X_DEV_RTI8,
 368         };
 369
 370         /* Iterate through list of devices to put (shutdown) */
 371         for (i = 0; i < ARRAY_SIZE(put_device_ids); i++) {
 372                 u32 id = put_device_ids[i];
 373
 374                 ret = dev_ops->put_device(ti_sci, id);
 375                 if (ret)
 376                         panic("Failed to put device %u (%d)\n", id, ret);
 377         }
 378
 379         const u32 put_core_ids[] = {
 380                 AM64X_DEV_R5FSS0_CORE1,
 381                 AM64X_DEV_R5FSS0_CORE0, /* Handle CPU0 after CPU1 */
 382         };
 383
 384         /* Iterate through list of cores to put (shutdown) */
 385         for (i = 0; i < ARRAY_SIZE(put_core_ids); i++) {
 386                 u32 id = put_core_ids[i];
 387
 388                 /*
 389                  * Queue up the core shutdown request. Note that this call
 390                  * needs to be followed up by an actual invocation of an WFE
 391                  * or WFI CPU instruction.
 392                  */
 393                 ret = proc_ops->proc_shutdown_no_wait(ti_sci, id);
 394                 if (ret)
 395                         panic("Failed sending core %u shutdown message (%d)\n",
 396                               id, ret);
 397         }
 398 }
 399 #endif