arm64: mach-k3: am625_init: Probe ESM nodes
[platform/kernel/u-boot.git] / arch / arm / mach-k3 / am625_init.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * AM625: SoC specific initialization
4  *
5  * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
6  *      Suman Anna <s-anna@ti.com>
7  */
8
9 #include <spl.h>
10 #include <asm/io.h>
11 #include <asm/arch/hardware.h>
12 #include <asm/arch/sysfw-loader.h>
13 #include "common.h"
14 #include <dm.h>
15 #include <dm/uclass-internal.h>
16 #include <dm/pinctrl.h>
17
18 #if defined(CONFIG_SPL_BUILD)
19
20 /*
21  * This uninitialized global variable would normal end up in the .bss section,
22  * but the .bss is cleared between writing and reading this variable, so move
23  * it to the .data section.
24  */
25 u32 bootindex __section(".data");
26 static struct rom_extended_boot_data bootdata __section(".data");
27
28 static void store_boot_info_from_rom(void)
29 {
30         bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
31         memcpy(&bootdata, (uintptr_t *)ROM_ENTENDED_BOOT_DATA_INFO,
32                sizeof(struct rom_extended_boot_data));
33 }
34
35 static void ctrl_mmr_unlock(void)
36 {
37         /* Unlock all WKUP_CTRL_MMR0 module registers */
38         mmr_unlock(WKUP_CTRL_MMR0_BASE, 0);
39         mmr_unlock(WKUP_CTRL_MMR0_BASE, 1);
40         mmr_unlock(WKUP_CTRL_MMR0_BASE, 2);
41         mmr_unlock(WKUP_CTRL_MMR0_BASE, 3);
42         mmr_unlock(WKUP_CTRL_MMR0_BASE, 4);
43         mmr_unlock(WKUP_CTRL_MMR0_BASE, 5);
44         mmr_unlock(WKUP_CTRL_MMR0_BASE, 6);
45         mmr_unlock(WKUP_CTRL_MMR0_BASE, 7);
46
47         /* Unlock all CTRL_MMR0 module registers */
48         mmr_unlock(CTRL_MMR0_BASE, 0);
49         mmr_unlock(CTRL_MMR0_BASE, 1);
50         mmr_unlock(CTRL_MMR0_BASE, 2);
51         mmr_unlock(CTRL_MMR0_BASE, 4);
52         mmr_unlock(CTRL_MMR0_BASE, 6);
53
54         /* Unlock all MCU_CTRL_MMR0 module registers */
55         mmr_unlock(MCU_CTRL_MMR0_BASE, 0);
56         mmr_unlock(MCU_CTRL_MMR0_BASE, 1);
57         mmr_unlock(MCU_CTRL_MMR0_BASE, 2);
58         mmr_unlock(MCU_CTRL_MMR0_BASE, 3);
59         mmr_unlock(MCU_CTRL_MMR0_BASE, 4);
60         mmr_unlock(MCU_CTRL_MMR0_BASE, 6);
61
62         /* Unlock PADCFG_CTRL_MMR padconf registers */
63         mmr_unlock(PADCFG_MMR0_BASE, 1);
64         mmr_unlock(PADCFG_MMR1_BASE, 1);
65 }
66
67 static __maybe_unused void enable_mcu_esm_reset(void)
68 {
69         /* Set CTRLMMR_MCU_RST_CTRL:MCU_ESM_ERROR_RST_EN_Z  to '0' (low active) */
70         u32 stat = readl(CTRLMMR_MCU_RST_CTRL);
71
72         stat &= RST_CTRL_ESM_ERROR_RST_EN_Z_MASK;
73         writel(stat, CTRLMMR_MCU_RST_CTRL);
74 }
75
76 void board_init_f(ulong dummy)
77 {
78         struct udevice *dev;
79         int ret;
80
81 #if defined(CONFIG_CPU_V7R)
82         setup_k3_mpu_regions();
83 #endif
84
85         /*
86          * Cannot delay this further as there is a chance that
87          * K3_BOOT_PARAM_TABLE_INDEX can be over written by SPL MALLOC section.
88          */
89         store_boot_info_from_rom();
90
91         ctrl_mmr_unlock();
92
93         /* Init DM early */
94         spl_early_init();
95
96         /*
97          * Process pinctrl for the serial0 and serial3, aka WKUP_UART0 and
98          * MAIN_UART1 modules and continue regardless of the result of pinctrl.
99          * Do this without probing the device, but instead by searching the
100          * device that would request the given sequence number if probed. The
101          * UARTs will be used by the DM firmware and TIFS firmware images
102          * respectively and the firmware depend on SPL to initialize the pin
103          * settings.
104          */
105         ret = uclass_find_device_by_seq(UCLASS_SERIAL, 0, &dev);
106         if (!ret)
107                 pinctrl_select_state(dev, "default");
108
109         ret = uclass_find_device_by_seq(UCLASS_SERIAL, 3, &dev);
110         if (!ret)
111                 pinctrl_select_state(dev, "default");
112
113         preloader_console_init();
114
115 #ifdef CONFIG_K3_EARLY_CONS
116         /*
117          * Allow establishing an early console as required for example when
118          * doing a UART-based boot. Note that this console may not "survive"
119          * through a SYSFW PM-init step and will need a re-init in some way
120          * due to changing module clock frequencies.
121          */
122         early_console_init();
123 #endif
124
125 #if defined(CONFIG_K3_LOAD_SYSFW)
126         /*
127          * Configure and start up system controller firmware. Provide
128          * the U-Boot console init function to the SYSFW post-PM configuration
129          * callback hook, effectively switching on (or over) the console
130          * output.
131          */
132         ret = is_rom_loaded_sysfw(&bootdata);
133         if (!ret)
134                 panic("ROM has not loaded TIFS firmware\n");
135
136         k3_sysfw_loader(true, NULL, NULL);
137 #endif
138
139         /*
140          * Force probe of clk_k3 driver here to ensure basic default clock
141          * configuration is always done.
142          */
143         if (IS_ENABLED(CONFIG_SPL_CLK_K3)) {
144                 ret = uclass_get_device_by_driver(UCLASS_CLK,
145                                                   DM_DRIVER_GET(ti_clk),
146                                                   &dev);
147                 if (ret)
148                         printf("Failed to initialize clk-k3!\n");
149         }
150
151         /* Output System Firmware version info */
152         k3_sysfw_print_ver();
153
154         if (IS_ENABLED(CONFIG_ESM_K3)) {
155                 /* Probe/configure ESM0 */
156                 ret = uclass_get_device_by_name(UCLASS_MISC, "esm@420000", &dev);
157                 if (ret)
158                         printf("esm main init failed: %d\n", ret);
159
160                 /* Probe/configure MCUESM */
161                 ret = uclass_get_device_by_name(UCLASS_MISC, "esm@4100000", &dev);
162                 if (ret)
163                         printf("esm mcu init failed: %d\n", ret);
164
165                 enable_mcu_esm_reset();
166         }
167
168 #if defined(CONFIG_K3_AM64_DDRSS)
169         ret = uclass_get_device(UCLASS_RAM, 0, &dev);
170         if (ret)
171                 panic("DRAM init failed: %d\n", ret);
172 #endif
173 }
174
175 u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)
176 {
177         u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT);
178         u32 bootmode_cfg = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >>
179                             MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT;
180
181         switch (boot_device) {
182         case BOOT_DEVICE_MMC1:
183                 if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_FS_RAW_MASK) >>
184                      MAIN_DEVSTAT_PRIMARY_MMC_FS_RAW_SHIFT)
185                         return MMCSD_MODE_EMMCBOOT;
186                 return MMCSD_MODE_FS;
187
188         case BOOT_DEVICE_MMC2:
189                 return MMCSD_MODE_FS;
190
191         default:
192                 return MMCSD_MODE_RAW;
193         }
194 }
195
196 static u32 __get_backup_bootmedia(u32 devstat)
197 {
198         u32 bkup_bootmode = (devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_MASK) >>
199                                 MAIN_DEVSTAT_BACKUP_BOOTMODE_SHIFT;
200         u32 bkup_bootmode_cfg =
201                         (devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_MASK) >>
202                                 MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_SHIFT;
203
204         switch (bkup_bootmode) {
205         case BACKUP_BOOT_DEVICE_UART:
206                 return BOOT_DEVICE_UART;
207
208         case BACKUP_BOOT_DEVICE_USB:
209                 return BOOT_DEVICE_USB;
210
211         case BACKUP_BOOT_DEVICE_ETHERNET:
212                 return BOOT_DEVICE_ETHERNET;
213
214         case BACKUP_BOOT_DEVICE_MMC:
215                 if (bkup_bootmode_cfg)
216                         return BOOT_DEVICE_MMC2;
217                 return BOOT_DEVICE_MMC1;
218
219         case BACKUP_BOOT_DEVICE_SPI:
220                 return BOOT_DEVICE_SPI;
221
222         case BACKUP_BOOT_DEVICE_I2C:
223                 return BOOT_DEVICE_I2C;
224
225         case BACKUP_BOOT_DEVICE_DFU:
226                 if (bkup_bootmode_cfg & MAIN_DEVSTAT_BACKUP_USB_MODE_MASK)
227                         return BOOT_DEVICE_USB;
228                 return BOOT_DEVICE_DFU;
229         };
230
231         return BOOT_DEVICE_RAM;
232 }
233
234 static u32 __get_primary_bootmedia(u32 devstat)
235 {
236         u32 bootmode = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK) >>
237                                 MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT;
238         u32 bootmode_cfg = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >>
239                                 MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT;
240
241         switch (bootmode) {
242         case BOOT_DEVICE_OSPI:
243                 fallthrough;
244         case BOOT_DEVICE_QSPI:
245                 fallthrough;
246         case BOOT_DEVICE_XSPI:
247                 fallthrough;
248         case BOOT_DEVICE_SPI:
249                 return BOOT_DEVICE_SPI;
250
251         case BOOT_DEVICE_ETHERNET_RGMII:
252                 fallthrough;
253         case BOOT_DEVICE_ETHERNET_RMII:
254                 return BOOT_DEVICE_ETHERNET;
255
256         case BOOT_DEVICE_EMMC:
257                 return BOOT_DEVICE_MMC1;
258
259         case BOOT_DEVICE_MMC:
260                 if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK) >>
261                                 MAIN_DEVSTAT_PRIMARY_MMC_PORT_SHIFT)
262                         return BOOT_DEVICE_MMC2;
263                 return BOOT_DEVICE_MMC1;
264
265         case BOOT_DEVICE_DFU:
266                 if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_USB_MODE_MASK) >>
267                     MAIN_DEVSTAT_PRIMARY_USB_MODE_SHIFT)
268                         return BOOT_DEVICE_USB;
269                 return BOOT_DEVICE_DFU;
270
271         case BOOT_DEVICE_NOBOOT:
272                 return BOOT_DEVICE_RAM;
273         }
274
275         return bootmode;
276 }
277
278 u32 spl_boot_device(void)
279 {
280         u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT);
281         u32 bootmedia;
282
283         if (bootindex == K3_PRIMARY_BOOTMODE)
284                 bootmedia = __get_primary_bootmedia(devstat);
285         else
286                 bootmedia = __get_backup_bootmedia(devstat);
287
288         debug("am625_init: %s: devstat = 0x%x bootmedia = 0x%x bootindex = %d\n",
289               __func__, devstat, bootmedia, bootindex);
290
291         return bootmedia;
292 }
293
294 #endif /* CONFIG_SPL_BUILD */