2 * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/system.h>
12 #include <asm/arch/clock.h>
13 #include <asm/arch/sys_proto.h>
14 #include <asm/mach-imx/hab.h>
16 /* -------- start of HAB API updates ------------*/
18 #define hab_rvt_report_event_p \
21 ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
22 (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
23 ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
24 (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
25 ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
26 ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT) \
29 #define hab_rvt_report_status_p \
32 ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
33 (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
34 ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
35 (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
36 ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
37 ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS) \
40 #define hab_rvt_authenticate_image_p \
43 ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
44 (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
45 ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
46 (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
47 ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
48 ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE) \
51 #define hab_rvt_entry_p \
54 ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
55 (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
56 ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
57 (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
58 ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
59 ((hab_rvt_entry_t *)HAB_RVT_ENTRY) \
62 #define hab_rvt_exit_p \
65 ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
66 (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
67 ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
68 (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
69 ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
70 ((hab_rvt_exit_t *)HAB_RVT_EXIT) \
73 #define ALIGN_SIZE 0x1000
74 #define MX6DQ_PU_IROM_MMU_EN_VAR 0x009024a8
75 #define MX6DLS_PU_IROM_MMU_EN_VAR 0x00901dd0
76 #define MX6SL_PU_IROM_MMU_EN_VAR 0x00900a18
77 #define IS_HAB_ENABLED_BIT \
78 (is_soc_type(MXC_SOC_MX7ULP) ? 0x80000000 : \
79 (is_soc_type(MXC_SOC_MX7) ? 0x2000000 : 0x2))
81 static bool is_hab_enabled(void);
83 #if !defined(CONFIG_SPL_BUILD)
85 #define MAX_RECORD_BYTES (8*1024) /* 4 kbytes */
88 uint8_t tag; /* Tag */
89 uint8_t len[2]; /* Length */
90 uint8_t par; /* Version */
91 uint8_t contents[MAX_RECORD_BYTES];/* Record Data */
95 char *rsn_str[] = {"RSN = HAB_RSN_ANY (0x00)\n",
96 "RSN = HAB_ENG_FAIL (0x30)\n",
97 "RSN = HAB_INV_ADDRESS (0x22)\n",
98 "RSN = HAB_INV_ASSERTION (0x0C)\n",
99 "RSN = HAB_INV_CALL (0x28)\n",
100 "RSN = HAB_INV_CERTIFICATE (0x21)\n",
101 "RSN = HAB_INV_COMMAND (0x06)\n",
102 "RSN = HAB_INV_CSF (0x11)\n",
103 "RSN = HAB_INV_DCD (0x27)\n",
104 "RSN = HAB_INV_INDEX (0x0F)\n",
105 "RSN = HAB_INV_IVT (0x05)\n",
106 "RSN = HAB_INV_KEY (0x1D)\n",
107 "RSN = HAB_INV_RETURN (0x1E)\n",
108 "RSN = HAB_INV_SIGNATURE (0x18)\n",
109 "RSN = HAB_INV_SIZE (0x17)\n",
110 "RSN = HAB_MEM_FAIL (0x2E)\n",
111 "RSN = HAB_OVR_COUNT (0x2B)\n",
112 "RSN = HAB_OVR_STORAGE (0x2D)\n",
113 "RSN = HAB_UNS_ALGORITHM (0x12)\n",
114 "RSN = HAB_UNS_COMMAND (0x03)\n",
115 "RSN = HAB_UNS_ENGINE (0x0A)\n",
116 "RSN = HAB_UNS_ITEM (0x24)\n",
117 "RSN = HAB_UNS_KEY (0x1B)\n",
118 "RSN = HAB_UNS_PROTOCOL (0x14)\n",
119 "RSN = HAB_UNS_STATE (0x09)\n",
123 char *sts_str[] = {"STS = HAB_SUCCESS (0xF0)\n",
124 "STS = HAB_FAILURE (0x33)\n",
125 "STS = HAB_WARNING (0x69)\n",
129 char *eng_str[] = {"ENG = HAB_ENG_ANY (0x00)\n",
130 "ENG = HAB_ENG_SCC (0x03)\n",
131 "ENG = HAB_ENG_RTIC (0x05)\n",
132 "ENG = HAB_ENG_SAHARA (0x06)\n",
133 "ENG = HAB_ENG_CSU (0x0A)\n",
134 "ENG = HAB_ENG_SRTC (0x0C)\n",
135 "ENG = HAB_ENG_DCP (0x1B)\n",
136 "ENG = HAB_ENG_CAAM (0x1D)\n",
137 "ENG = HAB_ENG_SNVS (0x1E)\n",
138 "ENG = HAB_ENG_OCOTP (0x21)\n",
139 "ENG = HAB_ENG_DTCP (0x22)\n",
140 "ENG = HAB_ENG_ROM (0x36)\n",
141 "ENG = HAB_ENG_HDCP (0x24)\n",
142 "ENG = HAB_ENG_RTL (0x77)\n",
143 "ENG = HAB_ENG_SW (0xFF)\n",
147 char *ctx_str[] = {"CTX = HAB_CTX_ANY(0x00)\n",
148 "CTX = HAB_CTX_FAB (0xFF)\n",
149 "CTX = HAB_CTX_ENTRY (0xE1)\n",
150 "CTX = HAB_CTX_TARGET (0x33)\n",
151 "CTX = HAB_CTX_AUTHENTICATE (0x0A)\n",
152 "CTX = HAB_CTX_DCD (0xDD)\n",
153 "CTX = HAB_CTX_CSF (0xCF)\n",
154 "CTX = HAB_CTX_COMMAND (0xC0)\n",
155 "CTX = HAB_CTX_AUT_DAT (0xDB)\n",
156 "CTX = HAB_CTX_ASSERT (0xA0)\n",
157 "CTX = HAB_CTX_EXIT (0xEE)\n",
161 uint8_t hab_statuses[5] = {
169 uint8_t hab_reasons[26] = {
198 uint8_t hab_contexts[12] = {
203 HAB_CTX_AUTHENTICATE,
213 uint8_t hab_engines[16] = {
232 static inline uint8_t get_idx(uint8_t *list, uint8_t tgt)
235 uint8_t element = list[idx];
236 while (element != -1) {
239 element = list[++idx];
244 void process_event_record(uint8_t *event_data, size_t bytes)
246 struct record *rec = (struct record *)event_data;
248 printf("\n\n%s", sts_str[get_idx(hab_statuses, rec->contents[0])]);
249 printf("%s", rsn_str[get_idx(hab_reasons, rec->contents[1])]);
250 printf("%s", ctx_str[get_idx(hab_contexts, rec->contents[2])]);
251 printf("%s", eng_str[get_idx(hab_engines, rec->contents[3])]);
254 void display_event(uint8_t *event_data, size_t bytes)
258 if (!(event_data && bytes > 0))
261 for (i = 0; i < bytes; i++) {
263 printf("\t0x%02x", event_data[i]);
264 else if ((i % 8) == 0)
265 printf("\n\t0x%02x", event_data[i]);
267 printf(" 0x%02x", event_data[i]);
270 process_event_record(event_data, bytes);
273 int get_hab_status(void)
275 uint32_t index = 0; /* Loop index */
276 uint8_t event_data[128]; /* Event data buffer */
277 size_t bytes = sizeof(event_data); /* Event size in bytes */
278 enum hab_config config = 0;
279 enum hab_state state = 0;
280 hab_rvt_report_event_t *hab_rvt_report_event;
281 hab_rvt_report_status_t *hab_rvt_report_status;
283 hab_rvt_report_event = hab_rvt_report_event_p;
284 hab_rvt_report_status = hab_rvt_report_status_p;
286 if (is_hab_enabled())
287 puts("\nSecure boot enabled\n");
289 puts("\nSecure boot disabled\n");
291 /* Check HAB status */
292 if (hab_rvt_report_status(&config, &state) != HAB_SUCCESS) {
293 printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
296 /* Display HAB Error events */
297 while (hab_rvt_report_event(HAB_FAILURE, index, event_data,
298 &bytes) == HAB_SUCCESS) {
300 printf("--------- HAB Event %d -----------------\n",
302 puts("event data:\n");
303 display_event(event_data, bytes);
305 bytes = sizeof(event_data);
309 /* Display message if no HAB events are found */
311 printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
313 puts("No HAB Events Found!\n\n");
318 int do_hab_status(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
330 static int do_authenticate_image(cmd_tbl_t *cmdtp, int flag, int argc,
333 ulong addr, length, ivt_offset;
337 return CMD_RET_USAGE;
339 addr = simple_strtoul(argv[1], NULL, 16);
340 length = simple_strtoul(argv[2], NULL, 16);
341 ivt_offset = simple_strtoul(argv[3], NULL, 16);
343 rcode = authenticate_image(addr, length, ivt_offset);
345 rcode = CMD_RET_SUCCESS;
347 rcode = CMD_RET_FAILURE;
353 hab_status, CONFIG_SYS_MAXARGS, 1, do_hab_status,
354 "display HAB status",
359 hab_auth_img, 4, 0, do_authenticate_image,
360 "authenticate image via HAB",
361 "addr length ivt_offset\n"
362 "addr - image hex address\n"
363 "length - image hex length\n"
364 "ivt_offset - hex offset of IVT in the image"
368 #endif /* !defined(CONFIG_SPL_BUILD) */
370 static bool is_hab_enabled(void)
372 struct imx_sec_config_fuse_t *fuse =
373 (struct imx_sec_config_fuse_t *)&imx_sec_config_fuse;
377 ret = fuse_read(fuse->bank, fuse->word, ®);
379 puts("\nSecure boot fuse read error\n");
383 return (reg & IS_HAB_ENABLED_BIT) == IS_HAB_ENABLED_BIT;
386 int authenticate_image(uint32_t ddr_start, uint32_t image_size,
389 uint32_t load_addr = 0;
391 uint32_t ivt_addr = 0;
394 hab_rvt_authenticate_image_t *hab_rvt_authenticate_image;
395 hab_rvt_entry_t *hab_rvt_entry;
396 hab_rvt_exit_t *hab_rvt_exit;
398 hab_rvt_authenticate_image = hab_rvt_authenticate_image_p;
399 hab_rvt_entry = hab_rvt_entry_p;
400 hab_rvt_exit = hab_rvt_exit_p;
402 if (!is_hab_enabled()) {
403 puts("hab fuse not enabled\n");
407 printf("\nAuthenticate image from DDR location 0x%x...\n",
410 hab_caam_clock_enable(1);
412 if (hab_rvt_entry() != HAB_SUCCESS) {
413 puts("hab entry function fail\n");
414 goto hab_caam_clock_disable;
417 /* Calculate IVT address header */
418 ivt_addr = ddr_start + ivt_offset;
422 printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n", ivt_offset, ivt_addr);
423 puts("Dumping IVT\n");
424 print_buffer(ivt_addr, (void *)(ivt_addr), 4, 0x8, 0);
426 puts("Dumping CSF Header\n");
427 print_buffer(ivt_addr + IVT_SIZE, (void *)(ivt_addr + IVT_SIZE), 4,
430 #if !defined(CONFIG_SPL_BUILD)
434 puts("\nCalling authenticate_image in ROM\n");
435 printf("\tivt_offset = 0x%x\n", ivt_offset);
436 printf("\tstart = 0x%08lx\n", start);
437 printf("\tbytes = 0x%x\n", bytes);
442 * If the MMU is enabled, we have to notify the ROM
443 * code, or it won't flush the caches when needed.
444 * This is done, by setting the "pu_irom_mmu_enabled"
445 * word to 1. You can find its address by looking in
446 * the ROM map. This is critical for
447 * authenticate_image(). If MMU is enabled, without
448 * setting this bit, authentication will fail and may
451 /* Check MMU enabled */
452 if (is_soc_type(MXC_SOC_MX6) && get_cr() & CR_M) {
455 * This won't work on Rev 1.0.0 of
456 * i.MX6Q/D, since their ROM doesn't
457 * do cache flushes. don't think any
458 * exist, so we ignore them.
461 writel(1, MX6DQ_PU_IROM_MMU_EN_VAR);
462 } else if (is_mx6sdl()) {
463 writel(1, MX6DLS_PU_IROM_MMU_EN_VAR);
464 } else if (is_mx6sl()) {
465 writel(1, MX6SL_PU_IROM_MMU_EN_VAR);
469 load_addr = (uint32_t)hab_rvt_authenticate_image(
471 ivt_offset, (void **)&start,
472 (size_t *)&bytes, NULL);
473 if (hab_rvt_exit() != HAB_SUCCESS) {
474 puts("hab exit function fail\n");
478 hab_caam_clock_disable:
479 hab_caam_clock_enable(0);
481 #if !defined(CONFIG_SPL_BUILD)