arch/arm/mach-exynos/mach-exynos5-dt.c

   1 /*
   2  * SAMSUNG EXYNOS5250 Flattened Device Tree enabled machine
   3  *
   4  * Copyright (c) 2012 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10 */
  11
  12 #include <linux/of_platform.h>
  13 #include <linux/serial_core.h>
  14 #include <linux/io.h>
  15
  16 #include <asm/mach/arch.h>
  17 #include <asm/hardware/gic.h>
  18 #include <mach/map.h>
  19 #include <mach/regs-pmu.h>
  20
  21 #include <plat/cpu.h>
  22 #include <plat/regs-serial.h>
  23
  24 #include "common.h"
  25
  26 /*
  27  * The following lookup table is used to override device names when devices
  28  * are registered from device tree. This is temporarily added to enable
  29  * device tree support addition for the EXYNOS5 architecture.
  30  *
  31  * For drivers that require platform data to be provided from the machine
  32  * file, a platform data pointer can also be supplied along with the
  33  * devices names. Usually, the platform data elements that cannot be parsed
  34  * from the device tree by the drivers (example: function pointers) are
  35  * supplied. But it should be noted that this is a temporary mechanism and
  36  * at some point, the drivers should be capable of parsing all the platform
  37  * data from the device tree.
  38  */
  39 static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
  40         OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART0,
  41                                 "exynos4210-uart.0", NULL),
  42         OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART1,
  43                                 "exynos4210-uart.1", NULL),
  44         OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART2,
  45                                 "exynos4210-uart.2", NULL),
  46         OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART3,
  47                                 "exynos4210-uart.3", NULL),
  48         OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(0),
  49                                 "s3c2440-i2c.0", NULL),
  50         OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(1),
  51                                 "s3c2440-i2c.1", NULL),
  52         OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(2),
  53                                 "s3c2440-i2c.2", NULL),
  54         OF_DEV_AUXDATA("samsung,s3c2440-hdmiphy-i2c", EXYNOS5_PA_IIC(8),
  55                                 "s3c2440-hdmiphy-i2c", NULL),
  56         OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI0,
  57                                 "dw_mmc.0", NULL),
  58         OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI1,
  59                                 "dw_mmc.1", NULL),
  60         OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI2,
  61                                 "dw_mmc.2", NULL),
  62         OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI3,
  63                                 "dw_mmc.3", NULL),
  64         OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI0,
  65                                 "exynos4210-spi.0", NULL),
  66         OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI1,
  67                                 "exynos4210-spi.1", NULL),
  68         OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI2,
  69                                 "exynos4210-spi.2", NULL),
  70         OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL),
  71         OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL),
  72         OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL),
  73         OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC0,
  74                                 "exynos-gsc.0", NULL),
  75         OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC1,
  76                                 "exynos-gsc.1", NULL),
  77         OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC2,
  78                                 "exynos-gsc.2", NULL),
  79         OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC3,
  80                                 "exynos-gsc.3", NULL),
  81         OF_DEV_AUXDATA("samsung,exynos5-hdmi", 0x14530000,
  82                                 "exynos5-hdmi", NULL),
  83         OF_DEV_AUXDATA("samsung,exynos5-mixer", 0x14450000,
  84                                 "exynos5-mixer", NULL),
  85         {},
  86 };
  87
  88 static void __init exynos5250_dt_map_io(void)
  89 {
  90         exynos_init_io(NULL, 0);
  91         s3c24xx_init_clocks(24000000);
  92 }
  93
  94 static void __init exynos5250_dt_machine_init(void)
  95 {
  96         struct device_node *i2c_np;
  97         const char *i2c_compat = "samsung,s3c2440-i2c";
  98         unsigned int tmp;
  99
 100         /*
 101          * Exynos5's legacy i2c controller and new high speed i2c
 102          * controller have muxed interrupt sources. By default the
 103          * interrupts for 4-channel HS-I2C controller are enabled.
 104          * If node for first four channels of legacy i2c controller
 105          * are available then re-configure the interrupts via the
 106          * system register.
 107          */
 108         for_each_compatible_node(i2c_np, NULL, i2c_compat) {
 109                 if (of_device_is_available(i2c_np)) {
 110                         if (of_alias_get_id(i2c_np, "i2c") < 4) {
 111                                 tmp = readl(EXYNOS5_SYS_I2C_CFG);
 112                                 writel(tmp & ~(0x1 << of_alias_get_id(i2c_np, "i2c")),
 113                                                 EXYNOS5_SYS_I2C_CFG);
 114                         }
 115                 }
 116         }
 117
 118         of_platform_populate(NULL, of_default_bus_match_table,
 119                                 exynos5250_auxdata_lookup, NULL);
 120 }
 121
 122 static char const *exynos5250_dt_compat[] __initdata = {
 123         "samsung,exynos5250",
 124         NULL
 125 };
 126
 127 DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
 128         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
 129         .init_irq       = exynos5_init_irq,
 130         .smp            = smp_ops(exynos_smp_ops),
 131         .map_io         = exynos5250_dt_map_io,
 132         .handle_irq     = gic_handle_irq,
 133         .init_machine   = exynos5250_dt_machine_init,
 134         .init_late      = exynos_init_late,
 135         .timer          = &exynos4_timer,
 136         .dt_compat      = exynos5250_dt_compat,
 137         .restart        = exynos5_restart,
 138 MACHINE_END