arch/arm/mach-ep93xx/core.c

   1 /*
   2  * arch/arm/mach-ep93xx/core.c
   3  * Core routines for Cirrus EP93xx chips.
   4  *
   5  * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
   6  * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
   7  *
   8  * Thanks go to Michael Burian and Ray Lehtiniemi for their key
   9  * role in the ep93xx linux community.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation; either version 2 of the License, or (at
  14  * your option) any later version.
  15  */
  16
  17 #define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
  18
  19 #include <linux/kernel.h>
  20 #include <linux/init.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/dma-mapping.h>
  24 #include <linux/timex.h>
  25 #include <linux/irq.h>
  26 #include <linux/io.h>
  27 #include <linux/gpio.h>
  28 #include <linux/leds.h>
  29 #include <linux/termios.h>
  30 #include <linux/amba/bus.h>
  31 #include <linux/amba/serial.h>
  32 #include <linux/mtd/physmap.h>
  33 #include <linux/i2c.h>
  34 #include <linux/i2c-gpio.h>
  35 #include <linux/spi/spi.h>
  36
  37 #include <mach/hardware.h>
  38 #include <mach/fb.h>
  39 #include <mach/ep93xx_keypad.h>
  40 #include <mach/ep93xx_spi.h>
  41
  42 #include <asm/mach/map.h>
  43 #include <asm/mach/time.h>
  44
  45 #include <asm/hardware/vic.h>
  46
  47
  48 /*************************************************************************
  49  * Static I/O mappings that are needed for all EP93xx platforms
  50  *************************************************************************/
  51 static struct map_desc ep93xx_io_desc[] __initdata = {
  52         {
  53                 .virtual        = EP93XX_AHB_VIRT_BASE,
  54                 .pfn            = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
  55                 .length         = EP93XX_AHB_SIZE,
  56                 .type           = MT_DEVICE,
  57         }, {
  58                 .virtual        = EP93XX_APB_VIRT_BASE,
  59                 .pfn            = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
  60                 .length         = EP93XX_APB_SIZE,
  61                 .type           = MT_DEVICE,
  62         },
  63 };
  64
  65 void __init ep93xx_map_io(void)
  66 {
  67         iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
  68 }
  69
  70
  71 /*************************************************************************
  72  * Timer handling for EP93xx
  73  *************************************************************************
  74  * The ep93xx has four internal timers.  Timers 1, 2 (both 16 bit) and
  75  * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
  76  * an interrupt on underflow.  Timer 4 (40 bit) counts down at 983.04 kHz,
  77  * is free-running, and can't generate interrupts.
  78  *
  79  * The 508 kHz timers are ideal for use for the timer interrupt, as the
  80  * most common values of HZ divide 508 kHz nicely.  We pick one of the 16
  81  * bit timers (timer 1) since we don't need more than 16 bits of reload
  82  * value as long as HZ >= 8.
  83  *
  84  * The higher clock rate of timer 4 makes it a better choice than the
  85  * other timers for use in gettimeoffset(), while the fact that it can't
  86  * generate interrupts means we don't have to worry about not being able
  87  * to use this timer for something else.  We also use timer 4 for keeping
  88  * track of lost jiffies.
  89  */
  90 #define EP93XX_TIMER_REG(x)             (EP93XX_TIMER_BASE + (x))
  91 #define EP93XX_TIMER1_LOAD              EP93XX_TIMER_REG(0x00)
  92 #define EP93XX_TIMER1_VALUE             EP93XX_TIMER_REG(0x04)
  93 #define EP93XX_TIMER1_CONTROL           EP93XX_TIMER_REG(0x08)
  94 #define EP93XX_TIMER123_CONTROL_ENABLE  (1 << 7)
  95 #define EP93XX_TIMER123_CONTROL_MODE    (1 << 6)
  96 #define EP93XX_TIMER123_CONTROL_CLKSEL  (1 << 3)
  97 #define EP93XX_TIMER1_CLEAR             EP93XX_TIMER_REG(0x0c)
  98 #define EP93XX_TIMER2_LOAD              EP93XX_TIMER_REG(0x20)
  99 #define EP93XX_TIMER2_VALUE             EP93XX_TIMER_REG(0x24)
 100 #define EP93XX_TIMER2_CONTROL           EP93XX_TIMER_REG(0x28)
 101 #define EP93XX_TIMER2_CLEAR             EP93XX_TIMER_REG(0x2c)
 102 #define EP93XX_TIMER4_VALUE_LOW         EP93XX_TIMER_REG(0x60)
 103 #define EP93XX_TIMER4_VALUE_HIGH        EP93XX_TIMER_REG(0x64)
 104 #define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8)
 105 #define EP93XX_TIMER3_LOAD              EP93XX_TIMER_REG(0x80)
 106 #define EP93XX_TIMER3_VALUE             EP93XX_TIMER_REG(0x84)
 107 #define EP93XX_TIMER3_CONTROL           EP93XX_TIMER_REG(0x88)
 108 #define EP93XX_TIMER3_CLEAR             EP93XX_TIMER_REG(0x8c)
 109
 110 #define EP93XX_TIMER123_CLOCK           508469
 111 #define EP93XX_TIMER4_CLOCK             983040
 112
 113 #define TIMER1_RELOAD                   ((EP93XX_TIMER123_CLOCK / HZ) - 1)
 114 #define TIMER4_TICKS_PER_JIFFY          DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ)
 115
 116 static unsigned int last_jiffy_time;
 117
 118 static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
 119 {
 120         /* Writing any value clears the timer interrupt */
 121         __raw_writel(1, EP93XX_TIMER1_CLEAR);
 122
 123         /* Recover lost jiffies */
 124         while ((signed long)
 125                 (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
 126                                                 >= TIMER4_TICKS_PER_JIFFY) {
 127                 last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
 128                 timer_tick();
 129         }
 130
 131         return IRQ_HANDLED;
 132 }
 133
 134 static struct irqaction ep93xx_timer_irq = {
 135         .name           = "ep93xx timer",
 136         .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
 137         .handler        = ep93xx_timer_interrupt,
 138 };
 139
 140 static void __init ep93xx_timer_init(void)
 141 {
 142         u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
 143                     EP93XX_TIMER123_CONTROL_CLKSEL;
 144
 145         /* Enable periodic HZ timer.  */
 146         __raw_writel(tmode, EP93XX_TIMER1_CONTROL);
 147         __raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD);
 148         __raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
 149                         EP93XX_TIMER1_CONTROL);
 150
 151         /* Enable lost jiffy timer.  */
 152         __raw_writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
 153                         EP93XX_TIMER4_VALUE_HIGH);
 154
 155         setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
 156 }
 157
 158 static unsigned long ep93xx_gettimeoffset(void)
 159 {
 160         int offset;
 161
 162         offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
 163
 164         /* Calculate (1000000 / 983040) * offset.  */
 165         return offset + (53 * offset / 3072);
 166 }
 167
 168 struct sys_timer ep93xx_timer = {
 169         .init           = ep93xx_timer_init,
 170         .offset         = ep93xx_gettimeoffset,
 171 };
 172
 173
 174 /*************************************************************************
 175  * EP93xx IRQ handling
 176  *************************************************************************/
 177 void __init ep93xx_init_irq(void)
 178 {
 179         vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
 180         vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
 181 }
 182
 183
 184 /*************************************************************************
 185  * EP93xx System Controller Software Locked register handling
 186  *************************************************************************/
 187
 188 /*
 189  * syscon_swlock prevents anything else from writing to the syscon
 190  * block while a software locked register is being written.
 191  */
 192 static DEFINE_SPINLOCK(syscon_swlock);
 193
 194 void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
 195 {
 196         unsigned long flags;
 197
 198         spin_lock_irqsave(&syscon_swlock, flags);
 199
 200         __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
 201         __raw_writel(val, reg);
 202
 203         spin_unlock_irqrestore(&syscon_swlock, flags);
 204 }
 205 EXPORT_SYMBOL(ep93xx_syscon_swlocked_write);
 206
 207 void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
 208 {
 209         unsigned long flags;
 210         unsigned int val;
 211
 212         spin_lock_irqsave(&syscon_swlock, flags);
 213
 214         val = __raw_readl(EP93XX_SYSCON_DEVCFG);
 215         val &= ~clear_bits;
 216         val |= set_bits;
 217         __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
 218         __raw_writel(val, EP93XX_SYSCON_DEVCFG);
 219
 220         spin_unlock_irqrestore(&syscon_swlock, flags);
 221 }
 222 EXPORT_SYMBOL(ep93xx_devcfg_set_clear);
 223
 224 /**
 225  * ep93xx_chip_revision() - returns the EP93xx chip revision
 226  *
 227  * See <mach/platform.h> for more information.
 228  */
 229 unsigned int ep93xx_chip_revision(void)
 230 {
 231         unsigned int v;
 232
 233         v = __raw_readl(EP93XX_SYSCON_SYSCFG);
 234         v &= EP93XX_SYSCON_SYSCFG_REV_MASK;
 235         v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
 236         return v;
 237 }
 238
 239 /*************************************************************************
 240  * EP93xx GPIO
 241  *************************************************************************/
 242 static struct resource ep93xx_gpio_resource[] = {
 243         {
 244                 .start          = EP93XX_GPIO_PHYS_BASE,
 245                 .end            = EP93XX_GPIO_PHYS_BASE + 0xcc - 1,
 246                 .flags          = IORESOURCE_MEM,
 247         },
 248 };
 249
 250 static struct platform_device ep93xx_gpio_device = {
 251         .name           = "gpio-ep93xx",
 252         .id             = -1,
 253         .num_resources  = ARRAY_SIZE(ep93xx_gpio_resource),
 254         .resource       = ep93xx_gpio_resource,
 255 };
 256
 257 /*************************************************************************
 258  * EP93xx peripheral handling
 259  *************************************************************************/
 260 #define EP93XX_UART_MCR_OFFSET          (0x0100)
 261
 262 static void ep93xx_uart_set_mctrl(struct amba_device *dev,
 263                                   void __iomem *base, unsigned int mctrl)
 264 {
 265         unsigned int mcr;
 266
 267         mcr = 0;
 268         if (!(mctrl & TIOCM_RTS))
 269                 mcr |= 2;
 270         if (!(mctrl & TIOCM_DTR))
 271                 mcr |= 1;
 272
 273         __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
 274 }
 275
 276 static struct amba_pl010_data ep93xx_uart_data = {
 277         .set_mctrl      = ep93xx_uart_set_mctrl,
 278 };
 279
 280 static struct amba_device uart1_device = {
 281         .dev            = {
 282                 .init_name      = "apb:uart1",
 283                 .platform_data  = &ep93xx_uart_data,
 284         },
 285         .res            = {
 286                 .start  = EP93XX_UART1_PHYS_BASE,
 287                 .end    = EP93XX_UART1_PHYS_BASE + 0x0fff,
 288                 .flags  = IORESOURCE_MEM,
 289         },
 290         .irq            = { IRQ_EP93XX_UART1, NO_IRQ },
 291         .periphid       = 0x00041010,
 292 };
 293
 294 static struct amba_device uart2_device = {
 295         .dev            = {
 296                 .init_name      = "apb:uart2",
 297                 .platform_data  = &ep93xx_uart_data,
 298         },
 299         .res            = {
 300                 .start  = EP93XX_UART2_PHYS_BASE,
 301                 .end    = EP93XX_UART2_PHYS_BASE + 0x0fff,
 302                 .flags  = IORESOURCE_MEM,
 303         },
 304         .irq            = { IRQ_EP93XX_UART2, NO_IRQ },
 305         .periphid       = 0x00041010,
 306 };
 307
 308 static struct amba_device uart3_device = {
 309         .dev            = {
 310                 .init_name      = "apb:uart3",
 311                 .platform_data  = &ep93xx_uart_data,
 312         },
 313         .res            = {
 314                 .start  = EP93XX_UART3_PHYS_BASE,
 315                 .end    = EP93XX_UART3_PHYS_BASE + 0x0fff,
 316                 .flags  = IORESOURCE_MEM,
 317         },
 318         .irq            = { IRQ_EP93XX_UART3, NO_IRQ },
 319         .periphid       = 0x00041010,
 320 };
 321
 322
 323 static struct resource ep93xx_rtc_resource[] = {
 324         {
 325                 .start          = EP93XX_RTC_PHYS_BASE,
 326                 .end            = EP93XX_RTC_PHYS_BASE + 0x10c - 1,
 327                 .flags          = IORESOURCE_MEM,
 328         },
 329 };
 330
 331 static struct platform_device ep93xx_rtc_device = {
 332         .name           = "ep93xx-rtc",
 333         .id             = -1,
 334         .num_resources  = ARRAY_SIZE(ep93xx_rtc_resource),
 335         .resource       = ep93xx_rtc_resource,
 336 };
 337
 338
 339 static struct resource ep93xx_ohci_resources[] = {
 340         [0] = {
 341                 .start  = EP93XX_USB_PHYS_BASE,
 342                 .end    = EP93XX_USB_PHYS_BASE + 0x0fff,
 343                 .flags  = IORESOURCE_MEM,
 344         },
 345         [1] = {
 346                 .start  = IRQ_EP93XX_USB,
 347                 .end    = IRQ_EP93XX_USB,
 348                 .flags  = IORESOURCE_IRQ,
 349         },
 350 };
 351
 352
 353 static struct platform_device ep93xx_ohci_device = {
 354         .name           = "ep93xx-ohci",
 355         .id             = -1,
 356         .dev            = {
 357                 .dma_mask               = &ep93xx_ohci_device.dev.coherent_dma_mask,
 358                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 359         },
 360         .num_resources  = ARRAY_SIZE(ep93xx_ohci_resources),
 361         .resource       = ep93xx_ohci_resources,
 362 };
 363
 364
 365 /*************************************************************************
 366  * EP93xx physmap'ed flash
 367  *************************************************************************/
 368 static struct physmap_flash_data ep93xx_flash_data;
 369
 370 static struct resource ep93xx_flash_resource = {
 371         .flags          = IORESOURCE_MEM,
 372 };
 373
 374 static struct platform_device ep93xx_flash = {
 375         .name           = "physmap-flash",
 376         .id             = 0,
 377         .dev            = {
 378                 .platform_data  = &ep93xx_flash_data,
 379         },
 380         .num_resources  = 1,
 381         .resource       = &ep93xx_flash_resource,
 382 };
 383
 384 /**
 385  * ep93xx_register_flash() - Register the external flash device.
 386  * @width:      bank width in octets
 387  * @start:      resource start address
 388  * @size:       resource size
 389  */
 390 void __init ep93xx_register_flash(unsigned int width,
 391                                   resource_size_t start, resource_size_t size)
 392 {
 393         ep93xx_flash_data.width         = width;
 394
 395         ep93xx_flash_resource.start     = start;
 396         ep93xx_flash_resource.end       = start + size - 1;
 397
 398         platform_device_register(&ep93xx_flash);
 399 }
 400
 401
 402 /*************************************************************************
 403  * EP93xx ethernet peripheral handling
 404  *************************************************************************/
 405 static struct ep93xx_eth_data ep93xx_eth_data;
 406
 407 static struct resource ep93xx_eth_resource[] = {
 408         {
 409                 .start  = EP93XX_ETHERNET_PHYS_BASE,
 410                 .end    = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
 411                 .flags  = IORESOURCE_MEM,
 412         }, {
 413                 .start  = IRQ_EP93XX_ETHERNET,
 414                 .end    = IRQ_EP93XX_ETHERNET,
 415                 .flags  = IORESOURCE_IRQ,
 416         }
 417 };
 418
 419 static struct platform_device ep93xx_eth_device = {
 420         .name           = "ep93xx-eth",
 421         .id             = -1,
 422         .dev            = {
 423                 .platform_data  = &ep93xx_eth_data,
 424         },
 425         .num_resources  = ARRAY_SIZE(ep93xx_eth_resource),
 426         .resource       = ep93xx_eth_resource,
 427 };
 428
 429 /**
 430  * ep93xx_register_eth - Register the built-in ethernet platform device.
 431  * @data:       platform specific ethernet configuration (__initdata)
 432  * @copy_addr:  flag indicating that the MAC address should be copied
 433  *              from the IndAd registers (as programmed by the bootloader)
 434  */
 435 void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
 436 {
 437         if (copy_addr)
 438                 memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
 439
 440         ep93xx_eth_data = *data;
 441         platform_device_register(&ep93xx_eth_device);
 442 }
 443
 444
 445 /*************************************************************************
 446  * EP93xx i2c peripheral handling
 447  *************************************************************************/
 448 static struct i2c_gpio_platform_data ep93xx_i2c_data;
 449
 450 static struct platform_device ep93xx_i2c_device = {
 451         .name           = "i2c-gpio",
 452         .id             = 0,
 453         .dev            = {
 454                 .platform_data  = &ep93xx_i2c_data,
 455         },
 456 };
 457
 458 /**
 459  * ep93xx_register_i2c - Register the i2c platform device.
 460  * @data:       platform specific i2c-gpio configuration (__initdata)
 461  * @devices:    platform specific i2c bus device information (__initdata)
 462  * @num:        the number of devices on the i2c bus
 463  */
 464 void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
 465                                 struct i2c_board_info *devices, int num)
 466 {
 467         /*
 468          * Set the EEPROM interface pin drive type control.
 469          * Defines the driver type for the EECLK and EEDAT pins as either
 470          * open drain, which will require an external pull-up, or a normal
 471          * CMOS driver.
 472          */
 473         if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
 474                 pr_warning("sda != EEDAT, open drain has no effect\n");
 475         if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
 476                 pr_warning("scl != EECLK, open drain has no effect\n");
 477
 478         __raw_writel((data->sda_is_open_drain << 1) |
 479                      (data->scl_is_open_drain << 0),
 480                      EP93XX_GPIO_EEDRIVE);
 481
 482         ep93xx_i2c_data = *data;
 483         i2c_register_board_info(0, devices, num);
 484         platform_device_register(&ep93xx_i2c_device);
 485 }
 486
 487 /*************************************************************************
 488  * EP93xx SPI peripheral handling
 489  *************************************************************************/
 490 static struct ep93xx_spi_info ep93xx_spi_master_data;
 491
 492 static struct resource ep93xx_spi_resources[] = {
 493         {
 494                 .start  = EP93XX_SPI_PHYS_BASE,
 495                 .end    = EP93XX_SPI_PHYS_BASE + 0x18 - 1,
 496                 .flags  = IORESOURCE_MEM,
 497         },
 498         {
 499                 .start  = IRQ_EP93XX_SSP,
 500                 .end    = IRQ_EP93XX_SSP,
 501                 .flags  = IORESOURCE_IRQ,
 502         },
 503 };
 504
 505 static struct platform_device ep93xx_spi_device = {
 506         .name           = "ep93xx-spi",
 507         .id             = 0,
 508         .dev            = {
 509                 .platform_data = &ep93xx_spi_master_data,
 510         },
 511         .num_resources  = ARRAY_SIZE(ep93xx_spi_resources),
 512         .resource       = ep93xx_spi_resources,
 513 };
 514
 515 /**
 516  * ep93xx_register_spi() - registers spi platform device
 517  * @info: ep93xx board specific spi master info (__initdata)
 518  * @devices: SPI devices to register (__initdata)
 519  * @num: number of SPI devices to register
 520  *
 521  * This function registers platform device for the EP93xx SPI controller and
 522  * also makes sure that SPI pins are muxed so that I2S is not using those pins.
 523  */
 524 void __init ep93xx_register_spi(struct ep93xx_spi_info *info,
 525                                 struct spi_board_info *devices, int num)
 526 {
 527         /*
 528          * When SPI is used, we need to make sure that I2S is muxed off from
 529          * SPI pins.
 530          */
 531         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP);
 532
 533         ep93xx_spi_master_data = *info;
 534         spi_register_board_info(devices, num);
 535         platform_device_register(&ep93xx_spi_device);
 536 }
 537
 538 /*************************************************************************
 539  * EP93xx LEDs
 540  *************************************************************************/
 541 static struct gpio_led ep93xx_led_pins[] = {
 542         {
 543                 .name   = "platform:grled",
 544                 .gpio   = EP93XX_GPIO_LINE_GRLED,
 545         }, {
 546                 .name   = "platform:rdled",
 547                 .gpio   = EP93XX_GPIO_LINE_RDLED,
 548         },
 549 };
 550
 551 static struct gpio_led_platform_data ep93xx_led_data = {
 552         .num_leds       = ARRAY_SIZE(ep93xx_led_pins),
 553         .leds           = ep93xx_led_pins,
 554 };
 555
 556 static struct platform_device ep93xx_leds = {
 557         .name           = "leds-gpio",
 558         .id             = -1,
 559         .dev            = {
 560                 .platform_data  = &ep93xx_led_data,
 561         },
 562 };
 563
 564
 565 /*************************************************************************
 566  * EP93xx pwm peripheral handling
 567  *************************************************************************/
 568 static struct resource ep93xx_pwm0_resource[] = {
 569         {
 570                 .start  = EP93XX_PWM_PHYS_BASE,
 571                 .end    = EP93XX_PWM_PHYS_BASE + 0x10 - 1,
 572                 .flags  = IORESOURCE_MEM,
 573         },
 574 };
 575
 576 static struct platform_device ep93xx_pwm0_device = {
 577         .name           = "ep93xx-pwm",
 578         .id             = 0,
 579         .num_resources  = ARRAY_SIZE(ep93xx_pwm0_resource),
 580         .resource       = ep93xx_pwm0_resource,
 581 };
 582
 583 static struct resource ep93xx_pwm1_resource[] = {
 584         {
 585                 .start  = EP93XX_PWM_PHYS_BASE + 0x20,
 586                 .end    = EP93XX_PWM_PHYS_BASE + 0x30 - 1,
 587                 .flags  = IORESOURCE_MEM,
 588         },
 589 };
 590
 591 static struct platform_device ep93xx_pwm1_device = {
 592         .name           = "ep93xx-pwm",
 593         .id             = 1,
 594         .num_resources  = ARRAY_SIZE(ep93xx_pwm1_resource),
 595         .resource       = ep93xx_pwm1_resource,
 596 };
 597
 598 void __init ep93xx_register_pwm(int pwm0, int pwm1)
 599 {
 600         if (pwm0)
 601                 platform_device_register(&ep93xx_pwm0_device);
 602
 603         /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
 604         if (pwm1)
 605                 platform_device_register(&ep93xx_pwm1_device);
 606 }
 607
 608 int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
 609 {
 610         int err;
 611
 612         if (pdev->id == 0) {
 613                 err = 0;
 614         } else if (pdev->id == 1) {
 615                 err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
 616                                    dev_name(&pdev->dev));
 617                 if (err)
 618                         return err;
 619                 err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
 620                 if (err)
 621                         goto fail;
 622
 623                 /* PWM 1 output on EGPIO[14] */
 624                 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
 625         } else {
 626                 err = -ENODEV;
 627         }
 628
 629         return err;
 630
 631 fail:
 632         gpio_free(EP93XX_GPIO_LINE_EGPIO14);
 633         return err;
 634 }
 635 EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
 636
 637 void ep93xx_pwm_release_gpio(struct platform_device *pdev)
 638 {
 639         if (pdev->id == 1) {
 640                 gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
 641                 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
 642
 643                 /* EGPIO[14] used for GPIO */
 644                 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
 645         }
 646 }
 647 EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
 648
 649
 650 /*************************************************************************
 651  * EP93xx video peripheral handling
 652  *************************************************************************/
 653 static struct ep93xxfb_mach_info ep93xxfb_data;
 654
 655 static struct resource ep93xx_fb_resource[] = {
 656         {
 657                 .start          = EP93XX_RASTER_PHYS_BASE,
 658                 .end            = EP93XX_RASTER_PHYS_BASE + 0x800 - 1,
 659                 .flags          = IORESOURCE_MEM,
 660         },
 661 };
 662
 663 static struct platform_device ep93xx_fb_device = {
 664         .name                   = "ep93xx-fb",
 665         .id                     = -1,
 666         .dev                    = {
 667                 .platform_data          = &ep93xxfb_data,
 668                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 669                 .dma_mask               = &ep93xx_fb_device.dev.coherent_dma_mask,
 670         },
 671         .num_resources          = ARRAY_SIZE(ep93xx_fb_resource),
 672         .resource               = ep93xx_fb_resource,
 673 };
 674
 675 static struct platform_device ep93xx_bl_device = {
 676         .name           = "ep93xx-bl",
 677         .id             = -1,
 678 };
 679
 680 /**
 681  * ep93xx_register_fb - Register the framebuffer platform device.
 682  * @data:       platform specific framebuffer configuration (__initdata)
 683  */
 684 void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
 685 {
 686         ep93xxfb_data = *data;
 687         platform_device_register(&ep93xx_fb_device);
 688         platform_device_register(&ep93xx_bl_device);
 689 }
 690
 691
 692 /*************************************************************************
 693  * EP93xx matrix keypad peripheral handling
 694  *************************************************************************/
 695 static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
 696
 697 static struct resource ep93xx_keypad_resource[] = {
 698         {
 699                 .start  = EP93XX_KEY_MATRIX_PHYS_BASE,
 700                 .end    = EP93XX_KEY_MATRIX_PHYS_BASE + 0x0c - 1,
 701                 .flags  = IORESOURCE_MEM,
 702         }, {
 703                 .start  = IRQ_EP93XX_KEY,
 704                 .end    = IRQ_EP93XX_KEY,
 705                 .flags  = IORESOURCE_IRQ,
 706         },
 707 };
 708
 709 static struct platform_device ep93xx_keypad_device = {
 710         .name           = "ep93xx-keypad",
 711         .id             = -1,
 712         .dev            = {
 713                 .platform_data  = &ep93xx_keypad_data,
 714         },
 715         .num_resources  = ARRAY_SIZE(ep93xx_keypad_resource),
 716         .resource       = ep93xx_keypad_resource,
 717 };
 718
 719 /**
 720  * ep93xx_register_keypad - Register the keypad platform device.
 721  * @data:       platform specific keypad configuration (__initdata)
 722  */
 723 void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
 724 {
 725         ep93xx_keypad_data = *data;
 726         platform_device_register(&ep93xx_keypad_device);
 727 }
 728
 729 int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
 730 {
 731         int err;
 732         int i;
 733
 734         for (i = 0; i < 8; i++) {
 735                 err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
 736                 if (err)
 737                         goto fail_gpio_c;
 738                 err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
 739                 if (err)
 740                         goto fail_gpio_d;
 741         }
 742
 743         /* Enable the keypad controller; GPIO ports C and D used for keypad */
 744         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
 745                                  EP93XX_SYSCON_DEVCFG_GONK);
 746
 747         return 0;
 748
 749 fail_gpio_d:
 750         gpio_free(EP93XX_GPIO_LINE_C(i));
 751 fail_gpio_c:
 752         for ( ; i >= 0; --i) {
 753                 gpio_free(EP93XX_GPIO_LINE_C(i));
 754                 gpio_free(EP93XX_GPIO_LINE_D(i));
 755         }
 756         return err;
 757 }
 758 EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
 759
 760 void ep93xx_keypad_release_gpio(struct platform_device *pdev)
 761 {
 762         int i;
 763
 764         for (i = 0; i < 8; i++) {
 765                 gpio_free(EP93XX_GPIO_LINE_C(i));
 766                 gpio_free(EP93XX_GPIO_LINE_D(i));
 767         }
 768
 769         /* Disable the keypad controller; GPIO ports C and D used for GPIO */
 770         ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
 771                                EP93XX_SYSCON_DEVCFG_GONK);
 772 }
 773 EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
 774
 775 /*************************************************************************
 776  * EP93xx I2S audio peripheral handling
 777  *************************************************************************/
 778 static struct resource ep93xx_i2s_resource[] = {
 779         {
 780                 .start  = EP93XX_I2S_PHYS_BASE,
 781                 .end    = EP93XX_I2S_PHYS_BASE + 0x100 - 1,
 782                 .flags  = IORESOURCE_MEM,
 783         },
 784 };
 785
 786 static struct platform_device ep93xx_i2s_device = {
 787         .name           = "ep93xx-i2s",
 788         .id             = -1,
 789         .num_resources  = ARRAY_SIZE(ep93xx_i2s_resource),
 790         .resource       = ep93xx_i2s_resource,
 791 };
 792
 793 static struct platform_device ep93xx_pcm_device = {
 794         .name           = "ep93xx-pcm-audio",
 795         .id             = -1,
 796 };
 797
 798 void __init ep93xx_register_i2s(void)
 799 {
 800         platform_device_register(&ep93xx_i2s_device);
 801         platform_device_register(&ep93xx_pcm_device);
 802 }
 803
 804 #define EP93XX_SYSCON_DEVCFG_I2S_MASK   (EP93XX_SYSCON_DEVCFG_I2SONSSP | \
 805                                          EP93XX_SYSCON_DEVCFG_I2SONAC97)
 806
 807 #define EP93XX_I2SCLKDIV_MASK           (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
 808                                          EP93XX_SYSCON_I2SCLKDIV_SPOL)
 809
 810 int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config)
 811 {
 812         unsigned val;
 813
 814         /* Sanity check */
 815         if (i2s_pins & ~EP93XX_SYSCON_DEVCFG_I2S_MASK)
 816                 return -EINVAL;
 817         if (i2s_config & ~EP93XX_I2SCLKDIV_MASK)
 818                 return -EINVAL;
 819
 820         /* Must have only one of I2SONSSP/I2SONAC97 set */
 821         if ((i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONSSP) ==
 822             (i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONAC97))
 823                 return -EINVAL;
 824
 825         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
 826         ep93xx_devcfg_set_bits(i2s_pins);
 827
 828         /*
 829          * This is potentially racy with the clock api for i2s_mclk, sclk and
 830          * lrclk. Since the i2s driver is the only user of those clocks we
 831          * rely on it to prevent parallel use of this function and the
 832          * clock api for the i2s clocks.
 833          */
 834         val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
 835         val &= ~EP93XX_I2SCLKDIV_MASK;
 836         val |= i2s_config;
 837         ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
 838
 839         return 0;
 840 }
 841 EXPORT_SYMBOL(ep93xx_i2s_acquire);
 842
 843 void ep93xx_i2s_release(void)
 844 {
 845         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
 846 }
 847 EXPORT_SYMBOL(ep93xx_i2s_release);
 848
 849 /*************************************************************************
 850  * EP93xx AC97 audio peripheral handling
 851  *************************************************************************/
 852 static struct resource ep93xx_ac97_resources[] = {
 853         {
 854                 .start  = EP93XX_AAC_PHYS_BASE,
 855                 .end    = EP93XX_AAC_PHYS_BASE + 0xac - 1,
 856                 .flags  = IORESOURCE_MEM,
 857         },
 858         {
 859                 .start  = IRQ_EP93XX_AACINTR,
 860                 .end    = IRQ_EP93XX_AACINTR,
 861                 .flags  = IORESOURCE_IRQ,
 862         },
 863 };
 864
 865 static struct platform_device ep93xx_ac97_device = {
 866         .name           = "ep93xx-ac97",
 867         .id             = -1,
 868         .num_resources  = ARRAY_SIZE(ep93xx_ac97_resources),
 869         .resource       = ep93xx_ac97_resources,
 870 };
 871
 872 void __init ep93xx_register_ac97(void)
 873 {
 874         /*
 875          * Make sure that the AC97 pins are not used by I2S.
 876          */
 877         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
 878
 879         platform_device_register(&ep93xx_ac97_device);
 880         platform_device_register(&ep93xx_pcm_device);
 881 }
 882
 883 void __init ep93xx_init_devices(void)
 884 {
 885         /* Disallow access to MaverickCrunch initially */
 886         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
 887
 888         /* Get the GPIO working early, other devices need it */
 889         platform_device_register(&ep93xx_gpio_device);
 890
 891         amba_device_register(&uart1_device, &iomem_resource);
 892         amba_device_register(&uart2_device, &iomem_resource);
 893         amba_device_register(&uart3_device, &iomem_resource);
 894
 895         platform_device_register(&ep93xx_rtc_device);
 896         platform_device_register(&ep93xx_ohci_device);
 897         platform_device_register(&ep93xx_leds);
 898 }