Merge branch 'for-armsoc' of git://git.linaro.org/people/rmk/linux-arm
[profile/ivi/kernel-adaptation-intel-automotive.git] / arch / arm / mach-ep93xx / core.c
1 /*
2  * arch/arm/mach-ep93xx/core.c
3  * Core routines for Cirrus EP93xx chips.
4  *
5  * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6  * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
7  *
8  * Thanks go to Michael Burian and Ray Lehtiniemi for their key
9  * role in the ep93xx linux community.
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation; either version 2 of the License, or (at
14  * your option) any later version.
15  */
16
17 #define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
18
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/platform_device.h>
22 #include <linux/interrupt.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/timex.h>
25 #include <linux/irq.h>
26 #include <linux/io.h>
27 #include <linux/gpio.h>
28 #include <linux/leds.h>
29 #include <linux/termios.h>
30 #include <linux/amba/bus.h>
31 #include <linux/amba/serial.h>
32 #include <linux/mtd/physmap.h>
33 #include <linux/i2c.h>
34 #include <linux/i2c-gpio.h>
35 #include <linux/spi/spi.h>
36 #include <linux/export.h>
37
38 #include <mach/hardware.h>
39 #include <mach/fb.h>
40 #include <mach/ep93xx_keypad.h>
41 #include <mach/ep93xx_spi.h>
42 #include <mach/gpio-ep93xx.h>
43
44 #include <asm/mach/map.h>
45 #include <asm/mach/time.h>
46
47 #include <asm/hardware/vic.h>
48
49
50 /*************************************************************************
51  * Static I/O mappings that are needed for all EP93xx platforms
52  *************************************************************************/
53 static struct map_desc ep93xx_io_desc[] __initdata = {
54         {
55                 .virtual        = EP93XX_AHB_VIRT_BASE,
56                 .pfn            = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
57                 .length         = EP93XX_AHB_SIZE,
58                 .type           = MT_DEVICE,
59         }, {
60                 .virtual        = EP93XX_APB_VIRT_BASE,
61                 .pfn            = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
62                 .length         = EP93XX_APB_SIZE,
63                 .type           = MT_DEVICE,
64         },
65 };
66
67 void __init ep93xx_map_io(void)
68 {
69         iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
70 }
71
72
73 /*************************************************************************
74  * Timer handling for EP93xx
75  *************************************************************************
76  * The ep93xx has four internal timers.  Timers 1, 2 (both 16 bit) and
77  * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
78  * an interrupt on underflow.  Timer 4 (40 bit) counts down at 983.04 kHz,
79  * is free-running, and can't generate interrupts.
80  *
81  * The 508 kHz timers are ideal for use for the timer interrupt, as the
82  * most common values of HZ divide 508 kHz nicely.  We pick one of the 16
83  * bit timers (timer 1) since we don't need more than 16 bits of reload
84  * value as long as HZ >= 8.
85  *
86  * The higher clock rate of timer 4 makes it a better choice than the
87  * other timers for use in gettimeoffset(), while the fact that it can't
88  * generate interrupts means we don't have to worry about not being able
89  * to use this timer for something else.  We also use timer 4 for keeping
90  * track of lost jiffies.
91  */
92 #define EP93XX_TIMER_REG(x)             (EP93XX_TIMER_BASE + (x))
93 #define EP93XX_TIMER1_LOAD              EP93XX_TIMER_REG(0x00)
94 #define EP93XX_TIMER1_VALUE             EP93XX_TIMER_REG(0x04)
95 #define EP93XX_TIMER1_CONTROL           EP93XX_TIMER_REG(0x08)
96 #define EP93XX_TIMER123_CONTROL_ENABLE  (1 << 7)
97 #define EP93XX_TIMER123_CONTROL_MODE    (1 << 6)
98 #define EP93XX_TIMER123_CONTROL_CLKSEL  (1 << 3)
99 #define EP93XX_TIMER1_CLEAR             EP93XX_TIMER_REG(0x0c)
100 #define EP93XX_TIMER2_LOAD              EP93XX_TIMER_REG(0x20)
101 #define EP93XX_TIMER2_VALUE             EP93XX_TIMER_REG(0x24)
102 #define EP93XX_TIMER2_CONTROL           EP93XX_TIMER_REG(0x28)
103 #define EP93XX_TIMER2_CLEAR             EP93XX_TIMER_REG(0x2c)
104 #define EP93XX_TIMER4_VALUE_LOW         EP93XX_TIMER_REG(0x60)
105 #define EP93XX_TIMER4_VALUE_HIGH        EP93XX_TIMER_REG(0x64)
106 #define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8)
107 #define EP93XX_TIMER3_LOAD              EP93XX_TIMER_REG(0x80)
108 #define EP93XX_TIMER3_VALUE             EP93XX_TIMER_REG(0x84)
109 #define EP93XX_TIMER3_CONTROL           EP93XX_TIMER_REG(0x88)
110 #define EP93XX_TIMER3_CLEAR             EP93XX_TIMER_REG(0x8c)
111
112 #define EP93XX_TIMER123_CLOCK           508469
113 #define EP93XX_TIMER4_CLOCK             983040
114
115 #define TIMER1_RELOAD                   ((EP93XX_TIMER123_CLOCK / HZ) - 1)
116 #define TIMER4_TICKS_PER_JIFFY          DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ)
117
118 static unsigned int last_jiffy_time;
119
120 static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
121 {
122         /* Writing any value clears the timer interrupt */
123         __raw_writel(1, EP93XX_TIMER1_CLEAR);
124
125         /* Recover lost jiffies */
126         while ((signed long)
127                 (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
128                                                 >= TIMER4_TICKS_PER_JIFFY) {
129                 last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
130                 timer_tick();
131         }
132
133         return IRQ_HANDLED;
134 }
135
136 static struct irqaction ep93xx_timer_irq = {
137         .name           = "ep93xx timer",
138         .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
139         .handler        = ep93xx_timer_interrupt,
140 };
141
142 static void __init ep93xx_timer_init(void)
143 {
144         u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
145                     EP93XX_TIMER123_CONTROL_CLKSEL;
146
147         /* Enable periodic HZ timer.  */
148         __raw_writel(tmode, EP93XX_TIMER1_CONTROL);
149         __raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD);
150         __raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
151                         EP93XX_TIMER1_CONTROL);
152
153         /* Enable lost jiffy timer.  */
154         __raw_writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
155                         EP93XX_TIMER4_VALUE_HIGH);
156
157         setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
158 }
159
160 static unsigned long ep93xx_gettimeoffset(void)
161 {
162         int offset;
163
164         offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
165
166         /* Calculate (1000000 / 983040) * offset.  */
167         return offset + (53 * offset / 3072);
168 }
169
170 struct sys_timer ep93xx_timer = {
171         .init           = ep93xx_timer_init,
172         .offset         = ep93xx_gettimeoffset,
173 };
174
175
176 /*************************************************************************
177  * EP93xx IRQ handling
178  *************************************************************************/
179 void __init ep93xx_init_irq(void)
180 {
181         vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
182         vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
183 }
184
185
186 /*************************************************************************
187  * EP93xx System Controller Software Locked register handling
188  *************************************************************************/
189
190 /*
191  * syscon_swlock prevents anything else from writing to the syscon
192  * block while a software locked register is being written.
193  */
194 static DEFINE_SPINLOCK(syscon_swlock);
195
196 void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
197 {
198         unsigned long flags;
199
200         spin_lock_irqsave(&syscon_swlock, flags);
201
202         __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
203         __raw_writel(val, reg);
204
205         spin_unlock_irqrestore(&syscon_swlock, flags);
206 }
207 EXPORT_SYMBOL(ep93xx_syscon_swlocked_write);
208
209 void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
210 {
211         unsigned long flags;
212         unsigned int val;
213
214         spin_lock_irqsave(&syscon_swlock, flags);
215
216         val = __raw_readl(EP93XX_SYSCON_DEVCFG);
217         val &= ~clear_bits;
218         val |= set_bits;
219         __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
220         __raw_writel(val, EP93XX_SYSCON_DEVCFG);
221
222         spin_unlock_irqrestore(&syscon_swlock, flags);
223 }
224 EXPORT_SYMBOL(ep93xx_devcfg_set_clear);
225
226 /**
227  * ep93xx_chip_revision() - returns the EP93xx chip revision
228  *
229  * See <mach/platform.h> for more information.
230  */
231 unsigned int ep93xx_chip_revision(void)
232 {
233         unsigned int v;
234
235         v = __raw_readl(EP93XX_SYSCON_SYSCFG);
236         v &= EP93XX_SYSCON_SYSCFG_REV_MASK;
237         v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
238         return v;
239 }
240
241 /*************************************************************************
242  * EP93xx GPIO
243  *************************************************************************/
244 static struct resource ep93xx_gpio_resource[] = {
245         {
246                 .start          = EP93XX_GPIO_PHYS_BASE,
247                 .end            = EP93XX_GPIO_PHYS_BASE + 0xcc - 1,
248                 .flags          = IORESOURCE_MEM,
249         },
250 };
251
252 static struct platform_device ep93xx_gpio_device = {
253         .name           = "gpio-ep93xx",
254         .id             = -1,
255         .num_resources  = ARRAY_SIZE(ep93xx_gpio_resource),
256         .resource       = ep93xx_gpio_resource,
257 };
258
259 /*************************************************************************
260  * EP93xx peripheral handling
261  *************************************************************************/
262 #define EP93XX_UART_MCR_OFFSET          (0x0100)
263
264 static void ep93xx_uart_set_mctrl(struct amba_device *dev,
265                                   void __iomem *base, unsigned int mctrl)
266 {
267         unsigned int mcr;
268
269         mcr = 0;
270         if (mctrl & TIOCM_RTS)
271                 mcr |= 2;
272         if (mctrl & TIOCM_DTR)
273                 mcr |= 1;
274
275         __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
276 }
277
278 static struct amba_pl010_data ep93xx_uart_data = {
279         .set_mctrl      = ep93xx_uart_set_mctrl,
280 };
281
282 static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE,
283         { IRQ_EP93XX_UART1 }, &ep93xx_uart_data);
284
285 static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE,
286         { IRQ_EP93XX_UART2 }, &ep93xx_uart_data);
287
288 static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE,
289         { IRQ_EP93XX_UART3 }, &ep93xx_uart_data);
290
291 static struct resource ep93xx_rtc_resource[] = {
292         {
293                 .start          = EP93XX_RTC_PHYS_BASE,
294                 .end            = EP93XX_RTC_PHYS_BASE + 0x10c - 1,
295                 .flags          = IORESOURCE_MEM,
296         },
297 };
298
299 static struct platform_device ep93xx_rtc_device = {
300         .name           = "ep93xx-rtc",
301         .id             = -1,
302         .num_resources  = ARRAY_SIZE(ep93xx_rtc_resource),
303         .resource       = ep93xx_rtc_resource,
304 };
305
306
307 static struct resource ep93xx_ohci_resources[] = {
308         [0] = {
309                 .start  = EP93XX_USB_PHYS_BASE,
310                 .end    = EP93XX_USB_PHYS_BASE + 0x0fff,
311                 .flags  = IORESOURCE_MEM,
312         },
313         [1] = {
314                 .start  = IRQ_EP93XX_USB,
315                 .end    = IRQ_EP93XX_USB,
316                 .flags  = IORESOURCE_IRQ,
317         },
318 };
319
320
321 static struct platform_device ep93xx_ohci_device = {
322         .name           = "ep93xx-ohci",
323         .id             = -1,
324         .dev            = {
325                 .dma_mask               = &ep93xx_ohci_device.dev.coherent_dma_mask,
326                 .coherent_dma_mask      = DMA_BIT_MASK(32),
327         },
328         .num_resources  = ARRAY_SIZE(ep93xx_ohci_resources),
329         .resource       = ep93xx_ohci_resources,
330 };
331
332
333 /*************************************************************************
334  * EP93xx physmap'ed flash
335  *************************************************************************/
336 static struct physmap_flash_data ep93xx_flash_data;
337
338 static struct resource ep93xx_flash_resource = {
339         .flags          = IORESOURCE_MEM,
340 };
341
342 static struct platform_device ep93xx_flash = {
343         .name           = "physmap-flash",
344         .id             = 0,
345         .dev            = {
346                 .platform_data  = &ep93xx_flash_data,
347         },
348         .num_resources  = 1,
349         .resource       = &ep93xx_flash_resource,
350 };
351
352 /**
353  * ep93xx_register_flash() - Register the external flash device.
354  * @width:      bank width in octets
355  * @start:      resource start address
356  * @size:       resource size
357  */
358 void __init ep93xx_register_flash(unsigned int width,
359                                   resource_size_t start, resource_size_t size)
360 {
361         ep93xx_flash_data.width         = width;
362
363         ep93xx_flash_resource.start     = start;
364         ep93xx_flash_resource.end       = start + size - 1;
365
366         platform_device_register(&ep93xx_flash);
367 }
368
369
370 /*************************************************************************
371  * EP93xx ethernet peripheral handling
372  *************************************************************************/
373 static struct ep93xx_eth_data ep93xx_eth_data;
374
375 static struct resource ep93xx_eth_resource[] = {
376         {
377                 .start  = EP93XX_ETHERNET_PHYS_BASE,
378                 .end    = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
379                 .flags  = IORESOURCE_MEM,
380         }, {
381                 .start  = IRQ_EP93XX_ETHERNET,
382                 .end    = IRQ_EP93XX_ETHERNET,
383                 .flags  = IORESOURCE_IRQ,
384         }
385 };
386
387 static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32);
388
389 static struct platform_device ep93xx_eth_device = {
390         .name           = "ep93xx-eth",
391         .id             = -1,
392         .dev            = {
393                 .platform_data          = &ep93xx_eth_data,
394                 .coherent_dma_mask      = DMA_BIT_MASK(32),
395                 .dma_mask               = &ep93xx_eth_dma_mask,
396         },
397         .num_resources  = ARRAY_SIZE(ep93xx_eth_resource),
398         .resource       = ep93xx_eth_resource,
399 };
400
401 /**
402  * ep93xx_register_eth - Register the built-in ethernet platform device.
403  * @data:       platform specific ethernet configuration (__initdata)
404  * @copy_addr:  flag indicating that the MAC address should be copied
405  *              from the IndAd registers (as programmed by the bootloader)
406  */
407 void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
408 {
409         if (copy_addr)
410                 memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
411
412         ep93xx_eth_data = *data;
413         platform_device_register(&ep93xx_eth_device);
414 }
415
416
417 /*************************************************************************
418  * EP93xx i2c peripheral handling
419  *************************************************************************/
420 static struct i2c_gpio_platform_data ep93xx_i2c_data;
421
422 static struct platform_device ep93xx_i2c_device = {
423         .name           = "i2c-gpio",
424         .id             = 0,
425         .dev            = {
426                 .platform_data  = &ep93xx_i2c_data,
427         },
428 };
429
430 /**
431  * ep93xx_register_i2c - Register the i2c platform device.
432  * @data:       platform specific i2c-gpio configuration (__initdata)
433  * @devices:    platform specific i2c bus device information (__initdata)
434  * @num:        the number of devices on the i2c bus
435  */
436 void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
437                                 struct i2c_board_info *devices, int num)
438 {
439         /*
440          * Set the EEPROM interface pin drive type control.
441          * Defines the driver type for the EECLK and EEDAT pins as either
442          * open drain, which will require an external pull-up, or a normal
443          * CMOS driver.
444          */
445         if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
446                 pr_warning("sda != EEDAT, open drain has no effect\n");
447         if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
448                 pr_warning("scl != EECLK, open drain has no effect\n");
449
450         __raw_writel((data->sda_is_open_drain << 1) |
451                      (data->scl_is_open_drain << 0),
452                      EP93XX_GPIO_EEDRIVE);
453
454         ep93xx_i2c_data = *data;
455         i2c_register_board_info(0, devices, num);
456         platform_device_register(&ep93xx_i2c_device);
457 }
458
459 /*************************************************************************
460  * EP93xx SPI peripheral handling
461  *************************************************************************/
462 static struct ep93xx_spi_info ep93xx_spi_master_data;
463
464 static struct resource ep93xx_spi_resources[] = {
465         {
466                 .start  = EP93XX_SPI_PHYS_BASE,
467                 .end    = EP93XX_SPI_PHYS_BASE + 0x18 - 1,
468                 .flags  = IORESOURCE_MEM,
469         },
470         {
471                 .start  = IRQ_EP93XX_SSP,
472                 .end    = IRQ_EP93XX_SSP,
473                 .flags  = IORESOURCE_IRQ,
474         },
475 };
476
477 static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32);
478
479 static struct platform_device ep93xx_spi_device = {
480         .name           = "ep93xx-spi",
481         .id             = 0,
482         .dev            = {
483                 .platform_data          = &ep93xx_spi_master_data,
484                 .coherent_dma_mask      = DMA_BIT_MASK(32),
485                 .dma_mask               = &ep93xx_spi_dma_mask,
486         },
487         .num_resources  = ARRAY_SIZE(ep93xx_spi_resources),
488         .resource       = ep93xx_spi_resources,
489 };
490
491 /**
492  * ep93xx_register_spi() - registers spi platform device
493  * @info: ep93xx board specific spi master info (__initdata)
494  * @devices: SPI devices to register (__initdata)
495  * @num: number of SPI devices to register
496  *
497  * This function registers platform device for the EP93xx SPI controller and
498  * also makes sure that SPI pins are muxed so that I2S is not using those pins.
499  */
500 void __init ep93xx_register_spi(struct ep93xx_spi_info *info,
501                                 struct spi_board_info *devices, int num)
502 {
503         /*
504          * When SPI is used, we need to make sure that I2S is muxed off from
505          * SPI pins.
506          */
507         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP);
508
509         ep93xx_spi_master_data = *info;
510         spi_register_board_info(devices, num);
511         platform_device_register(&ep93xx_spi_device);
512 }
513
514 /*************************************************************************
515  * EP93xx LEDs
516  *************************************************************************/
517 static struct gpio_led ep93xx_led_pins[] = {
518         {
519                 .name   = "platform:grled",
520                 .gpio   = EP93XX_GPIO_LINE_GRLED,
521         }, {
522                 .name   = "platform:rdled",
523                 .gpio   = EP93XX_GPIO_LINE_RDLED,
524         },
525 };
526
527 static struct gpio_led_platform_data ep93xx_led_data = {
528         .num_leds       = ARRAY_SIZE(ep93xx_led_pins),
529         .leds           = ep93xx_led_pins,
530 };
531
532 static struct platform_device ep93xx_leds = {
533         .name           = "leds-gpio",
534         .id             = -1,
535         .dev            = {
536                 .platform_data  = &ep93xx_led_data,
537         },
538 };
539
540
541 /*************************************************************************
542  * EP93xx pwm peripheral handling
543  *************************************************************************/
544 static struct resource ep93xx_pwm0_resource[] = {
545         {
546                 .start  = EP93XX_PWM_PHYS_BASE,
547                 .end    = EP93XX_PWM_PHYS_BASE + 0x10 - 1,
548                 .flags  = IORESOURCE_MEM,
549         },
550 };
551
552 static struct platform_device ep93xx_pwm0_device = {
553         .name           = "ep93xx-pwm",
554         .id             = 0,
555         .num_resources  = ARRAY_SIZE(ep93xx_pwm0_resource),
556         .resource       = ep93xx_pwm0_resource,
557 };
558
559 static struct resource ep93xx_pwm1_resource[] = {
560         {
561                 .start  = EP93XX_PWM_PHYS_BASE + 0x20,
562                 .end    = EP93XX_PWM_PHYS_BASE + 0x30 - 1,
563                 .flags  = IORESOURCE_MEM,
564         },
565 };
566
567 static struct platform_device ep93xx_pwm1_device = {
568         .name           = "ep93xx-pwm",
569         .id             = 1,
570         .num_resources  = ARRAY_SIZE(ep93xx_pwm1_resource),
571         .resource       = ep93xx_pwm1_resource,
572 };
573
574 void __init ep93xx_register_pwm(int pwm0, int pwm1)
575 {
576         if (pwm0)
577                 platform_device_register(&ep93xx_pwm0_device);
578
579         /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
580         if (pwm1)
581                 platform_device_register(&ep93xx_pwm1_device);
582 }
583
584 int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
585 {
586         int err;
587
588         if (pdev->id == 0) {
589                 err = 0;
590         } else if (pdev->id == 1) {
591                 err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
592                                    dev_name(&pdev->dev));
593                 if (err)
594                         return err;
595                 err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
596                 if (err)
597                         goto fail;
598
599                 /* PWM 1 output on EGPIO[14] */
600                 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
601         } else {
602                 err = -ENODEV;
603         }
604
605         return err;
606
607 fail:
608         gpio_free(EP93XX_GPIO_LINE_EGPIO14);
609         return err;
610 }
611 EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
612
613 void ep93xx_pwm_release_gpio(struct platform_device *pdev)
614 {
615         if (pdev->id == 1) {
616                 gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
617                 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
618
619                 /* EGPIO[14] used for GPIO */
620                 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
621         }
622 }
623 EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
624
625
626 /*************************************************************************
627  * EP93xx video peripheral handling
628  *************************************************************************/
629 static struct ep93xxfb_mach_info ep93xxfb_data;
630
631 static struct resource ep93xx_fb_resource[] = {
632         {
633                 .start          = EP93XX_RASTER_PHYS_BASE,
634                 .end            = EP93XX_RASTER_PHYS_BASE + 0x800 - 1,
635                 .flags          = IORESOURCE_MEM,
636         },
637 };
638
639 static struct platform_device ep93xx_fb_device = {
640         .name                   = "ep93xx-fb",
641         .id                     = -1,
642         .dev                    = {
643                 .platform_data          = &ep93xxfb_data,
644                 .coherent_dma_mask      = DMA_BIT_MASK(32),
645                 .dma_mask               = &ep93xx_fb_device.dev.coherent_dma_mask,
646         },
647         .num_resources          = ARRAY_SIZE(ep93xx_fb_resource),
648         .resource               = ep93xx_fb_resource,
649 };
650
651 static struct platform_device ep93xx_bl_device = {
652         .name           = "ep93xx-bl",
653         .id             = -1,
654 };
655
656 /**
657  * ep93xx_register_fb - Register the framebuffer platform device.
658  * @data:       platform specific framebuffer configuration (__initdata)
659  */
660 void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
661 {
662         ep93xxfb_data = *data;
663         platform_device_register(&ep93xx_fb_device);
664         platform_device_register(&ep93xx_bl_device);
665 }
666
667
668 /*************************************************************************
669  * EP93xx matrix keypad peripheral handling
670  *************************************************************************/
671 static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
672
673 static struct resource ep93xx_keypad_resource[] = {
674         {
675                 .start  = EP93XX_KEY_MATRIX_PHYS_BASE,
676                 .end    = EP93XX_KEY_MATRIX_PHYS_BASE + 0x0c - 1,
677                 .flags  = IORESOURCE_MEM,
678         }, {
679                 .start  = IRQ_EP93XX_KEY,
680                 .end    = IRQ_EP93XX_KEY,
681                 .flags  = IORESOURCE_IRQ,
682         },
683 };
684
685 static struct platform_device ep93xx_keypad_device = {
686         .name           = "ep93xx-keypad",
687         .id             = -1,
688         .dev            = {
689                 .platform_data  = &ep93xx_keypad_data,
690         },
691         .num_resources  = ARRAY_SIZE(ep93xx_keypad_resource),
692         .resource       = ep93xx_keypad_resource,
693 };
694
695 /**
696  * ep93xx_register_keypad - Register the keypad platform device.
697  * @data:       platform specific keypad configuration (__initdata)
698  */
699 void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
700 {
701         ep93xx_keypad_data = *data;
702         platform_device_register(&ep93xx_keypad_device);
703 }
704
705 int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
706 {
707         int err;
708         int i;
709
710         for (i = 0; i < 8; i++) {
711                 err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
712                 if (err)
713                         goto fail_gpio_c;
714                 err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
715                 if (err)
716                         goto fail_gpio_d;
717         }
718
719         /* Enable the keypad controller; GPIO ports C and D used for keypad */
720         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
721                                  EP93XX_SYSCON_DEVCFG_GONK);
722
723         return 0;
724
725 fail_gpio_d:
726         gpio_free(EP93XX_GPIO_LINE_C(i));
727 fail_gpio_c:
728         for ( ; i >= 0; --i) {
729                 gpio_free(EP93XX_GPIO_LINE_C(i));
730                 gpio_free(EP93XX_GPIO_LINE_D(i));
731         }
732         return err;
733 }
734 EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
735
736 void ep93xx_keypad_release_gpio(struct platform_device *pdev)
737 {
738         int i;
739
740         for (i = 0; i < 8; i++) {
741                 gpio_free(EP93XX_GPIO_LINE_C(i));
742                 gpio_free(EP93XX_GPIO_LINE_D(i));
743         }
744
745         /* Disable the keypad controller; GPIO ports C and D used for GPIO */
746         ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
747                                EP93XX_SYSCON_DEVCFG_GONK);
748 }
749 EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
750
751 /*************************************************************************
752  * EP93xx I2S audio peripheral handling
753  *************************************************************************/
754 static struct resource ep93xx_i2s_resource[] = {
755         {
756                 .start  = EP93XX_I2S_PHYS_BASE,
757                 .end    = EP93XX_I2S_PHYS_BASE + 0x100 - 1,
758                 .flags  = IORESOURCE_MEM,
759         },
760 };
761
762 static struct platform_device ep93xx_i2s_device = {
763         .name           = "ep93xx-i2s",
764         .id             = -1,
765         .num_resources  = ARRAY_SIZE(ep93xx_i2s_resource),
766         .resource       = ep93xx_i2s_resource,
767 };
768
769 static struct platform_device ep93xx_pcm_device = {
770         .name           = "ep93xx-pcm-audio",
771         .id             = -1,
772 };
773
774 void __init ep93xx_register_i2s(void)
775 {
776         platform_device_register(&ep93xx_i2s_device);
777         platform_device_register(&ep93xx_pcm_device);
778 }
779
780 #define EP93XX_SYSCON_DEVCFG_I2S_MASK   (EP93XX_SYSCON_DEVCFG_I2SONSSP | \
781                                          EP93XX_SYSCON_DEVCFG_I2SONAC97)
782
783 #define EP93XX_I2SCLKDIV_MASK           (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
784                                          EP93XX_SYSCON_I2SCLKDIV_SPOL)
785
786 int ep93xx_i2s_acquire(void)
787 {
788         unsigned val;
789
790         ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_I2SONAC97,
791                         EP93XX_SYSCON_DEVCFG_I2S_MASK);
792
793         /*
794          * This is potentially racy with the clock api for i2s_mclk, sclk and 
795          * lrclk. Since the i2s driver is the only user of those clocks we
796          * rely on it to prevent parallel use of this function and the 
797          * clock api for the i2s clocks.
798          */
799         val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
800         val &= ~EP93XX_I2SCLKDIV_MASK;
801         val |= EP93XX_SYSCON_I2SCLKDIV_ORIDE | EP93XX_SYSCON_I2SCLKDIV_SPOL;
802         ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
803
804         return 0;
805 }
806 EXPORT_SYMBOL(ep93xx_i2s_acquire);
807
808 void ep93xx_i2s_release(void)
809 {
810         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
811 }
812 EXPORT_SYMBOL(ep93xx_i2s_release);
813
814 /*************************************************************************
815  * EP93xx AC97 audio peripheral handling
816  *************************************************************************/
817 static struct resource ep93xx_ac97_resources[] = {
818         {
819                 .start  = EP93XX_AAC_PHYS_BASE,
820                 .end    = EP93XX_AAC_PHYS_BASE + 0xac - 1,
821                 .flags  = IORESOURCE_MEM,
822         },
823         {
824                 .start  = IRQ_EP93XX_AACINTR,
825                 .end    = IRQ_EP93XX_AACINTR,
826                 .flags  = IORESOURCE_IRQ,
827         },
828 };
829
830 static struct platform_device ep93xx_ac97_device = {
831         .name           = "ep93xx-ac97",
832         .id             = -1,
833         .num_resources  = ARRAY_SIZE(ep93xx_ac97_resources),
834         .resource       = ep93xx_ac97_resources,
835 };
836
837 void __init ep93xx_register_ac97(void)
838 {
839         /*
840          * Make sure that the AC97 pins are not used by I2S.
841          */
842         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
843
844         platform_device_register(&ep93xx_ac97_device);
845         platform_device_register(&ep93xx_pcm_device);
846 }
847
848 void __init ep93xx_init_devices(void)
849 {
850         /* Disallow access to MaverickCrunch initially */
851         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
852
853         /* Get the GPIO working early, other devices need it */
854         platform_device_register(&ep93xx_gpio_device);
855
856         amba_device_register(&uart1_device, &iomem_resource);
857         amba_device_register(&uart2_device, &iomem_resource);
858         amba_device_register(&uart3_device, &iomem_resource);
859
860         platform_device_register(&ep93xx_rtc_device);
861         platform_device_register(&ep93xx_ohci_device);
862         platform_device_register(&ep93xx_leds);
863 }
864
865 void ep93xx_restart(char mode, const char *cmd)
866 {
867         /*
868          * Set then clear the SWRST bit to initiate a software reset
869          */
870         ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
871         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
872
873         while (1)
874                 ;
875 }