2 * arch/arm/mach-dove/common.c
4 * Core functions for Marvell Dove 88AP510 System On Chip
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
11 #include <linux/kernel.h>
12 #include <linux/delay.h>
13 #include <linux/init.h>
14 #include <linux/platform_device.h>
15 #include <linux/pci.h>
16 #include <linux/clk-provider.h>
17 #include <linux/ata_platform.h>
18 #include <linux/gpio.h>
20 #include <linux/of_platform.h>
22 #include <asm/setup.h>
23 #include <asm/timex.h>
24 #include <asm/hardware/cache-tauros2.h>
25 #include <asm/mach/map.h>
26 #include <asm/mach/time.h>
27 #include <asm/mach/pci.h>
28 #include <mach/dove.h>
30 #include <mach/bridge-regs.h>
31 #include <asm/mach/arch.h>
32 #include <linux/irq.h>
33 #include <plat/time.h>
34 #include <linux/platform_data/usb-ehci-orion.h>
35 #include <plat/common.h>
36 #include <plat/addr-map.h>
39 /*****************************************************************************
41 ****************************************************************************/
42 static struct map_desc dove_io_desc[] __initdata = {
44 .virtual = (unsigned long) DOVE_SB_REGS_VIRT_BASE,
45 .pfn = __phys_to_pfn(DOVE_SB_REGS_PHYS_BASE),
46 .length = DOVE_SB_REGS_SIZE,
49 .virtual = (unsigned long) DOVE_NB_REGS_VIRT_BASE,
50 .pfn = __phys_to_pfn(DOVE_NB_REGS_PHYS_BASE),
51 .length = DOVE_NB_REGS_SIZE,
56 void __init dove_map_io(void)
58 iotable_init(dove_io_desc, ARRAY_SIZE(dove_io_desc));
61 /*****************************************************************************
63 ****************************************************************************/
66 static DEFINE_SPINLOCK(gating_lock);
67 static struct clk *tclk;
69 static struct clk __init *dove_register_gate(const char *name,
70 const char *parent, u8 bit_idx)
72 return clk_register_gate(NULL, name, parent, 0,
73 (void __iomem *)CLOCK_GATING_CONTROL,
74 bit_idx, 0, &gating_lock);
77 static void __init dove_clk_init(void)
79 struct clk *usb0, *usb1, *sata, *pex0, *pex1, *sdio0, *sdio1;
80 struct clk *nand, *camera, *i2s0, *i2s1, *crypto, *ac97, *pdma;
81 struct clk *xor0, *xor1, *ge, *gephy;
83 tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT,
86 usb0 = dove_register_gate("usb0", "tclk", CLOCK_GATING_BIT_USB0);
87 usb1 = dove_register_gate("usb1", "tclk", CLOCK_GATING_BIT_USB1);
88 sata = dove_register_gate("sata", "tclk", CLOCK_GATING_BIT_SATA);
89 pex0 = dove_register_gate("pex0", "tclk", CLOCK_GATING_BIT_PCIE0);
90 pex1 = dove_register_gate("pex1", "tclk", CLOCK_GATING_BIT_PCIE1);
91 sdio0 = dove_register_gate("sdio0", "tclk", CLOCK_GATING_BIT_SDIO0);
92 sdio1 = dove_register_gate("sdio1", "tclk", CLOCK_GATING_BIT_SDIO1);
93 nand = dove_register_gate("nand", "tclk", CLOCK_GATING_BIT_NAND);
94 camera = dove_register_gate("camera", "tclk", CLOCK_GATING_BIT_CAMERA);
95 i2s0 = dove_register_gate("i2s0", "tclk", CLOCK_GATING_BIT_I2S0);
96 i2s1 = dove_register_gate("i2s1", "tclk", CLOCK_GATING_BIT_I2S1);
97 crypto = dove_register_gate("crypto", "tclk", CLOCK_GATING_BIT_CRYPTO);
98 ac97 = dove_register_gate("ac97", "tclk", CLOCK_GATING_BIT_AC97);
99 pdma = dove_register_gate("pdma", "tclk", CLOCK_GATING_BIT_PDMA);
100 xor0 = dove_register_gate("xor0", "tclk", CLOCK_GATING_BIT_XOR0);
101 xor1 = dove_register_gate("xor1", "tclk", CLOCK_GATING_BIT_XOR1);
102 gephy = dove_register_gate("gephy", "tclk", CLOCK_GATING_BIT_GIGA_PHY);
103 ge = dove_register_gate("ge", "gephy", CLOCK_GATING_BIT_GBE);
105 orion_clkdev_add(NULL, "orion_spi.0", tclk);
106 orion_clkdev_add(NULL, "orion_spi.1", tclk);
107 orion_clkdev_add(NULL, "orion_wdt", tclk);
108 orion_clkdev_add(NULL, "mv64xxx_i2c.0", tclk);
110 orion_clkdev_add(NULL, "orion-ehci.0", usb0);
111 orion_clkdev_add(NULL, "orion-ehci.1", usb1);
112 orion_clkdev_add(NULL, "mv643xx_eth.0", ge);
113 orion_clkdev_add("0", "sata_mv.0", sata);
114 orion_clkdev_add("0", "pcie", pex0);
115 orion_clkdev_add("1", "pcie", pex1);
116 orion_clkdev_add(NULL, "sdhci-dove.0", sdio0);
117 orion_clkdev_add(NULL, "sdhci-dove.1", sdio1);
118 orion_clkdev_add(NULL, "orion_nand", nand);
119 orion_clkdev_add(NULL, "cafe1000-ccic.0", camera);
120 orion_clkdev_add(NULL, "kirkwood-i2s.0", i2s0);
121 orion_clkdev_add(NULL, "kirkwood-i2s.1", i2s1);
122 orion_clkdev_add(NULL, "mv_crypto", crypto);
123 orion_clkdev_add(NULL, "dove-ac97", ac97);
124 orion_clkdev_add(NULL, "dove-pdma", pdma);
125 orion_clkdev_add(NULL, "mv_xor_shared.0", xor0);
126 orion_clkdev_add(NULL, "mv_xor_shared.1", xor1);
129 /*****************************************************************************
131 ****************************************************************************/
132 void __init dove_ehci0_init(void)
134 orion_ehci_init(DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0, EHCI_PHY_NA);
137 /*****************************************************************************
139 ****************************************************************************/
140 void __init dove_ehci1_init(void)
142 orion_ehci_1_init(DOVE_USB1_PHYS_BASE, IRQ_DOVE_USB1);
145 /*****************************************************************************
147 ****************************************************************************/
148 void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
150 orion_ge00_init(eth_data, DOVE_GE00_PHYS_BASE,
151 IRQ_DOVE_GE00_SUM, IRQ_DOVE_GE00_ERR,
155 /*****************************************************************************
157 ****************************************************************************/
158 void __init dove_rtc_init(void)
160 orion_rtc_init(DOVE_RTC_PHYS_BASE, IRQ_DOVE_RTC);
163 /*****************************************************************************
165 ****************************************************************************/
166 void __init dove_sata_init(struct mv_sata_platform_data *sata_data)
168 orion_sata_init(sata_data, DOVE_SATA_PHYS_BASE, IRQ_DOVE_SATA);
172 /*****************************************************************************
174 ****************************************************************************/
175 void __init dove_uart0_init(void)
177 orion_uart0_init(DOVE_UART0_VIRT_BASE, DOVE_UART0_PHYS_BASE,
178 IRQ_DOVE_UART_0, tclk);
181 /*****************************************************************************
183 ****************************************************************************/
184 void __init dove_uart1_init(void)
186 orion_uart1_init(DOVE_UART1_VIRT_BASE, DOVE_UART1_PHYS_BASE,
187 IRQ_DOVE_UART_1, tclk);
190 /*****************************************************************************
192 ****************************************************************************/
193 void __init dove_uart2_init(void)
195 orion_uart2_init(DOVE_UART2_VIRT_BASE, DOVE_UART2_PHYS_BASE,
196 IRQ_DOVE_UART_2, tclk);
199 /*****************************************************************************
201 ****************************************************************************/
202 void __init dove_uart3_init(void)
204 orion_uart3_init(DOVE_UART3_VIRT_BASE, DOVE_UART3_PHYS_BASE,
205 IRQ_DOVE_UART_3, tclk);
208 /*****************************************************************************
210 ****************************************************************************/
211 void __init dove_spi0_init(void)
213 orion_spi_init(DOVE_SPI0_PHYS_BASE);
216 void __init dove_spi1_init(void)
218 orion_spi_1_init(DOVE_SPI1_PHYS_BASE);
221 /*****************************************************************************
223 ****************************************************************************/
224 void __init dove_i2c_init(void)
226 orion_i2c_init(DOVE_I2C_PHYS_BASE, IRQ_DOVE_I2C, 10);
229 /*****************************************************************************
231 ****************************************************************************/
232 void __init dove_init_early(void)
234 orion_time_set_base(TIMER_VIRT_BASE);
237 static int __init dove_find_tclk(void)
242 static void __init dove_timer_init(void)
244 dove_tclk = dove_find_tclk();
245 orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
246 IRQ_DOVE_BRIDGE, dove_tclk);
249 struct sys_timer dove_timer = {
250 .init = dove_timer_init,
253 /*****************************************************************************
254 * Cryptographic Engines and Security Accelerator (CESA)
255 ****************************************************************************/
256 void __init dove_crypto_init(void)
258 orion_crypto_init(DOVE_CRYPT_PHYS_BASE, DOVE_CESA_PHYS_BASE,
259 DOVE_CESA_SIZE, IRQ_DOVE_CRYPTO);
262 /*****************************************************************************
264 ****************************************************************************/
265 void __init dove_xor0_init(void)
267 orion_xor0_init(DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE,
268 IRQ_DOVE_XOR_00, IRQ_DOVE_XOR_01);
271 /*****************************************************************************
273 ****************************************************************************/
274 void __init dove_xor1_init(void)
276 orion_xor1_init(DOVE_XOR1_PHYS_BASE, DOVE_XOR1_HIGH_PHYS_BASE,
277 IRQ_DOVE_XOR_10, IRQ_DOVE_XOR_11);
280 /*****************************************************************************
282 ****************************************************************************/
283 static u64 sdio_dmamask = DMA_BIT_MASK(32);
285 static struct resource dove_sdio0_resources[] = {
287 .start = DOVE_SDIO0_PHYS_BASE,
288 .end = DOVE_SDIO0_PHYS_BASE + 0xff,
289 .flags = IORESOURCE_MEM,
291 .start = IRQ_DOVE_SDIO0,
292 .end = IRQ_DOVE_SDIO0,
293 .flags = IORESOURCE_IRQ,
297 static struct platform_device dove_sdio0 = {
298 .name = "sdhci-dove",
301 .dma_mask = &sdio_dmamask,
302 .coherent_dma_mask = DMA_BIT_MASK(32),
304 .resource = dove_sdio0_resources,
305 .num_resources = ARRAY_SIZE(dove_sdio0_resources),
308 void __init dove_sdio0_init(void)
310 platform_device_register(&dove_sdio0);
313 static struct resource dove_sdio1_resources[] = {
315 .start = DOVE_SDIO1_PHYS_BASE,
316 .end = DOVE_SDIO1_PHYS_BASE + 0xff,
317 .flags = IORESOURCE_MEM,
319 .start = IRQ_DOVE_SDIO1,
320 .end = IRQ_DOVE_SDIO1,
321 .flags = IORESOURCE_IRQ,
325 static struct platform_device dove_sdio1 = {
326 .name = "sdhci-dove",
329 .dma_mask = &sdio_dmamask,
330 .coherent_dma_mask = DMA_BIT_MASK(32),
332 .resource = dove_sdio1_resources,
333 .num_resources = ARRAY_SIZE(dove_sdio1_resources),
336 void __init dove_sdio1_init(void)
338 platform_device_register(&dove_sdio1);
341 void __init dove_init(void)
343 pr_info("Dove 88AP510 SoC, TCLK = %d MHz.\n",
344 (dove_tclk + 499999) / 1000000);
346 #ifdef CONFIG_CACHE_TAUROS2
349 dove_setup_cpu_mbus();
351 /* Setup root of clk tree */
354 /* internal devices that every board has */
360 void dove_restart(char mode, const char *cmd)
363 * Enable soft reset to assert RSTOUTn.
365 writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
370 writel(SOFT_RESET, SYSTEM_SOFT_RESET);
376 #if defined(CONFIG_MACH_DOVE_DT)
378 * Auxdata required until real OF clock provider
380 struct of_dev_auxdata dove_auxdata_lookup[] __initdata = {
381 OF_DEV_AUXDATA("marvell,orion-spi", 0xf1010600, "orion_spi.0", NULL),
382 OF_DEV_AUXDATA("marvell,orion-spi", 0xf1014600, "orion_spi.1", NULL),
383 OF_DEV_AUXDATA("marvell,orion-wdt", 0xf1020300, "orion_wdt", NULL),
384 OF_DEV_AUXDATA("marvell,mv64xxx-i2c", 0xf1011000, "mv64xxx_i2c.0",
386 OF_DEV_AUXDATA("marvell,orion-sata", 0xf10a0000, "sata_mv.0", NULL),
387 OF_DEV_AUXDATA("marvell,dove-sdhci", 0xf1092000, "sdhci-dove.0", NULL),
388 OF_DEV_AUXDATA("marvell,dove-sdhci", 0xf1090000, "sdhci-dove.1", NULL),
392 static struct mv643xx_eth_platform_data dove_dt_ge00_data = {
393 .phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT,
396 static void __init dove_dt_init(void)
398 pr_info("Dove 88AP510 SoC, TCLK = %d MHz.\n",
399 (dove_tclk + 499999) / 1000000);
401 #ifdef CONFIG_CACHE_TAUROS2
404 dove_setup_cpu_mbus();
406 /* Setup root of clk tree */
409 /* Internal devices not ported to DT yet */
414 dove_ge00_init(&dove_dt_ge00_data);
417 dove_pcie_init(1, 1);
420 of_platform_populate(NULL, of_default_bus_match_table,
421 dove_auxdata_lookup, NULL);
424 static const char * const dove_dt_board_compat[] = {
429 DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)")
430 .map_io = dove_map_io,
431 .init_early = dove_init_early,
432 .init_irq = orion_dt_init_irq,
433 .timer = &dove_timer,
434 .init_machine = dove_dt_init,
435 .restart = dove_restart,
436 .dt_compat = dove_dt_board_compat,