arch/arm/mach-davinci/include/mach/timer_defs.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright (C) 2011 DENX Software Engineering GmbH
   4  * Heiko Schocher <hs@denx.de>
   5  */
   6 #ifndef _TIMER_DEFS_H_
   7 #define _TIMER_DEFS_H_
   8
   9 struct davinci_timer {
  10         u_int32_t       pid12;
  11         u_int32_t       emumgt;
  12         u_int32_t       na1;
  13         u_int32_t       na2;
  14         u_int32_t       tim12;
  15         u_int32_t       tim34;
  16         u_int32_t       prd12;
  17         u_int32_t       prd34;
  18         u_int32_t       tcr;
  19         u_int32_t       tgcr;
  20         u_int32_t       wdtcr;
  21 };
  22
  23 #define DV_TIMER_TCR_ENAMODE_MASK               3
  24
  25 #define DV_TIMER_TCR_ENAMODE12_SHIFT            6
  26 #define DV_TIMER_TCR_CLKSRC12_SHIFT             8
  27 #define DV_TIMER_TCR_READRSTMODE12_SHIFT        10
  28 #define DV_TIMER_TCR_CAPMODE12_SHIFT            11
  29 #define DV_TIMER_TCR_CAPVTMODE12_SHIFT          12
  30 #define DV_TIMER_TCR_ENAMODE34_SHIFT            22
  31 #define DV_TIMER_TCR_CLKSRC34_SHIFT             24
  32 #define DV_TIMER_TCR_READRSTMODE34_SHIFT        26
  33 #define DV_TIMER_TCR_CAPMODE34_SHIFT            27
  34 #define DV_TIMER_TCR_CAPEVTMODE12_SHIFT         28
  35
  36 #define DV_WDT_ENABLE_SYS_RESET         0x00020000
  37 #define DV_WDT_TRIGGER_SYS_RESET        0x00020002
  38
  39 #ifdef CONFIG_HW_WATCHDOG
  40 void davinci_hw_watchdog_enable(void);
  41 void davinci_hw_watchdog_reset(void);
  42 #endif
  43 #endif /* _TIMER_DEFS_H_ */