arch/arm/mach-davinci/board-dm646x-evm.c

   1 /*
   2  * TI DaVinci DM646X EVM board
   3  *
   4  * Derived from: arch/arm/mach-davinci/board-evm.c
   5  * Copyright (C) 2006 Texas Instruments.
   6  *
   7  * (C) 2007-2008, MontaVista Software, Inc.
   8  *
   9  * This file is licensed under the terms of the GNU General Public License
  10  * version 2. This program is licensed "as is" without any warranty of any
  11  * kind, whether express or implied.
  12  *
  13  */
  14
  15 /**************************************************************************
  16  * Included Files
  17  **************************************************************************/
  18
  19 #include <linux/kernel.h>
  20 #include <linux/init.h>
  21 #include <linux/leds.h>
  22 #include <linux/gpio.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/i2c.h>
  25 #include <linux/platform_data/at24.h>
  26 #include <linux/platform_data/pcf857x.h>
  27
  28 #include <media/i2c/tvp514x.h>
  29 #include <media/i2c/adv7343.h>
  30
  31 #include <linux/mtd/mtd.h>
  32 #include <linux/mtd/rawnand.h>
  33 #include <linux/mtd/partitions.h>
  34 #include <linux/clk.h>
  35 #include <linux/export.h>
  36 #include <linux/platform_data/gpio-davinci.h>
  37 #include <linux/platform_data/i2c-davinci.h>
  38 #include <linux/platform_data/mtd-davinci.h>
  39 #include <linux/platform_data/mtd-davinci-aemif.h>
  40
  41 #include <asm/mach-types.h>
  42 #include <asm/mach/arch.h>
  43
  44 #include <mach/common.h>
  45 #include <mach/irqs.h>
  46 #include <mach/serial.h>
  47
  48 #include "davinci.h"
  49
  50 #define NAND_BLOCK_SIZE         SZ_128K
  51
  52 /* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot
  53  * and U-Boot environment this avoids dependency on any particular combination
  54  * of UBL, U-Boot or flashing tools etc.
  55  */
  56 static struct mtd_partition davinci_nand_partitions[] = {
  57         {
  58                 /* UBL, U-Boot with environment */
  59                 .name           = "bootloader",
  60                 .offset         = MTDPART_OFS_APPEND,
  61                 .size           = 16 * NAND_BLOCK_SIZE,
  62                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
  63         }, {
  64                 .name           = "kernel",
  65                 .offset         = MTDPART_OFS_APPEND,
  66                 .size           = SZ_4M,
  67                 .mask_flags     = 0,
  68         }, {
  69                 .name           = "filesystem",
  70                 .offset         = MTDPART_OFS_APPEND,
  71                 .size           = MTDPART_SIZ_FULL,
  72                 .mask_flags     = 0,
  73         }
  74 };
  75
  76 static struct davinci_aemif_timing dm6467tevm_nandflash_timing = {
  77         .wsetup         = 29,
  78         .wstrobe        = 24,
  79         .whold          = 14,
  80         .rsetup         = 19,
  81         .rstrobe        = 33,
  82         .rhold          = 0,
  83         .ta             = 29,
  84 };
  85
  86 static struct davinci_nand_pdata davinci_nand_data = {
  87         .mask_cle               = 0x80000,
  88         .mask_ale               = 0x40000,
  89         .parts                  = davinci_nand_partitions,
  90         .nr_parts               = ARRAY_SIZE(davinci_nand_partitions),
  91         .ecc_mode               = NAND_ECC_HW,
  92         .ecc_bits               = 1,
  93         .options                = 0,
  94 };
  95
  96 static struct resource davinci_nand_resources[] = {
  97         {
  98                 .start          = DM646X_ASYNC_EMIF_CS2_SPACE_BASE,
  99                 .end            = DM646X_ASYNC_EMIF_CS2_SPACE_BASE + SZ_32M - 1,
 100                 .flags          = IORESOURCE_MEM,
 101         }, {
 102                 .start          = DM646X_ASYNC_EMIF_CONTROL_BASE,
 103                 .end            = DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
 104                 .flags          = IORESOURCE_MEM,
 105         },
 106 };
 107
 108 static struct platform_device davinci_nand_device = {
 109         .name                   = "davinci_nand",
 110         .id                     = 0,
 111
 112         .num_resources          = ARRAY_SIZE(davinci_nand_resources),
 113         .resource               = davinci_nand_resources,
 114
 115         .dev                    = {
 116                 .platform_data  = &davinci_nand_data,
 117         },
 118 };
 119
 120 #define HAS_ATA         (IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
 121                          IS_ENABLED(CONFIG_PATA_BK3710))
 122
 123 #ifdef CONFIG_I2C
 124 /* CPLD Register 0 bits to control ATA */
 125 #define DM646X_EVM_ATA_RST              BIT(0)
 126 #define DM646X_EVM_ATA_PWD              BIT(1)
 127
 128 /* CPLD Register 0 Client: used for I/O Control */
 129 static int cpld_reg0_probe(struct i2c_client *client,
 130                            const struct i2c_device_id *id)
 131 {
 132         if (HAS_ATA) {
 133                 u8 data;
 134                 struct i2c_msg msg[2] = {
 135                         {
 136                                 .addr = client->addr,
 137                                 .flags = I2C_M_RD,
 138                                 .len = 1,
 139                                 .buf = &data,
 140                         },
 141                         {
 142                                 .addr = client->addr,
 143                                 .flags = 0,
 144                                 .len = 1,
 145                                 .buf = &data,
 146                         },
 147                 };
 148
 149                 /* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */
 150                 i2c_transfer(client->adapter, msg, 1);
 151                 data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD);
 152                 i2c_transfer(client->adapter, msg + 1, 1);
 153         }
 154
 155         return 0;
 156 }
 157
 158 static const struct i2c_device_id cpld_reg_ids[] = {
 159         { "cpld_reg0", 0, },
 160         { },
 161 };
 162
 163 static struct i2c_driver dm6467evm_cpld_driver = {
 164         .driver.name    = "cpld_reg0",
 165         .id_table       = cpld_reg_ids,
 166         .probe          = cpld_reg0_probe,
 167 };
 168
 169 /* LEDS */
 170
 171 static struct gpio_led evm_leds[] = {
 172         { .name = "DS1", .active_low = 1, },
 173         { .name = "DS2", .active_low = 1, },
 174         { .name = "DS3", .active_low = 1, },
 175         { .name = "DS4", .active_low = 1, },
 176 };
 177
 178 static const struct gpio_led_platform_data evm_led_data = {
 179         .num_leds = ARRAY_SIZE(evm_leds),
 180         .leds     = evm_leds,
 181 };
 182
 183 static struct platform_device *evm_led_dev;
 184
 185 static int evm_led_setup(struct i2c_client *client, int gpio,
 186                         unsigned int ngpio, void *c)
 187 {
 188         struct gpio_led *leds = evm_leds;
 189         int status;
 190
 191         while (ngpio--) {
 192                 leds->gpio = gpio++;
 193                 leds++;
 194         }
 195
 196         evm_led_dev = platform_device_alloc("leds-gpio", 0);
 197         platform_device_add_data(evm_led_dev, &evm_led_data,
 198                                 sizeof(evm_led_data));
 199
 200         evm_led_dev->dev.parent = &client->dev;
 201         status = platform_device_add(evm_led_dev);
 202         if (status < 0) {
 203                 platform_device_put(evm_led_dev);
 204                 evm_led_dev = NULL;
 205         }
 206         return status;
 207 }
 208
 209 static int evm_led_teardown(struct i2c_client *client, int gpio,
 210                                 unsigned ngpio, void *c)
 211 {
 212         if (evm_led_dev) {
 213                 platform_device_unregister(evm_led_dev);
 214                 evm_led_dev = NULL;
 215         }
 216         return 0;
 217 }
 218
 219 static int evm_sw_gpio[4] = { -EINVAL, -EINVAL, -EINVAL, -EINVAL };
 220
 221 static int evm_sw_setup(struct i2c_client *client, int gpio,
 222                         unsigned ngpio, void *c)
 223 {
 224         int status;
 225         int i;
 226         char label[10];
 227
 228         for (i = 0; i < 4; ++i) {
 229                 snprintf(label, 10, "user_sw%d", i);
 230                 status = gpio_request(gpio, label);
 231                 if (status)
 232                         goto out_free;
 233                 evm_sw_gpio[i] = gpio++;
 234
 235                 status = gpio_direction_input(evm_sw_gpio[i]);
 236                 if (status) {
 237                         gpio_free(evm_sw_gpio[i]);
 238                         evm_sw_gpio[i] = -EINVAL;
 239                         goto out_free;
 240                 }
 241
 242                 status = gpio_export(evm_sw_gpio[i], 0);
 243                 if (status) {
 244                         gpio_free(evm_sw_gpio[i]);
 245                         evm_sw_gpio[i] = -EINVAL;
 246                         goto out_free;
 247                 }
 248         }
 249         return status;
 250 out_free:
 251         for (i = 0; i < 4; ++i) {
 252                 if (evm_sw_gpio[i] != -EINVAL) {
 253                         gpio_free(evm_sw_gpio[i]);
 254                         evm_sw_gpio[i] = -EINVAL;
 255                 }
 256         }
 257         return status;
 258 }
 259
 260 static int evm_sw_teardown(struct i2c_client *client, int gpio,
 261                         unsigned ngpio, void *c)
 262 {
 263         int i;
 264
 265         for (i = 0; i < 4; ++i) {
 266                 if (evm_sw_gpio[i] != -EINVAL) {
 267                         gpio_unexport(evm_sw_gpio[i]);
 268                         gpio_free(evm_sw_gpio[i]);
 269                         evm_sw_gpio[i] = -EINVAL;
 270                 }
 271         }
 272         return 0;
 273 }
 274
 275 static int evm_pcf_setup(struct i2c_client *client, int gpio,
 276                         unsigned int ngpio, void *c)
 277 {
 278         int status;
 279
 280         if (ngpio < 8)
 281                 return -EINVAL;
 282
 283         status = evm_sw_setup(client, gpio, 4, c);
 284         if (status)
 285                 return status;
 286
 287         return evm_led_setup(client, gpio+4, 4, c);
 288 }
 289
 290 static int evm_pcf_teardown(struct i2c_client *client, int gpio,
 291                         unsigned int ngpio, void *c)
 292 {
 293         BUG_ON(ngpio < 8);
 294
 295         evm_sw_teardown(client, gpio, 4, c);
 296         evm_led_teardown(client, gpio+4, 4, c);
 297
 298         return 0;
 299 }
 300
 301 static struct pcf857x_platform_data pcf_data = {
 302         .gpio_base      = DAVINCI_N_GPIO+1,
 303         .setup          = evm_pcf_setup,
 304         .teardown       = evm_pcf_teardown,
 305 };
 306
 307 /* Most of this EEPROM is unused, but U-Boot uses some data:
 308  *  - 0x7f00, 6 bytes Ethernet Address
 309  *  - ... newer boards may have more
 310  */
 311
 312 static struct at24_platform_data eeprom_info = {
 313         .byte_len       = (256*1024) / 8,
 314         .page_size      = 64,
 315         .flags          = AT24_FLAG_ADDR16,
 316         .setup          = davinci_get_mac_addr,
 317         .context        = (void *)0x7f00,
 318 };
 319 #endif
 320
 321 static u8 dm646x_iis_serializer_direction[] = {
 322        TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
 323 };
 324
 325 static u8 dm646x_dit_serializer_direction[] = {
 326        TX_MODE,
 327 };
 328
 329 static struct snd_platform_data dm646x_evm_snd_data[] = {
 330         {
 331                 .tx_dma_offset  = 0x400,
 332                 .rx_dma_offset  = 0x400,
 333                 .op_mode        = DAVINCI_MCASP_IIS_MODE,
 334                 .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
 335                 .tdm_slots      = 2,
 336                 .serial_dir     = dm646x_iis_serializer_direction,
 337                 .asp_chan_q     = EVENTQ_0,
 338         },
 339         {
 340                 .tx_dma_offset  = 0x400,
 341                 .rx_dma_offset  = 0,
 342                 .op_mode        = DAVINCI_MCASP_DIT_MODE,
 343                 .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
 344                 .tdm_slots      = 32,
 345                 .serial_dir     = dm646x_dit_serializer_direction,
 346                 .asp_chan_q     = EVENTQ_0,
 347         },
 348 };
 349
 350 #ifdef CONFIG_I2C
 351 static struct i2c_client *cpld_client;
 352
 353 static int cpld_video_probe(struct i2c_client *client,
 354                         const struct i2c_device_id *id)
 355 {
 356         cpld_client = client;
 357         return 0;
 358 }
 359
 360 static int cpld_video_remove(struct i2c_client *client)
 361 {
 362         cpld_client = NULL;
 363         return 0;
 364 }
 365
 366 static const struct i2c_device_id cpld_video_id[] = {
 367         { "cpld_video", 0 },
 368         { }
 369 };
 370
 371 static struct i2c_driver cpld_video_driver = {
 372         .driver = {
 373                 .name   = "cpld_video",
 374         },
 375         .probe          = cpld_video_probe,
 376         .remove         = cpld_video_remove,
 377         .id_table       = cpld_video_id,
 378 };
 379
 380 static void evm_init_cpld(void)
 381 {
 382         i2c_add_driver(&cpld_video_driver);
 383 }
 384
 385 static struct i2c_board_info __initdata i2c_info[] =  {
 386         {
 387                 I2C_BOARD_INFO("24c256", 0x50),
 388                 .platform_data  = &eeprom_info,
 389         },
 390         {
 391                 I2C_BOARD_INFO("pcf8574a", 0x38),
 392                 .platform_data  = &pcf_data,
 393         },
 394         {
 395                 I2C_BOARD_INFO("cpld_reg0", 0x3a),
 396         },
 397         {
 398                 I2C_BOARD_INFO("tlv320aic33", 0x18),
 399         },
 400         {
 401                 I2C_BOARD_INFO("cpld_video", 0x3b),
 402         },
 403 };
 404
 405 static struct davinci_i2c_platform_data i2c_pdata = {
 406         .bus_freq       = 100 /* kHz */,
 407         .bus_delay      = 0 /* usec */,
 408 };
 409
 410 #define VCH2CLK_MASK            (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
 411 #define VCH2CLK_SYSCLK8         (BIT(9))
 412 #define VCH2CLK_AUXCLK          (BIT(9) | BIT(8))
 413 #define VCH3CLK_MASK            (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
 414 #define VCH3CLK_SYSCLK8         (BIT(13))
 415 #define VCH3CLK_AUXCLK          (BIT(14) | BIT(13))
 416
 417 #define VIDCH2CLK               (BIT(10))
 418 #define VIDCH3CLK               (BIT(11))
 419 #define VIDCH1CLK               (BIT(4))
 420 #define TVP7002_INPUT           (BIT(4))
 421 #define TVP5147_INPUT           (~BIT(4))
 422 #define VPIF_INPUT_ONE_CHANNEL  (BIT(5))
 423 #define VPIF_INPUT_TWO_CHANNEL  (~BIT(5))
 424 #define TVP5147_CH0             "tvp514x-0"
 425 #define TVP5147_CH1             "tvp514x-1"
 426
 427 /* spin lock for updating above registers */
 428 static spinlock_t vpif_reg_lock;
 429
 430 static int set_vpif_clock(int mux_mode, int hd)
 431 {
 432         unsigned long flags;
 433         unsigned int value;
 434         int val = 0;
 435         int err = 0;
 436
 437         if (!cpld_client)
 438                 return -ENXIO;
 439
 440         /* disable the clock */
 441         spin_lock_irqsave(&vpif_reg_lock, flags);
 442         value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
 443         value |= (VIDCH3CLK | VIDCH2CLK);
 444         __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
 445         spin_unlock_irqrestore(&vpif_reg_lock, flags);
 446
 447         val = i2c_smbus_read_byte(cpld_client);
 448         if (val < 0)
 449                 return val;
 450
 451         if (mux_mode == 1)
 452                 val &= ~0x40;
 453         else
 454                 val |= 0x40;
 455
 456         err = i2c_smbus_write_byte(cpld_client, val);
 457         if (err)
 458                 return err;
 459
 460         value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
 461         value &= ~(VCH2CLK_MASK);
 462         value &= ~(VCH3CLK_MASK);
 463
 464         if (hd >= 1)
 465                 value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
 466         else
 467                 value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
 468
 469         __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
 470
 471         spin_lock_irqsave(&vpif_reg_lock, flags);
 472         value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
 473         /* enable the clock */
 474         value &= ~(VIDCH3CLK | VIDCH2CLK);
 475         __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
 476         spin_unlock_irqrestore(&vpif_reg_lock, flags);
 477
 478         return 0;
 479 }
 480
 481 static struct vpif_subdev_info dm646x_vpif_subdev[] = {
 482         {
 483                 .name   = "adv7343",
 484                 .board_info = {
 485                         I2C_BOARD_INFO("adv7343", 0x2a),
 486                 },
 487         },
 488         {
 489                 .name   = "ths7303",
 490                 .board_info = {
 491                         I2C_BOARD_INFO("ths7303", 0x2c),
 492                 },
 493         },
 494 };
 495
 496 static const struct vpif_output dm6467_ch0_outputs[] = {
 497         {
 498                 .output = {
 499                         .index = 0,
 500                         .name = "Composite",
 501                         .type = V4L2_OUTPUT_TYPE_ANALOG,
 502                         .capabilities = V4L2_OUT_CAP_STD,
 503                         .std = V4L2_STD_ALL,
 504                 },
 505                 .subdev_name = "adv7343",
 506                 .output_route = ADV7343_COMPOSITE_ID,
 507         },
 508         {
 509                 .output = {
 510                         .index = 1,
 511                         .name = "Component",
 512                         .type = V4L2_OUTPUT_TYPE_ANALOG,
 513                         .capabilities = V4L2_OUT_CAP_DV_TIMINGS,
 514                 },
 515                 .subdev_name = "adv7343",
 516                 .output_route = ADV7343_COMPONENT_ID,
 517         },
 518         {
 519                 .output = {
 520                         .index = 2,
 521                         .name = "S-Video",
 522                         .type = V4L2_OUTPUT_TYPE_ANALOG,
 523                         .capabilities = V4L2_OUT_CAP_STD,
 524                         .std = V4L2_STD_ALL,
 525                 },
 526                 .subdev_name = "adv7343",
 527                 .output_route = ADV7343_SVIDEO_ID,
 528         },
 529 };
 530
 531 static struct vpif_display_config dm646x_vpif_display_config = {
 532         .set_clock      = set_vpif_clock,
 533         .subdevinfo     = dm646x_vpif_subdev,
 534         .subdev_count   = ARRAY_SIZE(dm646x_vpif_subdev),
 535         .i2c_adapter_id = 1,
 536         .chan_config[0] = {
 537                 .outputs = dm6467_ch0_outputs,
 538                 .output_count = ARRAY_SIZE(dm6467_ch0_outputs),
 539         },
 540         .card_name      = "DM646x EVM Video Display",
 541 };
 542
 543 /**
 544  * setup_vpif_input_path()
 545  * @channel: channel id (0 - CH0, 1 - CH1)
 546  * @sub_dev_name: ptr sub device name
 547  *
 548  * This will set vpif input to capture data from tvp514x or
 549  * tvp7002.
 550  */
 551 static int setup_vpif_input_path(int channel, const char *sub_dev_name)
 552 {
 553         int err = 0;
 554         int val;
 555
 556         /* for channel 1, we don't do anything */
 557         if (channel != 0)
 558                 return 0;
 559
 560         if (!cpld_client)
 561                 return -ENXIO;
 562
 563         val = i2c_smbus_read_byte(cpld_client);
 564         if (val < 0)
 565                 return val;
 566
 567         if (!strcmp(sub_dev_name, TVP5147_CH0) ||
 568             !strcmp(sub_dev_name, TVP5147_CH1))
 569                 val &= TVP5147_INPUT;
 570         else
 571                 val |= TVP7002_INPUT;
 572
 573         err = i2c_smbus_write_byte(cpld_client, val);
 574         if (err)
 575                 return err;
 576         return 0;
 577 }
 578
 579 /**
 580  * setup_vpif_input_channel_mode()
 581  * @mux_mode:  mux mode. 0 - 1 channel or (1) - 2 channel
 582  *
 583  * This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147)
 584  */
 585 static int setup_vpif_input_channel_mode(int mux_mode)
 586 {
 587         unsigned long flags;
 588         int err = 0;
 589         int val;
 590         u32 value;
 591
 592         if (!cpld_client)
 593                 return -ENXIO;
 594
 595         val = i2c_smbus_read_byte(cpld_client);
 596         if (val < 0)
 597                 return val;
 598
 599         spin_lock_irqsave(&vpif_reg_lock, flags);
 600         value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
 601         if (mux_mode) {
 602                 val &= VPIF_INPUT_TWO_CHANNEL;
 603                 value |= VIDCH1CLK;
 604         } else {
 605                 val |= VPIF_INPUT_ONE_CHANNEL;
 606                 value &= ~VIDCH1CLK;
 607         }
 608         __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
 609         spin_unlock_irqrestore(&vpif_reg_lock, flags);
 610
 611         err = i2c_smbus_write_byte(cpld_client, val);
 612         if (err)
 613                 return err;
 614
 615         return 0;
 616 }
 617
 618 static struct tvp514x_platform_data tvp5146_pdata = {
 619         .clk_polarity = 0,
 620         .hs_polarity = 1,
 621         .vs_polarity = 1
 622 };
 623
 624 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
 625
 626 static struct vpif_subdev_info vpif_capture_sdev_info[] = {
 627         {
 628                 .name   = TVP5147_CH0,
 629                 .board_info = {
 630                         I2C_BOARD_INFO("tvp5146", 0x5d),
 631                         .platform_data = &tvp5146_pdata,
 632                 },
 633         },
 634         {
 635                 .name   = TVP5147_CH1,
 636                 .board_info = {
 637                         I2C_BOARD_INFO("tvp5146", 0x5c),
 638                         .platform_data = &tvp5146_pdata,
 639                 },
 640         },
 641 };
 642
 643 static struct vpif_input dm6467_ch0_inputs[] = {
 644         {
 645                 .input = {
 646                         .index = 0,
 647                         .name = "Composite",
 648                         .type = V4L2_INPUT_TYPE_CAMERA,
 649                         .capabilities = V4L2_IN_CAP_STD,
 650                         .std = TVP514X_STD_ALL,
 651                 },
 652                 .subdev_name = TVP5147_CH0,
 653                 .input_route = INPUT_CVBS_VI2B,
 654                 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
 655         },
 656 };
 657
 658 static struct vpif_input dm6467_ch1_inputs[] = {
 659        {
 660                 .input = {
 661                         .index = 0,
 662                         .name = "S-Video",
 663                         .type = V4L2_INPUT_TYPE_CAMERA,
 664                         .capabilities = V4L2_IN_CAP_STD,
 665                         .std = TVP514X_STD_ALL,
 666                 },
 667                 .subdev_name = TVP5147_CH1,
 668                 .input_route = INPUT_SVIDEO_VI2C_VI1C,
 669                 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
 670         },
 671 };
 672
 673 static struct vpif_capture_config dm646x_vpif_capture_cfg = {
 674         .setup_input_path = setup_vpif_input_path,
 675         .setup_input_channel_mode = setup_vpif_input_channel_mode,
 676         .subdev_info = vpif_capture_sdev_info,
 677         .subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
 678         .i2c_adapter_id = 1,
 679         .chan_config[0] = {
 680                 .inputs = dm6467_ch0_inputs,
 681                 .input_count = ARRAY_SIZE(dm6467_ch0_inputs),
 682                 .vpif_if = {
 683                         .if_type = VPIF_IF_BT656,
 684                         .hd_pol = 1,
 685                         .vd_pol = 1,
 686                         .fid_pol = 0,
 687                 },
 688         },
 689         .chan_config[1] = {
 690                 .inputs = dm6467_ch1_inputs,
 691                 .input_count = ARRAY_SIZE(dm6467_ch1_inputs),
 692                 .vpif_if = {
 693                         .if_type = VPIF_IF_BT656,
 694                         .hd_pol = 1,
 695                         .vd_pol = 1,
 696                         .fid_pol = 0,
 697                 },
 698         },
 699         .card_name = "DM646x EVM Video Capture",
 700 };
 701
 702 static void __init evm_init_video(void)
 703 {
 704         spin_lock_init(&vpif_reg_lock);
 705
 706         dm646x_setup_vpif(&dm646x_vpif_display_config,
 707                           &dm646x_vpif_capture_cfg);
 708 }
 709
 710 static void __init evm_init_i2c(void)
 711 {
 712         davinci_init_i2c(&i2c_pdata);
 713         i2c_add_driver(&dm6467evm_cpld_driver);
 714         i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
 715         evm_init_cpld();
 716         evm_init_video();
 717 }
 718 #endif
 719
 720 #define DM646X_REF_FREQ                 27000000
 721 #define DM646X_AUX_FREQ                 24000000
 722 #define DM6467T_EVM_REF_FREQ            33000000
 723
 724 static void __init davinci_map_io(void)
 725 {
 726         dm646x_init();
 727 }
 728
 729 static void __init dm646x_evm_init_time(void)
 730 {
 731         dm646x_init_time(DM646X_REF_FREQ, DM646X_AUX_FREQ);
 732 }
 733
 734 static void __init dm6467t_evm_init_time(void)
 735 {
 736         dm646x_init_time(DM6467T_EVM_REF_FREQ, DM646X_AUX_FREQ);
 737 }
 738
 739 #define DM646X_EVM_PHY_ID               "davinci_mdio-0:01"
 740 /*
 741  * The following EDMA channels/slots are not being used by drivers (for
 742  * example: Timer, GPIO, UART events etc) on dm646x, hence they are being
 743  * reserved for codecs on the DSP side.
 744  */
 745 static const s16 dm646x_dma_rsv_chans[][2] = {
 746         /* (offset, number) */
 747         { 0,  4},
 748         {13,  3},
 749         {24,  4},
 750         {30,  2},
 751         {54,  3},
 752         {-1, -1}
 753 };
 754
 755 static const s16 dm646x_dma_rsv_slots[][2] = {
 756         /* (offset, number) */
 757         { 0,  4},
 758         {13,  3},
 759         {24,  4},
 760         {30,  2},
 761         {54,  3},
 762         {128, 384},
 763         {-1, -1}
 764 };
 765
 766 static struct edma_rsv_info dm646x_edma_rsv[] = {
 767         {
 768                 .rsv_chans      = dm646x_dma_rsv_chans,
 769                 .rsv_slots      = dm646x_dma_rsv_slots,
 770         },
 771 };
 772
 773 static __init void evm_init(void)
 774 {
 775         int ret;
 776         struct davinci_soc_info *soc_info = &davinci_soc_info;
 777
 778         ret = dm646x_gpio_register();
 779         if (ret)
 780                 pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
 781
 782 #ifdef CONFIG_I2C
 783         evm_init_i2c();
 784 #endif
 785
 786         davinci_serial_init(dm646x_serial_device);
 787         dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
 788         dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
 789
 790         if (machine_is_davinci_dm6467tevm())
 791                 davinci_nand_data.timing = &dm6467tevm_nandflash_timing;
 792
 793         platform_device_register(&davinci_nand_device);
 794
 795         if (davinci_aemif_setup(&davinci_nand_device))
 796                 pr_warn("%s: Cannot configure AEMIF.\n", __func__);
 797
 798         dm646x_init_edma(dm646x_edma_rsv);
 799
 800         if (HAS_ATA)
 801                 davinci_init_ide();
 802
 803         soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID;
 804 }
 805
 806 MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
 807         .atag_offset  = 0x100,
 808         .map_io       = davinci_map_io,
 809         .init_irq     = davinci_irq_init,
 810         .init_time      = dm646x_evm_init_time,
 811         .init_machine = evm_init,
 812         .init_late      = davinci_init_late,
 813         .dma_zone_size  = SZ_128M,
 814 MACHINE_END
 815
 816 MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
 817         .atag_offset  = 0x100,
 818         .map_io       = davinci_map_io,
 819         .init_irq     = davinci_irq_init,
 820         .init_time      = dm6467t_evm_init_time,
 821         .init_machine = evm_init,
 822         .init_late      = davinci_init_late,
 823         .dma_zone_size  = SZ_128M,
 824 MACHINE_END
 825