2 * (C) Copyright 2012,2015 Stephen Warren
4 * SPDX-License-Identifier: GPL-2.0+
7 #ifndef _BCM2835_MBOX_H
8 #define _BCM2835_MBOX_H
10 #include <linux/compiler.h>
13 * The BCM2835 SoC contains (at least) two CPUs; the VideoCore (a/k/a "GPU")
14 * and the ARM CPU. The ARM CPU is often thought of as the main CPU.
15 * However, the VideoCore actually controls the initial SoC boot, and hides
16 * much of the hardware behind a protocol. This protocol is transported
17 * using the SoC's mailbox hardware module.
19 * The mailbox hardware supports passing 32-bit values back and forth.
20 * Presumably by software convention of the firmware, the bottom 4 bits of the
21 * value are used to indicate a logical channel, and the upper 28 bits are the
22 * actual payload. Various channels exist using these simple raw messages. See
23 * https://github.com/raspberrypi/firmware/wiki/Mailboxes for a list. As an
24 * example, the messages on the power management channel are a bitmask of
25 * devices whose power should be enabled.
27 * The property mailbox channel passes messages that contain the (16-byte
28 * aligned) ARM physical address of a memory buffer. This buffer is passed to
29 * the VC for processing, is modified in-place by the VC, and the address then
30 * passed back to the ARM CPU as the response mailbox message to indicate
31 * request completion. The buffers have a generic and extensible format; each
32 * buffer contains a standard header, a list of "tags", and a terminating zero
33 * entry. Each tag contains an ID indicating its type, and length fields for
34 * generic parsing. With some limitations, an arbitrary set of tags may be
35 * combined together into a single message buffer. This file defines structs
36 * representing the header and many individual tag layouts and IDs.
42 #define BCM2835_MBOX_PHYSADDR 0x3f00b880
44 #define BCM2835_MBOX_PHYSADDR 0x2000b880
47 struct bcm2835_mbox_regs {
55 #define BCM2835_MBOX_STATUS_WR_FULL 0x80000000
56 #define BCM2835_MBOX_STATUS_RD_EMPTY 0x40000000
58 /* Lower 4-bits are channel ID */
59 #define BCM2835_CHAN_MASK 0xf
60 #define BCM2835_MBOX_PACK(chan, data) (((data) & (~BCM2835_CHAN_MASK)) | \
61 (chan & BCM2835_CHAN_MASK))
62 #define BCM2835_MBOX_UNPACK_CHAN(val) ((val) & BCM2835_CHAN_MASK)
63 #define BCM2835_MBOX_UNPACK_DATA(val) ((val) & (~BCM2835_CHAN_MASK))
65 /* Property mailbox buffer structures */
67 #define BCM2835_MBOX_PROP_CHAN 8
69 /* All message buffers must start with this header */
70 struct bcm2835_mbox_hdr {
75 #define BCM2835_MBOX_REQ_CODE 0
76 #define BCM2835_MBOX_RESP_CODE_SUCCESS 0x80000000
78 #define BCM2835_MBOX_INIT_HDR(_m_) { \
79 memset((_m_), 0, sizeof(*(_m_))); \
80 (_m_)->hdr.buf_size = sizeof(*(_m_)); \
81 (_m_)->hdr.code = 0; \
86 * A message buffer contains a list of tags. Each tag must also start with
87 * a standardized header.
89 struct bcm2835_mbox_tag_hdr {
95 #define BCM2835_MBOX_INIT_TAG(_t_, _id_) { \
96 (_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \
97 (_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \
98 (_t_)->tag_hdr.val_len = sizeof((_t_)->body.req); \
101 #define BCM2835_MBOX_INIT_TAG_NO_REQ(_t_, _id_) { \
102 (_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \
103 (_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \
104 (_t_)->tag_hdr.val_len = 0; \
107 /* When responding, the VC sets this bit in val_len to indicate a response */
108 #define BCM2835_MBOX_TAG_VAL_LEN_RESPONSE 0x80000000
111 * Below we define the ID and struct for many possible tags. This header only
112 * defines individual tag structs, not entire message structs, since in
113 * general an arbitrary set of tags may be combined into a single message.
114 * Clients of the mbox API are expected to define their own overall message
115 * structures by combining the header, a set of tags, and a terminating
116 * entry. For example,
119 * struct bcm2835_mbox_hdr hdr;
120 * struct bcm2835_mbox_tag_get_arm_mem get_arm_mem;
121 * ... perhaps other tags here ...
126 #define BCM2835_MBOX_TAG_GET_BOARD_REV 0x00010002
128 #ifdef CONFIG_BCM2836
129 #define BCM2836_BOARD_REV_2_B 0x4
133 * http://raspberryalphaomega.org.uk/2013/02/06/automatic-raspberry-pi-board-revision-detection-model-a-b1-and-b2/
134 * http://www.raspberrypi.org/forums/viewtopic.php?f=63&t=32733
135 * http://git.drogon.net/?p=wiringPi;a=blob_plain;f=wiringPi/wiringPi.c;hb=5edd177112c99416f68ba3e8c6c4db6ed942e796
137 #define BCM2835_BOARD_REV_B_I2C0_2 0x2
138 #define BCM2835_BOARD_REV_B_I2C0_3 0x3
139 #define BCM2835_BOARD_REV_B_I2C1_4 0x4
140 #define BCM2835_BOARD_REV_B_I2C1_5 0x5
141 #define BCM2835_BOARD_REV_B_I2C1_6 0x6
142 #define BCM2835_BOARD_REV_A_7 0x7
143 #define BCM2835_BOARD_REV_A_8 0x8
144 #define BCM2835_BOARD_REV_A_9 0x9
145 #define BCM2835_BOARD_REV_B_REV2_d 0xd
146 #define BCM2835_BOARD_REV_B_REV2_e 0xe
147 #define BCM2835_BOARD_REV_B_REV2_f 0xf
148 #define BCM2835_BOARD_REV_B_PLUS 0x10
149 #define BCM2835_BOARD_REV_CM 0x11
150 #define BCM2835_BOARD_REV_A_PLUS 0x12
151 #define BCM2835_BOARD_REV_B_PLUS_13 0x13
152 #define BCM2835_BOARD_REV_CM_14 0x14
153 #define BCM2835_BOARD_REV_A_PLUS_15 0x15
156 struct bcm2835_mbox_tag_get_board_rev {
157 struct bcm2835_mbox_tag_hdr tag_hdr;
167 #define BCM2835_MBOX_TAG_GET_MAC_ADDRESS 0x00010003
169 struct bcm2835_mbox_tag_get_mac_address {
170 struct bcm2835_mbox_tag_hdr tag_hdr;
181 #define BCM2835_MBOX_TAG_GET_ARM_MEMORY 0x00010005
183 struct bcm2835_mbox_tag_get_arm_mem {
184 struct bcm2835_mbox_tag_hdr tag_hdr;
195 #define BCM2835_MBOX_POWER_DEVID_SDHCI 0
196 #define BCM2835_MBOX_POWER_DEVID_UART0 1
197 #define BCM2835_MBOX_POWER_DEVID_UART1 2
198 #define BCM2835_MBOX_POWER_DEVID_USB_HCD 3
199 #define BCM2835_MBOX_POWER_DEVID_I2C0 4
200 #define BCM2835_MBOX_POWER_DEVID_I2C1 5
201 #define BCM2835_MBOX_POWER_DEVID_I2C2 6
202 #define BCM2835_MBOX_POWER_DEVID_SPI 7
203 #define BCM2835_MBOX_POWER_DEVID_CCP2TX 8
205 #define BCM2835_MBOX_POWER_STATE_RESP_ON (1 << 0)
206 /* Device doesn't exist */
207 #define BCM2835_MBOX_POWER_STATE_RESP_NODEV (1 << 1)
209 #define BCM2835_MBOX_TAG_GET_POWER_STATE 0x00020001
211 struct bcm2835_mbox_tag_get_power_state {
212 struct bcm2835_mbox_tag_hdr tag_hdr;
224 #define BCM2835_MBOX_TAG_SET_POWER_STATE 0x00028001
226 #define BCM2835_MBOX_SET_POWER_STATE_REQ_ON (1 << 0)
227 #define BCM2835_MBOX_SET_POWER_STATE_REQ_WAIT (1 << 1)
229 struct bcm2835_mbox_tag_set_power_state {
230 struct bcm2835_mbox_tag_hdr tag_hdr;
243 #define BCM2835_MBOX_TAG_GET_CLOCK_RATE 0x00030002
245 #define BCM2835_MBOX_CLOCK_ID_EMMC 1
246 #define BCM2835_MBOX_CLOCK_ID_UART 2
247 #define BCM2835_MBOX_CLOCK_ID_ARM 3
248 #define BCM2835_MBOX_CLOCK_ID_CORE 4
249 #define BCM2835_MBOX_CLOCK_ID_V3D 5
250 #define BCM2835_MBOX_CLOCK_ID_H264 6
251 #define BCM2835_MBOX_CLOCK_ID_ISP 7
252 #define BCM2835_MBOX_CLOCK_ID_SDRAM 8
253 #define BCM2835_MBOX_CLOCK_ID_PIXEL 9
254 #define BCM2835_MBOX_CLOCK_ID_PWM 10
256 struct bcm2835_mbox_tag_get_clock_rate {
257 struct bcm2835_mbox_tag_hdr tag_hdr;
269 #define BCM2835_MBOX_TAG_ALLOCATE_BUFFER 0x00040001
271 struct bcm2835_mbox_tag_allocate_buffer {
272 struct bcm2835_mbox_tag_hdr tag_hdr;
284 #define BCM2835_MBOX_TAG_RELEASE_BUFFER 0x00048001
286 struct bcm2835_mbox_tag_release_buffer {
287 struct bcm2835_mbox_tag_hdr tag_hdr;
296 #define BCM2835_MBOX_TAG_BLANK_SCREEN 0x00040002
298 struct bcm2835_mbox_tag_blank_screen {
299 struct bcm2835_mbox_tag_hdr tag_hdr;
302 /* bit 0 means on, other bots reserved */
311 /* Physical means output signal */
312 #define BCM2835_MBOX_TAG_GET_PHYSICAL_W_H 0x00040003
313 #define BCM2835_MBOX_TAG_TEST_PHYSICAL_W_H 0x00044003
314 #define BCM2835_MBOX_TAG_SET_PHYSICAL_W_H 0x00048003
316 struct bcm2835_mbox_tag_physical_w_h {
317 struct bcm2835_mbox_tag_hdr tag_hdr;
319 /* req not used for get */
331 /* Virtual means display buffer */
332 #define BCM2835_MBOX_TAG_GET_VIRTUAL_W_H 0x00040004
333 #define BCM2835_MBOX_TAG_TEST_VIRTUAL_W_H 0x00044004
334 #define BCM2835_MBOX_TAG_SET_VIRTUAL_W_H 0x00048004
336 struct bcm2835_mbox_tag_virtual_w_h {
337 struct bcm2835_mbox_tag_hdr tag_hdr;
339 /* req not used for get */
351 #define BCM2835_MBOX_TAG_GET_DEPTH 0x00040005
352 #define BCM2835_MBOX_TAG_TEST_DEPTH 0x00044005
353 #define BCM2835_MBOX_TAG_SET_DEPTH 0x00048005
355 struct bcm2835_mbox_tag_depth {
356 struct bcm2835_mbox_tag_hdr tag_hdr;
358 /* req not used for get */
368 #define BCM2835_MBOX_TAG_GET_PIXEL_ORDER 0x00040006
369 #define BCM2835_MBOX_TAG_TEST_PIXEL_ORDER 0x00044005
370 #define BCM2835_MBOX_TAG_SET_PIXEL_ORDER 0x00048006
372 #define BCM2835_MBOX_PIXEL_ORDER_BGR 0
373 #define BCM2835_MBOX_PIXEL_ORDER_RGB 1
375 struct bcm2835_mbox_tag_pixel_order {
376 struct bcm2835_mbox_tag_hdr tag_hdr;
378 /* req not used for get */
388 #define BCM2835_MBOX_TAG_GET_ALPHA_MODE 0x00040007
389 #define BCM2835_MBOX_TAG_TEST_ALPHA_MODE 0x00044007
390 #define BCM2835_MBOX_TAG_SET_ALPHA_MODE 0x00048007
392 #define BCM2835_MBOX_ALPHA_MODE_0_OPAQUE 0
393 #define BCM2835_MBOX_ALPHA_MODE_0_TRANSPARENT 1
394 #define BCM2835_MBOX_ALPHA_MODE_IGNORED 2
396 struct bcm2835_mbox_tag_alpha_mode {
397 struct bcm2835_mbox_tag_hdr tag_hdr;
399 /* req not used for get */
409 #define BCM2835_MBOX_TAG_GET_PITCH 0x00040008
411 struct bcm2835_mbox_tag_pitch {
412 struct bcm2835_mbox_tag_hdr tag_hdr;
422 /* Offset of display window within buffer */
423 #define BCM2835_MBOX_TAG_GET_VIRTUAL_OFFSET 0x00040009
424 #define BCM2835_MBOX_TAG_TEST_VIRTUAL_OFFSET 0x00044009
425 #define BCM2835_MBOX_TAG_SET_VIRTUAL_OFFSET 0x00048009
427 struct bcm2835_mbox_tag_virtual_offset {
428 struct bcm2835_mbox_tag_hdr tag_hdr;
430 /* req not used for get */
442 #define BCM2835_MBOX_TAG_GET_OVERSCAN 0x0004000a
443 #define BCM2835_MBOX_TAG_TEST_OVERSCAN 0x0004400a
444 #define BCM2835_MBOX_TAG_SET_OVERSCAN 0x0004800a
446 struct bcm2835_mbox_tag_overscan {
447 struct bcm2835_mbox_tag_hdr tag_hdr;
449 /* req not used for get */
465 #define BCM2835_MBOX_TAG_GET_PALETTE 0x0004000b
467 struct bcm2835_mbox_tag_get_palette {
468 struct bcm2835_mbox_tag_hdr tag_hdr;
478 #define BCM2835_MBOX_TAG_TEST_PALETTE 0x0004400b
480 struct bcm2835_mbox_tag_test_palette {
481 struct bcm2835_mbox_tag_hdr tag_hdr;
494 #define BCM2835_MBOX_TAG_SET_PALETTE 0x0004800b
496 struct bcm2835_mbox_tag_set_palette {
497 struct bcm2835_mbox_tag_hdr tag_hdr;
511 * Pass a raw u32 message to the VC, and receive a raw u32 back.
513 * Returns 0 for success, any other value for error.
515 int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv);
518 * Pass a complete property-style buffer to the VC, and wait until it has
521 * This function expects a pointer to the mbox_hdr structure in an attempt
522 * to ensure some degree of type safety. However, some number of tags and
523 * a termination value are expected to immediately follow the header in
524 * memory, as required by the property protocol.
526 * Each struct bcm2835_mbox_hdr passed must be allocated with
527 * ALLOC_CACHE_ALIGN_BUFFER(x, y, z) to ensure proper cache flush/invalidate.
529 * Returns 0 for success, any other value for error.
531 int bcm2835_mbox_call_prop(u32 chan, struct bcm2835_mbox_hdr *buffer);