2 * arch/arm/mach-at91/at91sam9260_devices.c
4 * Copyright (C) 2006 Atmel
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include <asm/mach/arch.h>
13 #include <asm/mach/map.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/gpio.h>
17 #include <linux/platform_device.h>
18 #include <linux/i2c-gpio.h>
20 #include <mach/board.h>
22 #include <mach/at91sam9260.h>
23 #include <mach/at91sam9260_matrix.h>
24 #include <mach/at91sam9_smc.h>
29 /* --------------------------------------------------------------------
31 * -------------------------------------------------------------------- */
33 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
34 static u64 ohci_dmamask = DMA_BIT_MASK(32);
35 static struct at91_usbh_data usbh_data;
37 static struct resource usbh_resources[] = {
39 .start = AT91SAM9260_UHP_BASE,
40 .end = AT91SAM9260_UHP_BASE + SZ_1M - 1,
41 .flags = IORESOURCE_MEM,
44 .start = AT91SAM9260_ID_UHP,
45 .end = AT91SAM9260_ID_UHP,
46 .flags = IORESOURCE_IRQ,
50 static struct platform_device at91_usbh_device = {
54 .dma_mask = &ohci_dmamask,
55 .coherent_dma_mask = DMA_BIT_MASK(32),
56 .platform_data = &usbh_data,
58 .resource = usbh_resources,
59 .num_resources = ARRAY_SIZE(usbh_resources),
62 void __init at91_add_device_usbh(struct at91_usbh_data *data)
69 /* Enable overcurrent notification */
70 for (i = 0; i < data->ports; i++) {
71 if (data->overcurrent_pin[i])
72 at91_set_gpio_input(data->overcurrent_pin[i], 1);
76 platform_device_register(&at91_usbh_device);
79 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
83 /* --------------------------------------------------------------------
85 * -------------------------------------------------------------------- */
87 #ifdef CONFIG_USB_GADGET_AT91
88 static struct at91_udc_data udc_data;
90 static struct resource udc_resources[] = {
92 .start = AT91SAM9260_BASE_UDP,
93 .end = AT91SAM9260_BASE_UDP + SZ_16K - 1,
94 .flags = IORESOURCE_MEM,
97 .start = AT91SAM9260_ID_UDP,
98 .end = AT91SAM9260_ID_UDP,
99 .flags = IORESOURCE_IRQ,
103 static struct platform_device at91_udc_device = {
107 .platform_data = &udc_data,
109 .resource = udc_resources,
110 .num_resources = ARRAY_SIZE(udc_resources),
113 void __init at91_add_device_udc(struct at91_udc_data *data)
118 if (data->vbus_pin) {
119 at91_set_gpio_input(data->vbus_pin, 0);
120 at91_set_deglitch(data->vbus_pin, 1);
123 /* Pullup pin is handled internally by USB device peripheral */
126 platform_device_register(&at91_udc_device);
129 void __init at91_add_device_udc(struct at91_udc_data *data) {}
133 /* --------------------------------------------------------------------
135 * -------------------------------------------------------------------- */
137 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
138 static u64 eth_dmamask = DMA_BIT_MASK(32);
139 static struct at91_eth_data eth_data;
141 static struct resource eth_resources[] = {
143 .start = AT91SAM9260_BASE_EMAC,
144 .end = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
145 .flags = IORESOURCE_MEM,
148 .start = AT91SAM9260_ID_EMAC,
149 .end = AT91SAM9260_ID_EMAC,
150 .flags = IORESOURCE_IRQ,
154 static struct platform_device at91sam9260_eth_device = {
158 .dma_mask = ð_dmamask,
159 .coherent_dma_mask = DMA_BIT_MASK(32),
160 .platform_data = ð_data,
162 .resource = eth_resources,
163 .num_resources = ARRAY_SIZE(eth_resources),
166 void __init at91_add_device_eth(struct at91_eth_data *data)
171 if (data->phy_irq_pin) {
172 at91_set_gpio_input(data->phy_irq_pin, 0);
173 at91_set_deglitch(data->phy_irq_pin, 1);
176 /* Pins used for MII and RMII */
177 at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */
178 at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */
179 at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */
180 at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */
181 at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */
182 at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */
183 at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */
184 at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */
185 at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */
186 at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */
188 if (!data->is_rmii) {
189 at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */
190 at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */
191 at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */
192 at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */
193 at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */
194 at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */
195 at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */
196 at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */
200 platform_device_register(&at91sam9260_eth_device);
203 void __init at91_add_device_eth(struct at91_eth_data *data) {}
207 /* --------------------------------------------------------------------
209 * -------------------------------------------------------------------- */
211 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
212 static u64 mmc_dmamask = DMA_BIT_MASK(32);
213 static struct at91_mmc_data mmc_data;
215 static struct resource mmc_resources[] = {
217 .start = AT91SAM9260_BASE_MCI,
218 .end = AT91SAM9260_BASE_MCI + SZ_16K - 1,
219 .flags = IORESOURCE_MEM,
222 .start = AT91SAM9260_ID_MCI,
223 .end = AT91SAM9260_ID_MCI,
224 .flags = IORESOURCE_IRQ,
228 static struct platform_device at91sam9260_mmc_device = {
232 .dma_mask = &mmc_dmamask,
233 .coherent_dma_mask = DMA_BIT_MASK(32),
234 .platform_data = &mmc_data,
236 .resource = mmc_resources,
237 .num_resources = ARRAY_SIZE(mmc_resources),
240 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
247 at91_set_gpio_input(data->det_pin, 1);
248 at91_set_deglitch(data->det_pin, 1);
251 at91_set_gpio_input(data->wp_pin, 1);
253 at91_set_gpio_output(data->vcc_pin, 0);
256 at91_set_A_periph(AT91_PIN_PA8, 0);
260 at91_set_B_periph(AT91_PIN_PA1, 1);
262 /* DAT0, maybe DAT1..DAT3 */
263 at91_set_B_periph(AT91_PIN_PA0, 1);
265 at91_set_B_periph(AT91_PIN_PA5, 1);
266 at91_set_B_periph(AT91_PIN_PA4, 1);
267 at91_set_B_periph(AT91_PIN_PA3, 1);
271 at91_set_A_periph(AT91_PIN_PA7, 1);
273 /* DAT0, maybe DAT1..DAT3 */
274 at91_set_A_periph(AT91_PIN_PA6, 1);
276 at91_set_A_periph(AT91_PIN_PA9, 1);
277 at91_set_A_periph(AT91_PIN_PA10, 1);
278 at91_set_A_periph(AT91_PIN_PA11, 1);
283 platform_device_register(&at91sam9260_mmc_device);
286 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
289 /* --------------------------------------------------------------------
290 * MMC / SD Slot for Atmel MCI Driver
291 * -------------------------------------------------------------------- */
293 #if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
294 static u64 mmc_dmamask = DMA_BIT_MASK(32);
295 static struct mci_platform_data mmc_data;
297 static struct resource mmc_resources[] = {
299 .start = AT91SAM9260_BASE_MCI,
300 .end = AT91SAM9260_BASE_MCI + SZ_16K - 1,
301 .flags = IORESOURCE_MEM,
304 .start = AT91SAM9260_ID_MCI,
305 .end = AT91SAM9260_ID_MCI,
306 .flags = IORESOURCE_IRQ,
310 static struct platform_device at91sam9260_mmc_device = {
314 .dma_mask = &mmc_dmamask,
315 .coherent_dma_mask = DMA_BIT_MASK(32),
316 .platform_data = &mmc_data,
318 .resource = mmc_resources,
319 .num_resources = ARRAY_SIZE(mmc_resources),
322 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
325 unsigned int slot_count = 0;
330 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
331 if (data->slot[i].bus_width) {
333 if (data->slot[i].detect_pin) {
334 at91_set_gpio_input(data->slot[i].detect_pin, 1);
335 at91_set_deglitch(data->slot[i].detect_pin, 1);
337 if (data->slot[i].wp_pin)
338 at91_set_gpio_input(data->slot[i].wp_pin, 1);
343 at91_set_A_periph(AT91_PIN_PA7, 1);
344 /* DAT0, maybe DAT1..DAT3 */
345 at91_set_A_periph(AT91_PIN_PA6, 1);
346 if (data->slot[i].bus_width == 4) {
347 at91_set_A_periph(AT91_PIN_PA9, 1);
348 at91_set_A_periph(AT91_PIN_PA10, 1);
349 at91_set_A_periph(AT91_PIN_PA11, 1);
355 at91_set_B_periph(AT91_PIN_PA1, 1);
356 /* DAT0, maybe DAT1..DAT3 */
357 at91_set_B_periph(AT91_PIN_PA0, 1);
358 if (data->slot[i].bus_width == 4) {
359 at91_set_B_periph(AT91_PIN_PA5, 1);
360 at91_set_B_periph(AT91_PIN_PA4, 1);
361 at91_set_B_periph(AT91_PIN_PA3, 1);
367 "AT91: SD/MMC slot %d not available\n", i);
375 at91_set_A_periph(AT91_PIN_PA8, 0);
378 platform_device_register(&at91sam9260_mmc_device);
382 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
386 /* --------------------------------------------------------------------
388 * -------------------------------------------------------------------- */
390 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
391 static struct atmel_nand_data nand_data;
393 #define NAND_BASE AT91_CHIPSELECT_3
395 static struct resource nand_resources[] = {
398 .end = NAND_BASE + SZ_256M - 1,
399 .flags = IORESOURCE_MEM,
402 .start = AT91_BASE_SYS + AT91_ECC,
403 .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
404 .flags = IORESOURCE_MEM,
408 static struct platform_device at91sam9260_nand_device = {
409 .name = "atmel_nand",
412 .platform_data = &nand_data,
414 .resource = nand_resources,
415 .num_resources = ARRAY_SIZE(nand_resources),
418 void __init at91_add_device_nand(struct atmel_nand_data *data)
425 csa = at91_sys_read(AT91_MATRIX_EBICSA);
426 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
429 if (data->enable_pin)
430 at91_set_gpio_output(data->enable_pin, 1);
434 at91_set_gpio_input(data->rdy_pin, 1);
436 /* card detect pin */
438 at91_set_gpio_input(data->det_pin, 1);
441 platform_device_register(&at91sam9260_nand_device);
444 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
448 /* --------------------------------------------------------------------
450 * -------------------------------------------------------------------- */
453 * Prefer the GPIO code since the TWI controller isn't robust
454 * (gets overruns and underruns under load) and can only issue
455 * repeated STARTs in one scenario (the driver doesn't yet handle them).
458 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
460 static struct i2c_gpio_platform_data pdata = {
461 .sda_pin = AT91_PIN_PA23,
462 .sda_is_open_drain = 1,
463 .scl_pin = AT91_PIN_PA24,
464 .scl_is_open_drain = 1,
465 .udelay = 2, /* ~100 kHz */
468 static struct platform_device at91sam9260_twi_device = {
471 .dev.platform_data = &pdata,
474 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
476 at91_set_GPIO_periph(AT91_PIN_PA23, 1); /* TWD (SDA) */
477 at91_set_multi_drive(AT91_PIN_PA23, 1);
479 at91_set_GPIO_periph(AT91_PIN_PA24, 1); /* TWCK (SCL) */
480 at91_set_multi_drive(AT91_PIN_PA24, 1);
482 i2c_register_board_info(0, devices, nr_devices);
483 platform_device_register(&at91sam9260_twi_device);
486 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
488 static struct resource twi_resources[] = {
490 .start = AT91SAM9260_BASE_TWI,
491 .end = AT91SAM9260_BASE_TWI + SZ_16K - 1,
492 .flags = IORESOURCE_MEM,
495 .start = AT91SAM9260_ID_TWI,
496 .end = AT91SAM9260_ID_TWI,
497 .flags = IORESOURCE_IRQ,
501 static struct platform_device at91sam9260_twi_device = {
504 .resource = twi_resources,
505 .num_resources = ARRAY_SIZE(twi_resources),
508 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
510 /* pins used for TWI interface */
511 at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */
512 at91_set_multi_drive(AT91_PIN_PA23, 1);
514 at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */
515 at91_set_multi_drive(AT91_PIN_PA24, 1);
517 i2c_register_board_info(0, devices, nr_devices);
518 platform_device_register(&at91sam9260_twi_device);
521 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
525 /* --------------------------------------------------------------------
527 * -------------------------------------------------------------------- */
529 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
530 static u64 spi_dmamask = DMA_BIT_MASK(32);
532 static struct resource spi0_resources[] = {
534 .start = AT91SAM9260_BASE_SPI0,
535 .end = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
536 .flags = IORESOURCE_MEM,
539 .start = AT91SAM9260_ID_SPI0,
540 .end = AT91SAM9260_ID_SPI0,
541 .flags = IORESOURCE_IRQ,
545 static struct platform_device at91sam9260_spi0_device = {
549 .dma_mask = &spi_dmamask,
550 .coherent_dma_mask = DMA_BIT_MASK(32),
552 .resource = spi0_resources,
553 .num_resources = ARRAY_SIZE(spi0_resources),
556 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
558 static struct resource spi1_resources[] = {
560 .start = AT91SAM9260_BASE_SPI1,
561 .end = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
562 .flags = IORESOURCE_MEM,
565 .start = AT91SAM9260_ID_SPI1,
566 .end = AT91SAM9260_ID_SPI1,
567 .flags = IORESOURCE_IRQ,
571 static struct platform_device at91sam9260_spi1_device = {
575 .dma_mask = &spi_dmamask,
576 .coherent_dma_mask = DMA_BIT_MASK(32),
578 .resource = spi1_resources,
579 .num_resources = ARRAY_SIZE(spi1_resources),
582 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
584 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
587 unsigned long cs_pin;
588 short enable_spi0 = 0;
589 short enable_spi1 = 0;
591 /* Choose SPI chip-selects */
592 for (i = 0; i < nr_devices; i++) {
593 if (devices[i].controller_data)
594 cs_pin = (unsigned long) devices[i].controller_data;
595 else if (devices[i].bus_num == 0)
596 cs_pin = spi0_standard_cs[devices[i].chip_select];
598 cs_pin = spi1_standard_cs[devices[i].chip_select];
600 if (devices[i].bus_num == 0)
605 /* enable chip-select pin */
606 at91_set_gpio_output(cs_pin, 1);
608 /* pass chip-select pin to driver */
609 devices[i].controller_data = (void *) cs_pin;
612 spi_register_board_info(devices, nr_devices);
614 /* Configure SPI bus(es) */
616 at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
617 at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
618 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI1_SPCK */
620 platform_device_register(&at91sam9260_spi0_device);
623 at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI1_MISO */
624 at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */
625 at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */
627 platform_device_register(&at91sam9260_spi1_device);
631 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
635 /* --------------------------------------------------------------------
636 * Timer/Counter blocks
637 * -------------------------------------------------------------------- */
639 #ifdef CONFIG_ATMEL_TCLIB
641 static struct resource tcb0_resources[] = {
643 .start = AT91SAM9260_BASE_TCB0,
644 .end = AT91SAM9260_BASE_TCB0 + SZ_16K - 1,
645 .flags = IORESOURCE_MEM,
648 .start = AT91SAM9260_ID_TC0,
649 .end = AT91SAM9260_ID_TC0,
650 .flags = IORESOURCE_IRQ,
653 .start = AT91SAM9260_ID_TC1,
654 .end = AT91SAM9260_ID_TC1,
655 .flags = IORESOURCE_IRQ,
658 .start = AT91SAM9260_ID_TC2,
659 .end = AT91SAM9260_ID_TC2,
660 .flags = IORESOURCE_IRQ,
664 static struct platform_device at91sam9260_tcb0_device = {
667 .resource = tcb0_resources,
668 .num_resources = ARRAY_SIZE(tcb0_resources),
671 static struct resource tcb1_resources[] = {
673 .start = AT91SAM9260_BASE_TCB1,
674 .end = AT91SAM9260_BASE_TCB1 + SZ_16K - 1,
675 .flags = IORESOURCE_MEM,
678 .start = AT91SAM9260_ID_TC3,
679 .end = AT91SAM9260_ID_TC3,
680 .flags = IORESOURCE_IRQ,
683 .start = AT91SAM9260_ID_TC4,
684 .end = AT91SAM9260_ID_TC4,
685 .flags = IORESOURCE_IRQ,
688 .start = AT91SAM9260_ID_TC5,
689 .end = AT91SAM9260_ID_TC5,
690 .flags = IORESOURCE_IRQ,
694 static struct platform_device at91sam9260_tcb1_device = {
697 .resource = tcb1_resources,
698 .num_resources = ARRAY_SIZE(tcb1_resources),
701 static void __init at91_add_device_tc(void)
703 platform_device_register(&at91sam9260_tcb0_device);
704 platform_device_register(&at91sam9260_tcb1_device);
707 static void __init at91_add_device_tc(void) { }
711 /* --------------------------------------------------------------------
713 * -------------------------------------------------------------------- */
715 static struct resource rtt_resources[] = {
717 .start = AT91_BASE_SYS + AT91_RTT,
718 .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
719 .flags = IORESOURCE_MEM,
723 static struct platform_device at91sam9260_rtt_device = {
726 .resource = rtt_resources,
727 .num_resources = ARRAY_SIZE(rtt_resources),
730 static void __init at91_add_device_rtt(void)
732 platform_device_register(&at91sam9260_rtt_device);
736 /* --------------------------------------------------------------------
738 * -------------------------------------------------------------------- */
740 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
741 static struct platform_device at91sam9260_wdt_device = {
747 static void __init at91_add_device_watchdog(void)
749 platform_device_register(&at91sam9260_wdt_device);
752 static void __init at91_add_device_watchdog(void) {}
756 /* --------------------------------------------------------------------
757 * SSC -- Synchronous Serial Controller
758 * -------------------------------------------------------------------- */
760 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
761 static u64 ssc_dmamask = DMA_BIT_MASK(32);
763 static struct resource ssc_resources[] = {
765 .start = AT91SAM9260_BASE_SSC,
766 .end = AT91SAM9260_BASE_SSC + SZ_16K - 1,
767 .flags = IORESOURCE_MEM,
770 .start = AT91SAM9260_ID_SSC,
771 .end = AT91SAM9260_ID_SSC,
772 .flags = IORESOURCE_IRQ,
776 static struct platform_device at91sam9260_ssc_device = {
780 .dma_mask = &ssc_dmamask,
781 .coherent_dma_mask = DMA_BIT_MASK(32),
783 .resource = ssc_resources,
784 .num_resources = ARRAY_SIZE(ssc_resources),
787 static inline void configure_ssc_pins(unsigned pins)
789 if (pins & ATMEL_SSC_TF)
790 at91_set_A_periph(AT91_PIN_PB17, 1);
791 if (pins & ATMEL_SSC_TK)
792 at91_set_A_periph(AT91_PIN_PB16, 1);
793 if (pins & ATMEL_SSC_TD)
794 at91_set_A_periph(AT91_PIN_PB18, 1);
795 if (pins & ATMEL_SSC_RD)
796 at91_set_A_periph(AT91_PIN_PB19, 1);
797 if (pins & ATMEL_SSC_RK)
798 at91_set_A_periph(AT91_PIN_PB20, 1);
799 if (pins & ATMEL_SSC_RF)
800 at91_set_A_periph(AT91_PIN_PB21, 1);
804 * SSC controllers are accessed through library code, instead of any
805 * kind of all-singing/all-dancing driver. For example one could be
806 * used by a particular I2S audio codec's driver, while another one
807 * on the same system might be used by a custom data capture driver.
809 void __init at91_add_device_ssc(unsigned id, unsigned pins)
811 struct platform_device *pdev;
814 * NOTE: caller is responsible for passing information matching
815 * "pins" to whatever will be using each particular controller.
818 case AT91SAM9260_ID_SSC:
819 pdev = &at91sam9260_ssc_device;
820 configure_ssc_pins(pins);
826 platform_device_register(pdev);
830 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
834 /* --------------------------------------------------------------------
836 * -------------------------------------------------------------------- */
837 #if defined(CONFIG_SERIAL_ATMEL)
838 static struct resource dbgu_resources[] = {
840 .start = AT91_BASE_SYS + AT91_DBGU,
841 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
842 .flags = IORESOURCE_MEM,
845 .start = AT91_ID_SYS,
847 .flags = IORESOURCE_IRQ,
851 static struct atmel_uart_data dbgu_data = {
853 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
856 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
858 static struct platform_device at91sam9260_dbgu_device = {
859 .name = "atmel_usart",
862 .dma_mask = &dbgu_dmamask,
863 .coherent_dma_mask = DMA_BIT_MASK(32),
864 .platform_data = &dbgu_data,
866 .resource = dbgu_resources,
867 .num_resources = ARRAY_SIZE(dbgu_resources),
870 static inline void configure_dbgu_pins(void)
872 at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */
873 at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */
876 static struct resource uart0_resources[] = {
878 .start = AT91SAM9260_BASE_US0,
879 .end = AT91SAM9260_BASE_US0 + SZ_16K - 1,
880 .flags = IORESOURCE_MEM,
883 .start = AT91SAM9260_ID_US0,
884 .end = AT91SAM9260_ID_US0,
885 .flags = IORESOURCE_IRQ,
889 static struct atmel_uart_data uart0_data = {
894 static u64 uart0_dmamask = DMA_BIT_MASK(32);
896 static struct platform_device at91sam9260_uart0_device = {
897 .name = "atmel_usart",
900 .dma_mask = &uart0_dmamask,
901 .coherent_dma_mask = DMA_BIT_MASK(32),
902 .platform_data = &uart0_data,
904 .resource = uart0_resources,
905 .num_resources = ARRAY_SIZE(uart0_resources),
908 static inline void configure_usart0_pins(unsigned pins)
910 at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */
911 at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */
913 if (pins & ATMEL_UART_RTS)
914 at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS0 */
915 if (pins & ATMEL_UART_CTS)
916 at91_set_A_periph(AT91_PIN_PB27, 0); /* CTS0 */
917 if (pins & ATMEL_UART_DTR)
918 at91_set_A_periph(AT91_PIN_PB24, 0); /* DTR0 */
919 if (pins & ATMEL_UART_DSR)
920 at91_set_A_periph(AT91_PIN_PB22, 0); /* DSR0 */
921 if (pins & ATMEL_UART_DCD)
922 at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD0 */
923 if (pins & ATMEL_UART_RI)
924 at91_set_A_periph(AT91_PIN_PB25, 0); /* RI0 */
927 static struct resource uart1_resources[] = {
929 .start = AT91SAM9260_BASE_US1,
930 .end = AT91SAM9260_BASE_US1 + SZ_16K - 1,
931 .flags = IORESOURCE_MEM,
934 .start = AT91SAM9260_ID_US1,
935 .end = AT91SAM9260_ID_US1,
936 .flags = IORESOURCE_IRQ,
940 static struct atmel_uart_data uart1_data = {
945 static u64 uart1_dmamask = DMA_BIT_MASK(32);
947 static struct platform_device at91sam9260_uart1_device = {
948 .name = "atmel_usart",
951 .dma_mask = &uart1_dmamask,
952 .coherent_dma_mask = DMA_BIT_MASK(32),
953 .platform_data = &uart1_data,
955 .resource = uart1_resources,
956 .num_resources = ARRAY_SIZE(uart1_resources),
959 static inline void configure_usart1_pins(unsigned pins)
961 at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */
962 at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */
964 if (pins & ATMEL_UART_RTS)
965 at91_set_A_periph(AT91_PIN_PB28, 0); /* RTS1 */
966 if (pins & ATMEL_UART_CTS)
967 at91_set_A_periph(AT91_PIN_PB29, 0); /* CTS1 */
970 static struct resource uart2_resources[] = {
972 .start = AT91SAM9260_BASE_US2,
973 .end = AT91SAM9260_BASE_US2 + SZ_16K - 1,
974 .flags = IORESOURCE_MEM,
977 .start = AT91SAM9260_ID_US2,
978 .end = AT91SAM9260_ID_US2,
979 .flags = IORESOURCE_IRQ,
983 static struct atmel_uart_data uart2_data = {
988 static u64 uart2_dmamask = DMA_BIT_MASK(32);
990 static struct platform_device at91sam9260_uart2_device = {
991 .name = "atmel_usart",
994 .dma_mask = &uart2_dmamask,
995 .coherent_dma_mask = DMA_BIT_MASK(32),
996 .platform_data = &uart2_data,
998 .resource = uart2_resources,
999 .num_resources = ARRAY_SIZE(uart2_resources),
1002 static inline void configure_usart2_pins(unsigned pins)
1004 at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */
1005 at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */
1007 if (pins & ATMEL_UART_RTS)
1008 at91_set_A_periph(AT91_PIN_PA4, 0); /* RTS2 */
1009 if (pins & ATMEL_UART_CTS)
1010 at91_set_A_periph(AT91_PIN_PA5, 0); /* CTS2 */
1013 static struct resource uart3_resources[] = {
1015 .start = AT91SAM9260_BASE_US3,
1016 .end = AT91SAM9260_BASE_US3 + SZ_16K - 1,
1017 .flags = IORESOURCE_MEM,
1020 .start = AT91SAM9260_ID_US3,
1021 .end = AT91SAM9260_ID_US3,
1022 .flags = IORESOURCE_IRQ,
1026 static struct atmel_uart_data uart3_data = {
1031 static u64 uart3_dmamask = DMA_BIT_MASK(32);
1033 static struct platform_device at91sam9260_uart3_device = {
1034 .name = "atmel_usart",
1037 .dma_mask = &uart3_dmamask,
1038 .coherent_dma_mask = DMA_BIT_MASK(32),
1039 .platform_data = &uart3_data,
1041 .resource = uart3_resources,
1042 .num_resources = ARRAY_SIZE(uart3_resources),
1045 static inline void configure_usart3_pins(unsigned pins)
1047 at91_set_A_periph(AT91_PIN_PB10, 1); /* TXD3 */
1048 at91_set_A_periph(AT91_PIN_PB11, 0); /* RXD3 */
1050 if (pins & ATMEL_UART_RTS)
1051 at91_set_B_periph(AT91_PIN_PC8, 0); /* RTS3 */
1052 if (pins & ATMEL_UART_CTS)
1053 at91_set_B_periph(AT91_PIN_PC10, 0); /* CTS3 */
1056 static struct resource uart4_resources[] = {
1058 .start = AT91SAM9260_BASE_US4,
1059 .end = AT91SAM9260_BASE_US4 + SZ_16K - 1,
1060 .flags = IORESOURCE_MEM,
1063 .start = AT91SAM9260_ID_US4,
1064 .end = AT91SAM9260_ID_US4,
1065 .flags = IORESOURCE_IRQ,
1069 static struct atmel_uart_data uart4_data = {
1074 static u64 uart4_dmamask = DMA_BIT_MASK(32);
1076 static struct platform_device at91sam9260_uart4_device = {
1077 .name = "atmel_usart",
1080 .dma_mask = &uart4_dmamask,
1081 .coherent_dma_mask = DMA_BIT_MASK(32),
1082 .platform_data = &uart4_data,
1084 .resource = uart4_resources,
1085 .num_resources = ARRAY_SIZE(uart4_resources),
1088 static inline void configure_usart4_pins(void)
1090 at91_set_B_periph(AT91_PIN_PA31, 1); /* TXD4 */
1091 at91_set_B_periph(AT91_PIN_PA30, 0); /* RXD4 */
1094 static struct resource uart5_resources[] = {
1096 .start = AT91SAM9260_BASE_US5,
1097 .end = AT91SAM9260_BASE_US5 + SZ_16K - 1,
1098 .flags = IORESOURCE_MEM,
1101 .start = AT91SAM9260_ID_US5,
1102 .end = AT91SAM9260_ID_US5,
1103 .flags = IORESOURCE_IRQ,
1107 static struct atmel_uart_data uart5_data = {
1112 static u64 uart5_dmamask = DMA_BIT_MASK(32);
1114 static struct platform_device at91sam9260_uart5_device = {
1115 .name = "atmel_usart",
1118 .dma_mask = &uart5_dmamask,
1119 .coherent_dma_mask = DMA_BIT_MASK(32),
1120 .platform_data = &uart5_data,
1122 .resource = uart5_resources,
1123 .num_resources = ARRAY_SIZE(uart5_resources),
1126 static inline void configure_usart5_pins(void)
1128 at91_set_A_periph(AT91_PIN_PB12, 1); /* TXD5 */
1129 at91_set_A_periph(AT91_PIN_PB13, 0); /* RXD5 */
1132 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1133 struct platform_device *atmel_default_console_device; /* the serial console device */
1135 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1137 struct platform_device *pdev;
1138 struct atmel_uart_data *pdata;
1142 pdev = &at91sam9260_dbgu_device;
1143 configure_dbgu_pins();
1145 case AT91SAM9260_ID_US0:
1146 pdev = &at91sam9260_uart0_device;
1147 configure_usart0_pins(pins);
1149 case AT91SAM9260_ID_US1:
1150 pdev = &at91sam9260_uart1_device;
1151 configure_usart1_pins(pins);
1153 case AT91SAM9260_ID_US2:
1154 pdev = &at91sam9260_uart2_device;
1155 configure_usart2_pins(pins);
1157 case AT91SAM9260_ID_US3:
1158 pdev = &at91sam9260_uart3_device;
1159 configure_usart3_pins(pins);
1161 case AT91SAM9260_ID_US4:
1162 pdev = &at91sam9260_uart4_device;
1163 configure_usart4_pins();
1165 case AT91SAM9260_ID_US5:
1166 pdev = &at91sam9260_uart5_device;
1167 configure_usart5_pins();
1172 pdata = pdev->dev.platform_data;
1173 pdata->num = portnr; /* update to mapped ID */
1175 if (portnr < ATMEL_MAX_UART)
1176 at91_uarts[portnr] = pdev;
1179 void __init at91_set_serial_console(unsigned portnr)
1181 if (portnr < ATMEL_MAX_UART) {
1182 atmel_default_console_device = at91_uarts[portnr];
1183 at91sam9260_set_console_clock(at91_uarts[portnr]->id);
1187 void __init at91_add_device_serial(void)
1191 for (i = 0; i < ATMEL_MAX_UART; i++) {
1193 platform_device_register(at91_uarts[i]);
1196 if (!atmel_default_console_device)
1197 printk(KERN_INFO "AT91: No default serial console defined.\n");
1200 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1201 void __init at91_set_serial_console(unsigned portnr) {}
1202 void __init at91_add_device_serial(void) {}
1205 /* --------------------------------------------------------------------
1207 * -------------------------------------------------------------------- */
1209 #if defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE) || \
1210 defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
1211 defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
1213 static struct at91_cf_data cf0_data;
1215 static struct resource cf0_resources[] = {
1217 .start = AT91_CHIPSELECT_4,
1218 .end = AT91_CHIPSELECT_4 + SZ_256M - 1,
1219 .flags = IORESOURCE_MEM,
1223 static struct platform_device cf0_device = {
1226 .platform_data = &cf0_data,
1228 .resource = cf0_resources,
1229 .num_resources = ARRAY_SIZE(cf0_resources),
1232 static struct at91_cf_data cf1_data;
1234 static struct resource cf1_resources[] = {
1236 .start = AT91_CHIPSELECT_5,
1237 .end = AT91_CHIPSELECT_5 + SZ_256M - 1,
1238 .flags = IORESOURCE_MEM,
1242 static struct platform_device cf1_device = {
1245 .platform_data = &cf1_data,
1247 .resource = cf1_resources,
1248 .num_resources = ARRAY_SIZE(cf1_resources),
1251 void __init at91_add_device_cf(struct at91_cf_data *data)
1253 struct platform_device *pdev;
1259 csa = at91_sys_read(AT91_MATRIX_EBICSA);
1261 switch (data->chipselect) {
1263 at91_set_multi_drive(AT91_PIN_PC8, 0);
1264 at91_set_A_periph(AT91_PIN_PC8, 0);
1265 csa |= AT91_MATRIX_CS4A_SMC_CF1;
1270 at91_set_multi_drive(AT91_PIN_PC9, 0);
1271 at91_set_A_periph(AT91_PIN_PC9, 0);
1272 csa |= AT91_MATRIX_CS5A_SMC_CF2;
1277 printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
1282 at91_sys_write(AT91_MATRIX_EBICSA, csa);
1284 if (data->rst_pin) {
1285 at91_set_multi_drive(data->rst_pin, 0);
1286 at91_set_gpio_output(data->rst_pin, 1);
1289 if (data->irq_pin) {
1290 at91_set_gpio_input(data->irq_pin, 0);
1291 at91_set_deglitch(data->irq_pin, 1);
1294 if (data->det_pin) {
1295 at91_set_gpio_input(data->det_pin, 0);
1296 at91_set_deglitch(data->det_pin, 1);
1299 at91_set_B_periph(AT91_PIN_PC6, 0); /* CFCE1 */
1300 at91_set_B_periph(AT91_PIN_PC7, 0); /* CFCE2 */
1301 at91_set_A_periph(AT91_PIN_PC10, 0); /* CFRNW */
1302 at91_set_A_periph(AT91_PIN_PC15, 1); /* NWAIT */
1304 if (data->flags & AT91_CF_TRUE_IDE)
1305 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE)
1306 pdev->name = "pata_at91";
1307 #elif defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE)
1308 pdev->name = "at91_ide";
1310 #warning "board requires AT91_CF_TRUE_IDE: enable either at91_ide or pata_at91"
1313 pdev->name = "at91_cf";
1315 platform_device_register(pdev);
1319 void __init at91_add_device_cf(struct at91_cf_data * data) {}
1322 /* -------------------------------------------------------------------- */
1324 * These devices are always present and don't need any board-specific
1327 static int __init at91_add_standard_devices(void)
1329 at91_add_device_rtt();
1330 at91_add_device_watchdog();
1331 at91_add_device_tc();
1335 arch_initcall(at91_add_standard_devices);