1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2016 Google, Inc
12 #include <asm/arch/timer.h>
13 #include <asm/arch/wdt.h>
14 #include <linux/err.h>
15 #include <dm/uclass.h>
18 * Second Watchdog Timer by default is configured
19 * to trigger secondary boot source.
21 #define AST_2ND_BOOT_WDT 1
24 * Third Watchdog Timer by default is configured
25 * to toggle Flash address mode switch before reset.
27 #define AST_FLASH_ADDR_DETECT_WDT 2
29 DECLARE_GLOBAL_DATA_PTR;
33 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
44 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
46 debug("DRAM FAIL1\r\n");
50 ret = ram_get_info(dev, &ram);
52 debug("DRAM FAIL2\r\n");
56 gd->ram_size = ram.size;