1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * vectors - Generic ARM exception table code
5 * Copyright (c) 1998 Dan Malek <dmalek@jlc.net>
6 * Copyright (c) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
7 * Copyright (c) 2000 Wolfgang Denk <wd@denx.de>
8 * Copyright (c) 2001 Alex Züpke <azu@sysgo.de>
9 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
10 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
11 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
12 * Copyright (c) 2002 Kyle Harris <kharris@nexus-tech.net>
18 * A macro to allow insertion of an ARM exception vector either
19 * for the non-boot0 case or by a boot0-header.
27 #if !CONFIG_IS_ENABLED(SYS_NO_VECTOR_TABLE)
28 ldr pc, _undefined_instruction
29 ldr pc, _software_interrupt
30 ldr pc, _prefetch_abort
40 *************************************************************************
42 * Symbol _start is referenced elsewhere, so make it global
44 *************************************************************************
50 *************************************************************************
52 * Vectors have their own section so linker script can map them easily
54 *************************************************************************
57 .section ".vectors", "ax"
59 #if defined(CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK)
61 * Various SoCs need something special and SoC-specific up front in
62 * order to boot, allow them to set that in their boot0.h file and then
65 * To allow a boot0 hook to insert a 'special' sequence after the vector
66 * table (e.g. for the socfpga), the presence of a boot0 hook supresses
67 * the below vector table and assumes that the vector table is filled in
68 * by the boot0 hook. The requirements for a boot0 hook thus are:
69 * (1) defines '_start:' as appropriate
70 * (2) inserts the vector table using ARM_VECTORS as appropriate
72 #include <asm/arch/boot0.h>
76 *************************************************************************
78 * Exception vectors as described in ARM reference manuals
80 * Uses indirect branch to allow reaching handlers anywhere in memory.
82 *************************************************************************
86 #ifdef CFG_SYS_DV_NOR_BOOT_CFG
87 .word CFG_SYS_DV_NOR_BOOT_CFG
90 #endif /* !defined(CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK) */
92 #if !CONFIG_IS_ENABLED(SYS_NO_VECTOR_TABLE)
94 *************************************************************************
96 * Indirect vectors table
98 * Symbols referenced here must be defined somewhere else
100 *************************************************************************
104 .globl _undefined_instruction
105 .globl _software_interrupt
106 .globl _prefetch_abort
112 #ifdef CONFIG_ARCH_K3
115 _undefined_instruction: .word undefined_instruction
116 _software_interrupt: .word software_interrupt
117 _prefetch_abort: .word prefetch_abort
118 _data_abort: .word data_abort
119 _not_used: .word not_used
123 .balignl 16,0xdeadbeef
127 *************************************************************************
131 *************************************************************************
134 /* SPL interrupt handling: just hang */
136 #ifdef CONFIG_SPL_BUILD
138 #if !CONFIG_IS_ENABLED(SYS_NO_VECTOR_TABLE)
140 undefined_instruction:
148 b 1b /* hang and never return */
151 #else /* !CONFIG_SPL_BUILD */
153 /* IRQ stack memory (calculated at run-time) + 8 bytes */
154 .globl IRQ_STACK_START_IN
156 #ifdef IRAM_BASE_ADDR
157 .word IRAM_BASE_ADDR + 0x20
165 #define S_FRAME_SIZE 72
187 #define MODE_SVC 0x13
191 * use bad_save_user_regs for abort/prefetch/undef/swi ...
192 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
195 .macro bad_save_user_regs
196 @ carve out a frame on current user stack
197 sub sp, sp, #S_FRAME_SIZE
198 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
199 ldr r2, IRQ_STACK_START_IN
200 @ get values for "aborted" pc and cpsr (into parm regs)
202 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
205 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
206 mov r0, sp @ save current stack into r0 (param register)
209 .macro irq_save_user_regs
210 sub sp, sp, #S_FRAME_SIZE
211 stmia sp, {r0 - r12} @ Calling r0-r12
212 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
214 stmdb r8, {sp, lr}^ @ Calling SP, LR
215 str lr, [r8, #0] @ Save calling PC
217 str r6, [r8, #4] @ Save CPSR
218 str r0, [r8, #8] @ Save OLD_R0
222 .macro irq_restore_user_regs
223 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
225 ldr lr, [sp, #S_PC] @ Get PC
226 add sp, sp, #S_FRAME_SIZE
227 subs pc, lr, #4 @ return & move spsr_svc into cpsr
231 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
233 str lr, [r13] @ save caller lr in position 0 of saved stack
234 mrs lr, spsr @ get the spsr
235 str lr, [r13, #4] @ save spsr in position 1 of saved stack
236 mov r13, #MODE_SVC @ prepare SVC-Mode
238 msr spsr, r13 @ switch modes, make sure moves will execute
239 mov lr, pc @ capture return pc
240 movs pc, lr @ jump to next instruction & switch modes.
243 .macro get_irq_stack @ setup IRQ stack
244 ldr sp, IRQ_STACK_START
247 .macro get_fiq_stack @ setup FIQ stack
248 ldr sp, FIQ_STACK_START
256 undefined_instruction:
259 bl do_undefined_instruction
265 bl do_software_interrupt
298 #endif /* CONFIG_SPL_BUILD */