3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
8 /* for now: just dummy functions to satisfy the linker */
14 * Flush range from all levels of d-cache/unified-cache.
15 * Affects the range [start, start + size - 1].
17 __weak void flush_cache(unsigned long start, unsigned long size)
19 flush_dcache_range(start, start + size);
23 * Default implementation:
24 * do a range flush for the entire range
26 __weak void flush_dcache_all(void)
32 * Default implementation of enable_caches()
33 * Real implementation should be in platform code
35 __weak void enable_caches(void)
37 puts("WARNING: Caches not enabled\n");
40 __weak void invalidate_dcache_range(unsigned long start, unsigned long stop)
42 /* An empty stub, real implementation should be in platform code */
44 __weak void flush_dcache_range(unsigned long start, unsigned long stop)
46 /* An empty stub, real implementation should be in platform code */
49 #ifdef CONFIG_SYS_NONCACHED_MEMORY
51 * Reserve one MMU section worth of address space below the malloc() area that
52 * will be mapped uncached.
54 static unsigned long noncached_start;
55 static unsigned long noncached_end;
56 static unsigned long noncached_next;
58 void noncached_init(void)
60 phys_addr_t start, end;
63 end = ALIGN(mem_malloc_start, MMU_SECTION_SIZE) - MMU_SECTION_SIZE;
64 size = ALIGN(CONFIG_SYS_NONCACHED_MEMORY, MMU_SECTION_SIZE);
67 debug("mapping memory %pa-%pa non-cached\n", &start, &end);
69 noncached_start = start;
71 noncached_next = start;
73 #ifndef CONFIG_SYS_DCACHE_OFF
74 mmu_set_region_dcache_behaviour(noncached_start, size, DCACHE_OFF);
78 phys_addr_t noncached_alloc(size_t size, size_t align)
80 phys_addr_t next = ALIGN(noncached_next, align);
82 if (next >= noncached_end || (noncached_end - next) < size)
85 debug("allocated %zu bytes of uncached memory @%pa\n", size, &next);
86 noncached_next = next + size;
90 #endif /* CONFIG_SYS_NONCACHED_MEMORY */