2 * linux/include/asm-arm/io.h
4 * Copyright (C) 1996-2000 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both
12 * constant addresses and variable addresses.
13 * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture
14 * specific IO header files.
15 * 27-Mar-1999 PJB Second parameter of memcpy_toio is const..
16 * 04-Apr-1999 PJB Added check_signature.
17 * 12-Dec-1999 RMK More cleanups
18 * 18-Jun-2000 RMK Removed virt_to_* and friends definitions
20 #ifndef __ASM_ARM_IO_H
21 #define __ASM_ARM_IO_H
25 #include <linux/types.h>
26 #include <asm/byteorder.h>
27 #include <asm/memory.h>
28 #include <asm/barriers.h>
30 #include <asm/arch/hardware.h>
31 #endif /* XXX###XXX */
33 static inline void sync(void)
38 * Generic virtual read/write. Note that we don't support half-word
39 * read/writes. We define __arch_*[bl] here, and leave __arch_*w
40 * to the architecture specific code.
42 #define __arch_getb(a) (*(volatile unsigned char *)(a))
43 #define __arch_getw(a) (*(volatile unsigned short *)(a))
44 #define __arch_getl(a) (*(volatile unsigned int *)(a))
45 #define __arch_getq(a) (*(volatile unsigned long long *)(a))
47 #define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v))
48 #define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v))
49 #define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v))
50 #define __arch_putq(v,a) (*(volatile unsigned long long *)(a) = (v))
52 static inline void __raw_writesb(unsigned long addr, const void *data,
55 uint8_t *buf = (uint8_t *)data;
57 __arch_putb(*buf++, addr);
60 static inline void __raw_writesw(unsigned long addr, const void *data,
63 uint16_t *buf = (uint16_t *)data;
65 __arch_putw(*buf++, addr);
68 static inline void __raw_writesl(unsigned long addr, const void *data,
71 uint32_t *buf = (uint32_t *)data;
73 __arch_putl(*buf++, addr);
76 static inline void __raw_readsb(unsigned long addr, void *data, int bytelen)
78 uint8_t *buf = (uint8_t *)data;
80 *buf++ = __arch_getb(addr);
83 static inline void __raw_readsw(unsigned long addr, void *data, int wordlen)
85 uint16_t *buf = (uint16_t *)data;
87 *buf++ = __arch_getw(addr);
90 static inline void __raw_readsl(unsigned long addr, void *data, int longlen)
92 uint32_t *buf = (uint32_t *)data;
94 *buf++ = __arch_getl(addr);
97 #define __raw_writeb(v,a) __arch_putb(v,a)
98 #define __raw_writew(v,a) __arch_putw(v,a)
99 #define __raw_writel(v,a) __arch_putl(v,a)
100 #define __raw_writeq(v,a) __arch_putq(v,a)
102 #define __raw_readb(a) __arch_getb(a)
103 #define __raw_readw(a) __arch_getw(a)
104 #define __raw_readl(a) __arch_getl(a)
105 #define __raw_readq(a) __arch_getq(a)
108 * TODO: The kernel offers some more advanced versions of barriers, it might
109 * have some advantages to use them instead of the simple one here.
112 #define __iormb() dmb()
113 #define __iowmb() dmb()
115 #define writeb(v,c) ({ u8 __v = v; __iowmb(); __arch_putb(__v,c); __v; })
116 #define writew(v,c) ({ u16 __v = v; __iowmb(); __arch_putw(__v,c); __v; })
117 #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
118 #define writeq(v,c) ({ u64 __v = v; __iowmb(); __arch_putq(__v,c); __v; })
120 #define readb(c) ({ u8 __v = __arch_getb(c); __iormb(); __v; })
121 #define readw(c) ({ u16 __v = __arch_getw(c); __iormb(); __v; })
122 #define readl(c) ({ u32 __v = __arch_getl(c); __iormb(); __v; })
123 #define readq(c) ({ u64 __v = __arch_getq(c); __iormb(); __v; })
126 * Relaxed I/O memory access primitives. These follow the Device memory
127 * ordering rules but do not guarantee any ordering relative to Normal memory
130 #define readb_relaxed(c) ({ u8 __r = __raw_readb(c); __r; })
131 #define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \
132 __raw_readw(c)); __r; })
133 #define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \
134 __raw_readl(c)); __r; })
135 #define readq_relaxed(c) ({ u64 __r = le64_to_cpu((__force __le64) \
136 __raw_readq(c)); __r; })
138 #define writeb_relaxed(v, c) ((void)__raw_writeb((v), (c)))
139 #define writew_relaxed(v, c) ((void)__raw_writew((__force u16) \
140 cpu_to_le16(v), (c)))
141 #define writel_relaxed(v, c) ((void)__raw_writel((__force u32) \
142 cpu_to_le32(v), (c)))
143 #define writeq_relaxed(v, c) ((void)__raw_writeq((__force u64) \
144 cpu_to_le64(v), (c)))
147 * The compiler seems to be incapable of optimising constants
148 * properly. Spell it out to the compiler in some cases.
149 * These are only valid for small values of "off" (< 1<<12)
151 #define __raw_base_writeb(val,base,off) __arch_base_putb(val,base,off)
152 #define __raw_base_writew(val,base,off) __arch_base_putw(val,base,off)
153 #define __raw_base_writel(val,base,off) __arch_base_putl(val,base,off)
155 #define __raw_base_readb(base,off) __arch_base_getb(base,off)
156 #define __raw_base_readw(base,off) __arch_base_getw(base,off)
157 #define __raw_base_readl(base,off) __arch_base_getl(base,off)
160 * Clear and set bits in one shot. These macros can be used to clear and
161 * set multiple bits in a register using a single call. These macros can
162 * also be used to set a multiple-bit bit pattern using a mask, by
163 * specifying the mask in the 'clear' parameter and the new bit pattern
164 * in the 'set' parameter.
167 #define out_arch(type,endian,a,v) __raw_write##type(cpu_to_##endian(v),a)
168 #define in_arch(type,endian,a) endian##_to_cpu(__raw_read##type(a))
170 #define out_le64(a,v) out_arch(q,le64,a,v)
171 #define out_le32(a,v) out_arch(l,le32,a,v)
172 #define out_le16(a,v) out_arch(w,le16,a,v)
174 #define in_le64(a) in_arch(q,le64,a)
175 #define in_le32(a) in_arch(l,le32,a)
176 #define in_le16(a) in_arch(w,le16,a)
178 #define out_be32(a,v) out_arch(l,be32,a,v)
179 #define out_be16(a,v) out_arch(w,be16,a,v)
181 #define in_be32(a) in_arch(l,be32,a)
182 #define in_be16(a) in_arch(w,be16,a)
184 #define out_32(a,v) __raw_writel(v,a)
185 #define out_16(a,v) __raw_writew(v,a)
186 #define out_8(a,v) __raw_writeb(v,a)
188 #define in_32(a) __raw_readl(a)
189 #define in_16(a) __raw_readw(a)
190 #define in_8(a) __raw_readb(a)
192 #define clrbits(type, addr, clear) \
193 out_##type((addr), in_##type(addr) & ~(clear))
195 #define setbits(type, addr, set) \
196 out_##type((addr), in_##type(addr) | (set))
198 #define clrsetbits(type, addr, clear, set) \
199 out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
201 #define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
202 #define setbits_be32(addr, set) setbits(be32, addr, set)
203 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
205 #define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
206 #define setbits_le32(addr, set) setbits(le32, addr, set)
207 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
209 #define clrbits_32(addr, clear) clrbits(32, addr, clear)
210 #define setbits_32(addr, set) setbits(32, addr, set)
211 #define clrsetbits_32(addr, clear, set) clrsetbits(32, addr, clear, set)
213 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
214 #define setbits_be16(addr, set) setbits(be16, addr, set)
215 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
217 #define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
218 #define setbits_le16(addr, set) setbits(le16, addr, set)
219 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
221 #define clrbits_16(addr, clear) clrbits(16, addr, clear)
222 #define setbits_16(addr, set) setbits(16, addr, set)
223 #define clrsetbits_16(addr, clear, set) clrsetbits(16, addr, clear, set)
225 #define clrbits_8(addr, clear) clrbits(8, addr, clear)
226 #define setbits_8(addr, set) setbits(8, addr, set)
227 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
230 * Now, pick up the machine-defined IO definitions
232 #if 0 /* XXX###XXX */
233 #include <asm/arch/io.h>
234 #endif /* XXX###XXX */
237 * IO port access primitives
238 * -------------------------
240 * The ARM doesn't have special IO access instructions; all IO is memory
241 * mapped. Note that these are defined to perform little endian accesses
242 * only. Their primary purpose is to access PCI and ISA peripherals.
244 * Note that for a big endian machine, this implies that the following
245 * big endian mode connectivity is in place, as described by numerous
248 * PCI: D0-D7 D8-D15 D16-D23 D24-D31
249 * ARM: D24-D31 D16-D23 D8-D15 D0-D7
251 * The machine specific io.h include defines __io to translate an "IO"
252 * address to a memory address.
254 * Note that we prevent GCC re-ordering or caching values in expressions
255 * by introducing sequence points into the in*() definitions. Note that
256 * __raw_* do not guarantee this behaviour.
258 * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
261 #define outb(v,p) __raw_writeb(v,__io(p))
262 #define outw(v,p) __raw_writew(cpu_to_le16(v),__io(p))
263 #define outl(v,p) __raw_writel(cpu_to_le32(v),__io(p))
265 #define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; })
266 #define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
267 #define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
269 #define outsb(p,d,l) __raw_writesb(__io(p),d,l)
270 #define outsw(p,d,l) __raw_writesw(__io(p),d,l)
271 #define outsl(p,d,l) __raw_writesl(__io(p),d,l)
273 #define insb(p,d,l) __raw_readsb(__io(p),d,l)
274 #define insw(p,d,l) __raw_readsw(__io(p),d,l)
275 #define insl(p,d,l) __raw_readsl(__io(p),d,l)
278 #define outb_p(val,port) outb((val),(port))
279 #define outw_p(val,port) outw((val),(port))
280 #define outl_p(val,port) outl((val),(port))
281 #define inb_p(port) inb((port))
282 #define inw_p(port) inw((port))
283 #define inl_p(port) inl((port))
285 #define outsb_p(port,from,len) outsb(port,from,len)
286 #define outsw_p(port,from,len) outsw(port,from,len)
287 #define outsl_p(port,from,len) outsl(port,from,len)
288 #define insb_p(port,to,len) insb(port,to,len)
289 #define insw_p(port,to,len) insw(port,to,len)
290 #define insl_p(port,to,len) insl(port,to,len)
292 #define writesl(a, d, s) __raw_writesl((unsigned long)a, d, s)
293 #define readsl(a, d, s) __raw_readsl((unsigned long)a, d, s)
294 #define writesw(a, d, s) __raw_writesw((unsigned long)a, d, s)
295 #define readsw(a, d, s) __raw_readsw((unsigned long)a, d, s)
296 #define writesb(a, d, s) __raw_writesb((unsigned long)a, d, s)
297 #define readsb(a, d, s) __raw_readsb((unsigned long)a, d, s)
300 * DMA-consistent mapping functions. These allocate/free a region of
301 * uncached, unwrite-buffered mapped memory space for use with DMA
302 * devices. This is the "generic" version. The PCI specific version
305 extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);
306 extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle);
307 extern void consistent_sync(void *vaddr, size_t size, int rw);
310 * String version of IO memory access ops:
312 extern void _memcpy_fromio(void *, unsigned long, size_t);
313 extern void _memcpy_toio(unsigned long, const void *, size_t);
314 extern void _memset_io(unsigned long, int, size_t);
316 extern void __readwrite_bug(const char *fn);
319 * If this architecture has PCI memory IO, then define the read/write
320 * macros. These should only be used with the cookie passed from
325 #define readb(c) ({ unsigned int __v = __raw_readb(__mem_pci(c)); __v; })
326 #define readw(c) ({ unsigned int __v = le16_to_cpu(__raw_readw(__mem_pci(c))); __v; })
327 #define readl(c) ({ unsigned int __v = le32_to_cpu(__raw_readl(__mem_pci(c))); __v; })
329 #define writeb(v,c) __raw_writeb(v,__mem_pci(c))
330 #define writew(v,c) __raw_writew(cpu_to_le16(v),__mem_pci(c))
331 #define writel(v,c) __raw_writel(cpu_to_le32(v),__mem_pci(c))
333 #define memset_io(c,v,l) _memset_io(__mem_pci(c),(v),(l))
334 #define memcpy_fromio(a,c,l) _memcpy_fromio((a),__mem_pci(c),(l))
335 #define memcpy_toio(c,a,l) _memcpy_toio(__mem_pci(c),(a),(l))
337 #define eth_io_copy_and_sum(s,c,l,b) \
338 eth_copy_and_sum((s),__mem_pci(c),(l),(b))
341 check_signature(unsigned long io_addr, const unsigned char *signature,
346 if (readb(io_addr) != *signature)
358 #define memset_io(a, b, c) memset((void *)(a), (b), (c))
359 #define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c))
360 #define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c))
364 #define readb(addr) (__readwrite_bug("readb"),0)
365 #define readw(addr) (__readwrite_bug("readw"),0)
366 #define readl(addr) (__readwrite_bug("readl"),0)
367 #define writeb(v,addr) __readwrite_bug("writeb")
368 #define writew(v,addr) __readwrite_bug("writew")
369 #define writel(v,addr) __readwrite_bug("writel")
371 #define eth_io_copy_and_sum(a,b,c,d) __readwrite_bug("eth_io_copy_and_sum")
373 #define check_signature(io,sig,len) (0)
376 #endif /* __mem_pci */
379 * If this architecture has ISA IO, then define the isa_read/isa_write
384 #define isa_readb(addr) __raw_readb(__mem_isa(addr))
385 #define isa_readw(addr) __raw_readw(__mem_isa(addr))
386 #define isa_readl(addr) __raw_readl(__mem_isa(addr))
387 #define isa_writeb(val,addr) __raw_writeb(val,__mem_isa(addr))
388 #define isa_writew(val,addr) __raw_writew(val,__mem_isa(addr))
389 #define isa_writel(val,addr) __raw_writel(val,__mem_isa(addr))
390 #define isa_memset_io(a,b,c) _memset_io(__mem_isa(a),(b),(c))
391 #define isa_memcpy_fromio(a,b,c) _memcpy_fromio((a),__mem_isa(b),(c))
392 #define isa_memcpy_toio(a,b,c) _memcpy_toio(__mem_isa((a)),(b),(c))
394 #define isa_eth_io_copy_and_sum(a,b,c,d) \
395 eth_copy_and_sum((a),__mem_isa(b),(c),(d))
398 isa_check_signature(unsigned long io_addr, const unsigned char *signature,
403 if (isa_readb(io_addr) != *signature)
414 #else /* __mem_isa */
416 #define isa_readb(addr) (__readwrite_bug("isa_readb"),0)
417 #define isa_readw(addr) (__readwrite_bug("isa_readw"),0)
418 #define isa_readl(addr) (__readwrite_bug("isa_readl"),0)
419 #define isa_writeb(val,addr) __readwrite_bug("isa_writeb")
420 #define isa_writew(val,addr) __readwrite_bug("isa_writew")
421 #define isa_writel(val,addr) __readwrite_bug("isa_writel")
422 #define isa_memset_io(a,b,c) __readwrite_bug("isa_memset_io")
423 #define isa_memcpy_fromio(a,b,c) __readwrite_bug("isa_memcpy_fromio")
424 #define isa_memcpy_toio(a,b,c) __readwrite_bug("isa_memcpy_toio")
426 #define isa_eth_io_copy_and_sum(a,b,c,d) \
427 __readwrite_bug("isa_eth_io_copy_and_sum")
429 #define isa_check_signature(io,sig,len) (0)
431 #endif /* __mem_isa */
432 #endif /* __KERNEL__ */
434 #include <asm-generic/io.h>
437 #endif /* __ASM_ARM_IO_H */