1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm/include/asm/glue-cache.h
5 * Copyright (C) 1999-2002 Russell King
7 #ifndef ASM_GLUE_CACHE_H
8 #define ASM_GLUE_CACHE_H
19 #if defined(CONFIG_CPU_CACHE_V4)
21 # define MULTI_CACHE 1
27 #if defined(CONFIG_CPU_ARM920T) || defined(CONFIG_CPU_ARM922T) || \
28 defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020) || \
29 defined(CONFIG_CPU_ARM1026)
30 # define MULTI_CACHE 1
33 #if defined(CONFIG_CPU_FA526)
35 # define MULTI_CACHE 1
41 #if defined(CONFIG_CPU_ARM926T)
43 # define MULTI_CACHE 1
45 # define _CACHE arm926
49 #if defined(CONFIG_CPU_ARM940T)
51 # define MULTI_CACHE 1
53 # define _CACHE arm940
57 #if defined(CONFIG_CPU_ARM946E)
59 # define MULTI_CACHE 1
61 # define _CACHE arm946
65 #if defined(CONFIG_CPU_CACHE_V4WB)
67 # define MULTI_CACHE 1
73 #if defined(CONFIG_CPU_XSCALE)
75 # define MULTI_CACHE 1
77 # define _CACHE xscale
81 #if defined(CONFIG_CPU_XSC3)
83 # define MULTI_CACHE 1
89 #if defined(CONFIG_CPU_MOHAWK)
91 # define MULTI_CACHE 1
93 # define _CACHE mohawk
97 #if defined(CONFIG_CPU_FEROCEON)
98 # define MULTI_CACHE 1
101 #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K)
103 # define MULTI_CACHE 1
109 #if defined(CONFIG_CPU_V7)
111 # define MULTI_CACHE 1
117 #if defined(CONFIG_CACHE_B15_RAC)
118 # define MULTI_CACHE 1
121 #if defined(CONFIG_CPU_V7M)
122 # define MULTI_CACHE 1
125 #if !defined(_CACHE) && !defined(MULTI_CACHE)
126 #error Unknown cache maintenance model
129 #ifndef __ASSEMBLER__
130 static inline void nop_flush_icache_all(void) { }
131 static inline void nop_flush_kern_cache_all(void) { }
132 static inline void nop_flush_kern_cache_louis(void) { }
133 static inline void nop_flush_user_cache_all(void) { }
134 static inline void nop_flush_user_cache_range(unsigned long a,
135 unsigned long b, unsigned int c) { }
137 static inline void nop_coherent_kern_range(unsigned long a, unsigned long b) { }
138 static inline int nop_coherent_user_range(unsigned long a,
139 unsigned long b) { return 0; }
140 static inline void nop_flush_kern_dcache_area(void *a, size_t s) { }
142 static inline void nop_dma_flush_range(const void *a, const void *b) { }
144 static inline void nop_dma_map_area(const void *s, size_t l, int f) { }
145 static inline void nop_dma_unmap_area(const void *s, size_t l, int f) { }
149 #define __cpuc_flush_icache_all __glue(_CACHE,_flush_icache_all)
150 #define __cpuc_flush_kern_all __glue(_CACHE,_flush_kern_cache_all)
151 #define __cpuc_flush_kern_louis __glue(_CACHE,_flush_kern_cache_louis)
152 #define __cpuc_flush_user_all __glue(_CACHE,_flush_user_cache_all)
153 #define __cpuc_flush_user_range __glue(_CACHE,_flush_user_cache_range)
154 #define __cpuc_coherent_kern_range __glue(_CACHE,_coherent_kern_range)
155 #define __cpuc_coherent_user_range __glue(_CACHE,_coherent_user_range)
156 #define __cpuc_flush_dcache_area __glue(_CACHE,_flush_kern_dcache_area)
158 #define dmac_inv_range __glue(_CACHE,_dma_inv_range)
159 #define dmac_clean_range __glue(_CACHE,_dma_clean_range)
160 #define dmac_flush_range __glue(_CACHE,_dma_flush_range)