arm: socfpga: Enable all FPGA config support for Arria 10
[platform/kernel/u-boot.git] / arch / arm / include / asm / ehci-omap.h
1 /*
2  * OMAP EHCI port support
3  * Based on LINUX KERNEL
4  * drivers/usb/host/ehci-omap.c and drivers/mfd/omap-usb-host.c
5  *
6  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com*
7  * Author: Govindraj R <govindraj.raja@ti.com>
8  *
9  * SPDX-License-Identifier:     GPL-2.0
10  */
11
12 #ifndef _OMAP_COMMON_EHCI_H_
13 #define _OMAP_COMMON_EHCI_H_
14
15 enum usbhs_omap_port_mode {
16         OMAP_USBHS_PORT_MODE_UNUSED,
17         OMAP_EHCI_PORT_MODE_PHY,
18         OMAP_EHCI_PORT_MODE_TLL,
19         OMAP_EHCI_PORT_MODE_HSIC,
20 };
21
22 #ifdef CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS
23 #define OMAP_HS_USB_PORTS       CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS
24 #else
25 #define OMAP_HS_USB_PORTS       3
26 #endif
27
28 #define is_ehci_phy_mode(x)     ((x) == OMAP_EHCI_PORT_MODE_PHY)
29 #define is_ehci_tll_mode(x)     ((x) == OMAP_EHCI_PORT_MODE_TLL)
30 #define is_ehci_hsic_mode(x)    ((x) == OMAP_EHCI_PORT_MODE_HSIC)
31
32 /* Values of UHH_REVISION - Note: these are not given in the TRM */
33 #define OMAP_USBHS_REV1                                 0x00000010 /* OMAP3 */
34 #define OMAP_USBHS_REV2                                 0x50700100 /* OMAP4 */
35 #define OMAP_USBHS_REV2_1                               0x50700101 /* OMAP5 */
36
37 /* UHH Register Set */
38 #define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN              (1 << 2)
39 #define OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN              (1 << 3)
40 #define OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN             (1 << 4)
41 #define OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN              (1 << 5)
42
43 #define OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS              1
44 #define OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS              (1 << 11)
45 #define OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS              (1 << 12)
46 #define OMAP4_UHH_HOSTCONFIG_APP_START_CLK              (1 << 31)
47
48 #define OMAP_P1_MODE_CLEAR                              (3 << 16)
49 #define OMAP_P1_MODE_TLL                                (1 << 16)
50 #define OMAP_P1_MODE_HSIC                               (3 << 16)
51 #define OMAP_P2_MODE_CLEAR                              (3 << 18)
52 #define OMAP_P2_MODE_TLL                                (1 << 18)
53 #define OMAP_P2_MODE_HSIC                               (3 << 18)
54 #define OMAP_P3_MODE_CLEAR                              (3 << 20)
55 #define OMAP_P3_MODE_HSIC                               (3 << 20)
56
57 /* EHCI Register Set */
58 #define EHCI_INSNREG04_DISABLE_UNSUSPEND                (1 << 5)
59 #define EHCI_INSNREG05_ULPI_CONTROL_SHIFT               31
60 #define EHCI_INSNREG05_ULPI_PORTSEL_SHIFT               24
61 #define EHCI_INSNREG05_ULPI_OPSEL_SHIFT                 22
62 #define EHCI_INSNREG05_ULPI_REGADD_SHIFT                16
63
64 #define OMAP_REV1_TLL_CHANNEL_COUNT                     3
65 #define OMAP_REV2_TLL_CHANNEL_COUNT                     2
66
67 /* TLL Register Set */
68 #define OMAP_TLL_CHANNEL_CONF(num)                      (0x004 * num)
69 #define OMAP_TLL_CHANNEL_CONF_DRVVBUS                   (1 << 16)
70 #define OMAP_TLL_CHANNEL_CONF_CHRGVBUS                  (1 << 15)
71 #define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF            (1 << 11)
72 #define OMAP_TLL_CHANNEL_CONF_CHANMODE_TRANSPARENT_UTMI (2 << 1)
73 #define OMAP_TLL_CHANNEL_CONF_CHANEN                    1
74
75 struct omap_usbhs_board_data {
76         enum usbhs_omap_port_mode port_mode[OMAP_HS_USB_PORTS];
77 };
78
79 struct omap_usbtll {
80         u32 rev;                /* 0x00 */
81         u32 hwinfo;             /* 0x04 */
82         u8 reserved1[0x8];
83         u32 sysc;               /* 0x10 */
84         u32 syss;               /* 0x14 */
85         u32 irqst;              /* 0x18 */
86         u32 irqen;              /* 0x1c */
87         u8 reserved2[0x10];
88         u32 shared_conf;        /* 0x30 */
89         u8 reserved3[0xc];
90         u32 channel_conf;       /* 0x40 */
91 };
92
93 struct omap_uhh {
94         u32 rev;        /* 0x00 */
95         u32 hwinfo;     /* 0x04 */
96         u8 reserved1[0x8];
97         u32 sysc;       /* 0x10 */
98         u32 syss;       /* 0x14 */
99         u8 reserved2[0x28];
100         u32 hostconfig; /* 0x40 */
101         u32 debugcsr;   /* 0x44 */
102 };
103
104 struct omap_ehci {
105         u32 hccapbase;          /* 0x00 */
106         u32 hcsparams;          /* 0x04 */
107         u32 hccparams;          /* 0x08 */
108         u8 reserved1[0x04];
109         u32 usbcmd;             /* 0x10 */
110         u32 usbsts;             /* 0x14 */
111         u32 usbintr;            /* 0x18 */
112         u32 frindex;            /* 0x1c */
113         u32 ctrldssegment;      /* 0x20 */
114         u32 periodiclistbase;   /* 0x24 */
115         u32 asysnclistaddr;     /* 0x28 */
116         u8 reserved2[0x24];
117         u32 configflag;         /* 0x50 */
118         u32 portsc_i;           /* 0x54 */
119         u8 reserved3[0x38];
120         u32 insreg00;           /* 0x90 */
121         u32 insreg01;           /* 0x94 */
122         u32 insreg02;           /* 0x98 */
123         u32 insreg03;           /* 0x9c */
124         u32 insreg04;           /* 0xa0 */
125         u32 insreg05_utmi_ulpi; /* 0xa4 */
126         u32 insreg06;           /* 0xa8 */
127         u32 insreg07;           /* 0xac */
128         u32 insreg08;           /* 0xb0 */
129 };
130
131 /*
132  * FIXME: forward declaration of this structs needed because omap got the
133  * ehci implementation backwards. move out ehci_hcd_x from board files
134  */
135 struct ehci_hccr;
136 struct ehci_hcor;
137
138 int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata,
139                        struct ehci_hccr **hccr, struct ehci_hcor **hcor);
140 int omap_ehci_hcd_stop(void);
141
142 #endif /* _OMAP_COMMON_EHCI_H_ */