1 #ifndef ASMARM_DMA_MAPPING_H
2 #define ASMARM_DMA_MAPPING_H
6 #include <linux/mm_types.h>
7 #include <linux/scatterlist.h>
8 #include <linux/dma-attrs.h>
9 #include <linux/dma-debug.h>
11 #include <asm-generic/dma-coherent.h>
12 #include <asm/memory.h>
13 #include <asm/cacheflush.h>
16 #include <asm/xen/hypervisor.h>
18 #define DMA_ERROR_CODE (~0)
19 extern struct dma_map_ops arm_dma_ops;
20 extern struct dma_map_ops arm_coherent_dma_ops;
22 static inline struct dma_map_ops *__generic_dma_ops(struct device *dev)
24 if (dev && dev->archdata.dma_ops)
25 return dev->archdata.dma_ops;
29 static inline struct dma_map_ops *get_dma_ops(struct device *dev)
31 if (xen_initial_domain())
34 return __generic_dma_ops(dev);
37 static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
40 dev->archdata.dma_ops = ops;
43 #include <asm-generic/dma-mapping-common.h>
45 static inline int dma_set_mask(struct device *dev, u64 mask)
47 return get_dma_ops(dev)->set_dma_mask(dev, mask);
50 #ifdef __arch_page_to_dma
51 #error Please update to __arch_pfn_to_dma
55 * dma_to_pfn/pfn_to_dma/dma_to_virt/virt_to_dma are architecture private
56 * functions used internally by the DMA-mapping API to provide DMA
57 * addresses. They must not be used by drivers.
59 #ifndef __arch_pfn_to_dma
60 static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn)
62 return (dma_addr_t)__pfn_to_bus(pfn);
65 static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr)
67 return __bus_to_pfn(addr);
70 static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
72 return (void *)__bus_to_virt((unsigned long)addr);
75 static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
77 return (dma_addr_t)__virt_to_bus((unsigned long)(addr));
80 static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn)
82 return __arch_pfn_to_dma(dev, pfn);
85 static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr)
87 return __arch_dma_to_pfn(dev, addr);
90 static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
92 return __arch_dma_to_virt(dev, addr);
95 static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
97 return __arch_virt_to_dma(dev, addr);
101 static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
103 unsigned int offset = paddr & ~PAGE_MASK;
104 return pfn_to_dma(dev, __phys_to_pfn(paddr)) + offset;
107 static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dev_addr)
109 unsigned int offset = dev_addr & ~PAGE_MASK;
110 return __pfn_to_phys(dma_to_pfn(dev, dev_addr)) + offset;
113 static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
118 mask = *dev->dma_mask;
120 mask = dev->coherent_dma_mask;
125 limit = (mask + 1) & ~mask;
126 if (limit && size > limit)
129 if ((addr | (addr + size - 1)) & ~mask)
135 static inline void dma_mark_clean(void *addr, size_t size) { }
138 * DMA errors are defined by all-bits-set in the DMA address.
140 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
142 debug_dma_mapping_error(dev, dma_addr);
143 return dma_addr == DMA_ERROR_CODE;
147 * Dummy noncoherent implementation. We don't provide a dma_cache_sync
148 * function so drivers using this API are highlighted with build warnings.
150 static inline void *dma_alloc_noncoherent(struct device *dev, size_t size,
151 dma_addr_t *handle, gfp_t gfp)
156 static inline void dma_free_noncoherent(struct device *dev, size_t size,
157 void *cpu_addr, dma_addr_t handle)
161 extern int dma_supported(struct device *dev, u64 mask);
163 extern int arm_dma_set_mask(struct device *dev, u64 dma_mask);
166 * arm_dma_alloc - allocate consistent memory for DMA
167 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
168 * @size: required memory size
169 * @handle: bus-specific DMA address
170 * @attrs: optinal attributes that specific mapping properties
172 * Allocate some memory for a device for performing DMA. This function
173 * allocates pages, and will return the CPU-viewed address, and sets @handle
174 * to be the device-viewed address.
176 extern void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
177 gfp_t gfp, struct dma_attrs *attrs);
179 #define dma_alloc_coherent(d, s, h, f) dma_alloc_attrs(d, s, h, f, NULL)
181 static inline void *dma_alloc_attrs(struct device *dev, size_t size,
182 dma_addr_t *dma_handle, gfp_t flag,
183 struct dma_attrs *attrs)
185 struct dma_map_ops *ops = get_dma_ops(dev);
189 cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs);
190 debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
195 * arm_dma_free - free memory allocated by arm_dma_alloc
196 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
197 * @size: size of memory originally requested in dma_alloc_coherent
198 * @cpu_addr: CPU-view address returned from dma_alloc_coherent
199 * @handle: device-view address returned from dma_alloc_coherent
200 * @attrs: optinal attributes that specific mapping properties
202 * Free (and unmap) a DMA buffer previously allocated by
205 * References to memory and mappings associated with cpu_addr/handle
206 * during and after this call executing are illegal.
208 extern void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
209 dma_addr_t handle, struct dma_attrs *attrs);
211 #define dma_free_coherent(d, s, c, h) dma_free_attrs(d, s, c, h, NULL)
213 static inline void dma_free_attrs(struct device *dev, size_t size,
214 void *cpu_addr, dma_addr_t dma_handle,
215 struct dma_attrs *attrs)
217 struct dma_map_ops *ops = get_dma_ops(dev);
220 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
221 ops->free(dev, size, cpu_addr, dma_handle, attrs);
225 * arm_dma_mmap - map a coherent DMA allocation into user space
226 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
227 * @vma: vm_area_struct describing requested user mapping
228 * @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent
229 * @handle: device-view address returned from dma_alloc_coherent
230 * @size: size of memory originally requested in dma_alloc_coherent
231 * @attrs: optinal attributes that specific mapping properties
233 * Map a coherent DMA buffer previously allocated by dma_alloc_coherent
234 * into user space. The coherent DMA buffer must not be freed by the
235 * driver until the user space mapping has been released.
237 extern int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
238 void *cpu_addr, dma_addr_t dma_addr, size_t size,
239 struct dma_attrs *attrs);
241 static inline void *dma_alloc_writecombine(struct device *dev, size_t size,
242 dma_addr_t *dma_handle, gfp_t flag)
244 DEFINE_DMA_ATTRS(attrs);
245 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
246 return dma_alloc_attrs(dev, size, dma_handle, flag, &attrs);
249 static inline void dma_free_writecombine(struct device *dev, size_t size,
250 void *cpu_addr, dma_addr_t dma_handle)
252 DEFINE_DMA_ATTRS(attrs);
253 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
254 return dma_free_attrs(dev, size, cpu_addr, dma_handle, &attrs);
258 * This can be called during early boot to increase the size of the atomic
259 * coherent DMA pool above the default value of 256KiB. It must be called
260 * before postcore_initcall.
262 extern void __init init_dma_coherent_pool_size(unsigned long size);
265 * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic"
266 * and utilize bounce buffers as needed to work around limited DMA windows.
268 * On the SA-1111, a bug limits DMA to only certain regions of RAM.
269 * On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
270 * On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM)
272 * The following are helper functions used by the dmabounce subystem
277 * dmabounce_register_dev
279 * @dev: valid struct device pointer
280 * @small_buf_size: size of buffers to use with small buffer pool
281 * @large_buf_size: size of buffers to use with large buffer pool (can be 0)
282 * @needs_bounce_fn: called to determine whether buffer needs bouncing
284 * This function should be called by low-level platform code to register
285 * a device as requireing DMA buffer bouncing. The function will allocate
286 * appropriate DMA pools for the device.
288 extern int dmabounce_register_dev(struct device *, unsigned long,
289 unsigned long, int (*)(struct device *, dma_addr_t, size_t));
292 * dmabounce_unregister_dev
294 * @dev: valid struct device pointer
296 * This function should be called by low-level platform code when device
297 * that was previously registered with dmabounce_register_dev is removed
301 extern void dmabounce_unregister_dev(struct device *);
306 * The scatter list versions of the above methods.
308 extern int arm_dma_map_sg(struct device *, struct scatterlist *, int,
309 enum dma_data_direction, struct dma_attrs *attrs);
310 extern void arm_dma_unmap_sg(struct device *, struct scatterlist *, int,
311 enum dma_data_direction, struct dma_attrs *attrs);
312 extern void arm_dma_sync_sg_for_cpu(struct device *, struct scatterlist *, int,
313 enum dma_data_direction);
314 extern void arm_dma_sync_sg_for_device(struct device *, struct scatterlist *, int,
315 enum dma_data_direction);
316 extern int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
317 void *cpu_addr, dma_addr_t dma_addr, size_t size,
318 struct dma_attrs *attrs);
320 #endif /* __KERNEL__ */