1 /******************************************************************************
2 David.Jia 2007.10.29 share_version_union
4 TCC -fpu None -O2 -bi -g+ -apcs /interwork -D__RUN_IN_SDRAM sdram_init.c
5 SC6600R -D_BL_NF_SC6600R_
6 SC6600H -D_BL_NF_SC6600H_
7 SC6600I -D_BL_NF_SC6600I_
8 SC6800 -gtp -cpu ARM926EJ-S -D_REF_SC6800_ -D_BL_NF_SC6800_
9 ******************************************************************************/
12 #include "sci_types.h"
15 //define DC_DMA Base Address
16 #define DMA_BASE 0x20100400
18 #define DMA_CHEN 0x20100004
19 #define DMA_HWEN 0x20100008
20 #define DMA_LINKEN 0x2010000C
21 #define DMA_PRIREG0 0x20100020
22 #define DMA_PRIREG1 0x20100024
23 #define DMA_INTMASKSTS 0x20100030
24 #define DMA_INTRAWSTS 0x20100034
25 #define DMA_ALLINTEN 0x20100040
26 #define DMA_BURSTINTEN 0x20100044
27 #define DMA_ALLINTMASKSTS 0x20100050
28 #define DMA_BURSTINTMASKSTS 0x20100054
29 #define DMA_ALLINTRAWSTS 0x20100060
30 #define DMA_BURSTINTRAWSTS 0x20100064
31 #define DMA_ALLINTCLR 0x20100070
32 #define DMA_BURSTINTCLR 0x20100074
33 #define DMA_SOFTREQ 0x20100080
34 #define DMA_SOFTACK 0x20100084
35 #define DMA_CHDONE 0x20100088
36 #define DMA_LINKLOADDONE 0x2010008C
37 #define DMA_STARTADDR 0x20100090
38 #define DMA_ENDADDR 0x20100094
48 volatile uint32 srcAddr;
49 volatile uint32 destAddr;
50 volatile uint32 llptr;