1 /******************************************************************************
2 ** File Name: chip_drv_common_io.h *
3 ** Author: Steve.Zhan *
5 ** Copyright: 2010 Spreatrum, Incoporated. All Rights Reserved. *
7 ******************************************************************************/
8 /******************************************************************************
10 **---------------------------------------------------------------------------*
11 ** DATE NAME DESCRIPTION *
12 ** 06/05/2010 Steve.Zhan Create. *
13 ******************************************************************************/
14 #ifndef _CHIP_DRV_COMMON_IO_H_
15 #define _CHIP_DRV_COMMON_IO_H_
16 /*----------------------------------------------------------------------------*
18 **------------------------------------------------------------------------- */
20 /**---------------------------------------------------------------------------*
22 **--------------------------------------------------------------------------*/
27 /**---------------------------------------------------------------------------*
29 **---------------------------------------------------------------------------*/
30 typedef uint32 DRV_WORD;
31 typedef uint8 DRV_BYTE;
32 typedef uint16 DRV_WORD16;
33 typedef uint32 DRV_WORD32;
34 typedef uint64 DRV_WORD64;
35 typedef uint32 DRV_ADDRWORD;
36 #define drv_count32 long
41 #define BIT_0 0x00000001
42 #define BIT_1 0x00000002
43 #define BIT_2 0x00000004
44 #define BIT_3 0x00000008
45 #define BIT_4 0x00000010
46 #define BIT_5 0x00000020
47 #define BIT_6 0x00000040
48 #define BIT_7 0x00000080
49 #define BIT_8 0x00000100
50 #define BIT_9 0x00000200
51 #define BIT_10 0x00000400
52 #define BIT_11 0x00000800
53 #define BIT_12 0x00001000
54 #define BIT_13 0x00002000
55 #define BIT_14 0x00004000
56 #define BIT_15 0x00008000
57 #define BIT_16 0x00010000
58 #define BIT_17 0x00020000
59 #define BIT_18 0x00040000
60 #define BIT_19 0x00080000
61 #define BIT_20 0x00100000
62 #define BIT_21 0x00200000
63 #define BIT_22 0x00400000
64 #define BIT_23 0x00800000
65 #define BIT_24 0x01000000
66 #define BIT_25 0x02000000
67 #define BIT_26 0x04000000
68 #define BIT_27 0x08000000
69 #define BIT_28 0x10000000
70 #define BIT_29 0x20000000
71 #define BIT_30 0x40000000
72 #define BIT_31 0x80000000
74 #define BIT_(__n) (1<<(__n))
75 #define MASK_(__n,__w) (((1<<(__w))-1)<<(__n))
76 #define VALUE_(__n,__v) ((__v)<<(__n))
79 typedef uint32 ChipRegT;
80 //#define REG32(ChipReg) ( *((volatile ChipRegT*) (ChipReg)))
81 #define REG32(x) (*((volatile uint32 *)(x)))
83 typedef uint16 ChipRegT16;
84 #define REG16(ChipReg) ( *((volatile ChipRegT16*) (ChipReg)))
86 #define REG8(ChipReg) ( *((volatile uint8*) (ChipReg)))
87 #define CHIP_REG_OR(reg_addr, value) (*(volatile uint32 *)(reg_addr) |= (uint32)(value))
88 #define CHIP_REG_AND(reg_addr, value) (*(volatile uint32 *)(reg_addr) &= (uint32)(value))
89 #define CHIP_REG_GET(reg_addr) (*(volatile uint32 *)(reg_addr))
90 #define CHIP_REG_SET(reg_addr, value) (*(volatile uint32 *)(reg_addr) = (uint32)(value))
91 #define SET_BIT(reg,bit) ((reg) |= (1<<(bit)))
92 #define CLR_BIT(reg,bit) ((reg) &= ~(1<<(bit)))
93 #define TST_BIT(a,b) (((a)>>(b))&1)
94 #define XOR_BIT(a,b) ((a) ^= (1<<(b)))
97 #define ARR_SIZE(x) (sizeof(x) / sizeof(x[0]) )
100 #define MIN(x,y) (((x) < (y)) ? (x): (y))
102 #define MAX(x,y) (((x) > (y)) ? (x): (y))
105 #define ABS(x) (((x) < (0)) ? (-x):(x))
107 #define SWAP16(X) ( ((X & 0xFF00) >> 8) | ((X & 0x00FF) << 8) )
108 #define SWAP32(X) (((n) << 24) | (((n) & 0xff00) << 8) | (((n) >> 8) & 0xff00) | ((n) >> 24))
109 #define SWAP_AB(type,a,b) { type tmp; tmp=a; a=b; b=tmp; }
113 //Debug info Function and MacroS.
116 #define CHIP_DRV_ASSERT SCI_ASSERT
117 #define CHIP_DRV_PASSERT SCI_PASSERT
119 #define CHIP_DRV_ASSERT NULL
120 #define CHIP_DRV_PASSERT NULL
124 #define DRV_LSBFIRST 1234
125 #define DRV_MSBFIRST 4321
126 #define DRV_BYTEORDER DRV_MSBFIRST // Big endian
129 #define DRV_MACRO_START do {
130 #define DRV_MACRO_END } while (0)
132 #define DRV_EMPTY_STATEMENT DRV_MACRO_START DRV_MACRO_END
134 #define DRV_UNUSED_PARAM( _type_, _name_ ) DRV_MACRO_START \
135 _type_ __tmp1 = (_name_); \
136 _type_ __tmp2 = __tmp1; \
142 #ifndef HAL_IO_MACROS_DEFINED
144 //-----------------------------------------------------------------------------
145 // BYTE Register access.
146 // Individual and vectorized access to 8 bit registers.
148 // Little-endian version or big-endian version that doesn't need address munging
149 #if (DRV_BYTEORDER == DRV_LSBFIRST) || defined(HAL_IO_MACROS_NO_ADDRESS_MUNGING)
151 #define HAL_READ_UINT8( _register_, _value_ ) \
152 ((_value_) = *((volatile DRV_BYTE *)(_register_)))
154 #define HAL_WRITE_UINT8( _register_, _value_ ) \
155 (*((volatile DRV_BYTE *)(_register_)) = (_value_))
157 #define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
159 drv_count32 _i_,_j_; \
160 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
161 (_buf_)[_i_] = ((volatile DRV_BYTE *)(_register_))[_j_]; \
164 #define HAL_WRITE_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
166 drv_count32 _i_,_j_; \
167 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
168 ((volatile DRV_BYTE *)(_register_))[_j_] = (_buf_)[_i_]; \
171 #define HAL_READ_UINT8_STRING( _register_, _buf_, _count_ ) \
174 for( _i_ = 0; _i_ < (_count_); _i_++) \
175 (_buf_)[_i_] = ((volatile DRV_BYTE *)(_register_))[_i_]; \
178 #define HAL_WRITE_UINT8_STRING( _register_, _buf_, _count_ ) \
181 for( _i_ = 0; _i_ < (_count_); _i_++) \
182 ((volatile DRV_BYTE *)(_register_)) = (_buf_)[_i_]; \
185 #else // Big-endian version
187 #define HAL_READ_UINT8( _register_, _value_ ) \
188 ((_value_) = *((volatile DRV_BYTE *)((DRV_ADDRWORD)(_register_)^3)))
190 #define HAL_WRITE_UINT8( _register_, _value_ ) \
191 (*((volatile DRV_BYTE *)((DRV_ADDRWORD)(_register_)^3)) = (_value_))
193 #define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
195 drv_count32 _i_,_j_; \
196 volatile DRV_BYTE* _r_ = ((DRV_ADDRWORD)(_register_)^3); \
197 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
198 (_buf_)[_i_] = _r_[_j_]; \
201 #define HAL_WRITE_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
203 drv_count32 _i_,_j_; \
204 volatile DRV_BYTE* _r_ = ((DRV_ADDRWORD)(_register_)^3); \
205 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
206 _r_[_j_] = (_buf_)[_i_]; \
209 #define HAL_READ_UINT8_STRING( _register_, _buf_, _count_ ) \
212 volatile DRV_BYTE* _r_ = ((DRV_ADDRWORD)(_register_)^3); \
213 for( _i_ = 0; _i_ < (_count_); _i_++; \
214 (_buf_)[_i_] = _r_[_i_]; \
217 #define HAL_WRITE_UINT8_STRING( _register_, _buf_, _count_ ) \
220 volatile DRV_BYTE* _r_ = ((DRV_ADDRWORD)(_register_)^3); \
221 for( _i_ = 0; _i_ < (_count_); _i_++) \
222 _r_[_i_] = (_buf_)[_i_]; \
227 //-----------------------------------------------------------------------------
229 // Individual and vectorized access to 16 bit registers.
231 // Little-endian version or big-endian version that doesn't need address munging
232 #if (DRV_BYTEORDER == DRV_LSBFIRST) || defined(HAL_IO_MACROS_NO_ADDRESS_MUNGING)
234 #define HAL_READ_UINT16( _register_, _value_ ) \
235 ((_value_) = *((volatile DRV_WORD16 *)(_register_)))
237 #define HAL_WRITE_UINT16( _register_, _value_ ) \
238 (*((volatile DRV_WORD16 *)(_register_)) = (_value_))
240 #define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
242 drv_count32 _i_,_j_; \
243 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
244 (_buf_)[_i_] = ((volatile DRV_WORD16 *)(_register_))[_j_]; \
247 #define HAL_WRITE_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
249 drv_count32 _i_,_j_; \
250 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
251 ((volatile DRV_WORD16 *)(_register_))[_j_] = (_buf_)[_i_]; \
254 #define HAL_READ_UINT16_STRING( _register_, _buf_, _count_) \
257 for( _i_ = 0; _i_ < (_count_); _i_++) \
258 (_buf_)[_i_] = ((volatile DRV_WORD16 *)(_register_))[_i_]; \
261 #define HAL_WRITE_UINT16_STRING( _register_, _buf_, _count_) \
264 for( _i_ = 0; _i_ < (_count_); _i_++) \
265 ((volatile DRV_WORD16 *)(_register_))[_i_] = (_buf_)[_i_]; \
269 #else // Big-endian version
271 #define HAL_READ_UINT16( _register_, _value_ ) \
272 ((_value_) = *((volatile DRV_WORD16 *)((DRV_ADDRWORD)(_register_)^3)))
274 #define HAL_WRITE_UINT16( _register_, _value_ ) \
275 (*((volatile DRV_WORD16 *)((DRV_ADDRWORD)(_register_)^3)) = (_value_))
277 #define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
279 drv_count32 _i_,_j_; \
280 volatile DRV_WORD16* _r_ = ((DRV_ADDRWORD)(_register_)^3); \
281 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
282 (_buf_)[_i_] = _r_[_j_]; \
285 #define HAL_WRITE_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
287 drv_count32 _i_,_j_; \
288 volatile DRV_WORD16* _r_ = ((DRV_ADDRWORD)(_register_)^3); \
289 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
290 _r_[_j_] = (_buf_)[_i_]; \
293 #define HAL_READ_UINT16_STRING( _register_, _buf_, _count_) \
296 volatile DRV_WORD16* _r_ = ((DRV_ADDRWORD)(_register_)^3); \
297 for( _i_ = 0 = 0; _i_ < (_count_); _i_++) \
298 (_buf_)[_i_] = _r_[_i_]; \
301 #define HAL_WRITE_UINT16_STRING( _register_, _buf_, _count_) \
304 volatile DRV_WORD16* _r_ = ((DRV_ADDRWORD)(_register_)^3); \
305 for( _i_ = 0 = 0; _i_ < (_count_); _i_++) \
306 _r_[_i_] = (_buf_)[_i_]; \
312 //-----------------------------------------------------------------------------
314 // Individual and vectorized access to 32 bit registers.
316 // Note: same macros for little- and big-endian systems.
318 #define HAL_READ_UINT32( _register_, _value_ ) \
319 ((_value_) = *((volatile DRV_WORD32 *)(_register_)))
321 #define HAL_WRITE_UINT32( _register_, _value_ ) \
322 (*((volatile DRV_WORD32 *)(_register_)) = (_value_))
324 #define HAL_READ_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \
326 drv_count32 _i_,_j_; \
327 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
328 (_buf_)[_i_] = ((volatile DRV_WORD32 *)(_register_))[_j_]; \
331 #define HAL_WRITE_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \
333 drv_count32 _i_,_j_; \
334 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
335 ((volatile DRV_WORD32 *)(_register_))[_j_] = (_buf_)[_i_]; \
338 #define HAL_READ_UINT32_STRING( _register_, _buf_, _count_) \
341 for( _i_ = 0; _i_ < (_count_); _i_++) \
342 (_buf_)[_i_] = ((volatile DRV_WORD32 *)(_register_))[_i_]; \
345 #define HAL_WRITE_UINT32_STRING( _register_, _buf_, _count_) \
348 for( _i_ = 0; _i_ < (_count_); _i_++) \
349 ((volatile DRV_WORD32 *)(_register_))[_i_] = (_buf_)[_i_]; \
353 #define HAL_IO_MACROS_DEFINED
355 #endif // !HAL_IO_MACROS_DEFINED
358 /**----------------------------------------------------------------------------*
359 ** Local Function Prototype **
360 **----------------------------------------------------------------------------*/
362 /**----------------------------------------------------------------------------*
363 ** Function Prototype **
364 **----------------------------------------------------------------------------*/
367 /**----------------------------------------------------------------------------*
369 **----------------------------------------------------------------------------*/
373 /**---------------------------------------------------------------------------*/