1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2010-2015
4 * NVIDIA Corporation <www.nvidia.com>
7 #ifndef _TEGRA_GP_PADCTRL_H_
8 #define _TEGRA_GP_PADCTRL_H_
10 #define GP_HIDREV 0x804
12 /* bit fields definitions for APB_MISC_GP_HIDREV register */
13 #define HIDREV_CHIPID_SHIFT 8
14 #define HIDREV_CHIPID_MASK (0xff << HIDREV_CHIPID_SHIFT)
15 #define HIDREV_MAJORPREV_SHIFT 4
16 #define HIDREV_MAJORPREV_MASK (0xf << HIDREV_MAJORPREV_SHIFT)
18 /* CHIPID field returned from APB_MISC_GP_HIDREV register */
19 #define CHIPID_TEGRA20 0x20
20 #define CHIPID_TEGRA30 0x30
21 #define CHIPID_TEGRA114 0x35
22 #define CHIPID_TEGRA124 0x40
23 #define CHIPID_TEGRA210 0x21
25 #endif /* _TEGRA_GP_PADCTRL_H_ */