1 /*****************************************************************************
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2 ** File Name: effuse_drv.h *
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3 ** Author: Jenny Deng *
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4 ** Date: 20/10/2009 *
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5 ** Copyright: 2009 Spreadtrum, Incorporated. All Rights Reserved. *
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6 ** Description: This file defines the basic operation interfaces of *
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7 ** EFuse initilize and operation. It provides read and *
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8 ** writer interfaces of 0~5 efuse. Efuse 0 for Sn block. *
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9 ** Efuse 1 to 4 for Hash blocks. Efuse 5 for control block. *
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10 *****************************************************************************
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11 *****************************************************************************
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13 **--------------------------------------------------------------------------*
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14 ** DATE Author Operation *
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15 ** 20/10/2009 Jenny.Deng Create. *
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16 ** 26/10/2009 Yong.Li Update. *
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17 ** 30/10/2009 Yong.Li Update after review. *
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18 *****************************************************************************/
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20 #ifndef _EFuse_DRV_H
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21 #define _EFuse_DRV_H
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23 #include "sci_types.h"
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25 /***********************structure define**************************************/
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26 #define EFUSE_DATA_RD (SPRD_UIDEFUSE_PHYS + 0x0000)
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27 #define EFUSE_DATA_WR (SPRD_UIDEFUSE_PHYS + 0x0004)
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28 #define EFUSE_BLOCK_INDEX (SPRD_UIDEFUSE_PHYS + 0x0008)
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29 #define EFUSE_MODE_CTRL (SPRD_UIDEFUSE_PHYS + 0x000c)
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30 #define EFUSE_PGM_PARA (SPRD_UIDEFUSE_PHYS + 0x0010)
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31 #define EFUSE_STATUS (SPRD_UIDEFUSE_PHYS + 0x0014)
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32 #define EUSE_MEM_BLOCK_FLAGS (SPRD_UIDEFUSE_PHYS + 0x0018)
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33 #define EUSE_MEM_BLOCK_FLAGS_CLR (SPRD_UIDEFUSE_PHYS + 0x001c)
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34 #define EFUSE_MAGIC_NUMBER (SPRD_UIDEFUSE_PHYS + 0x0020)
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36 /* bits definitions for register REG_EFUSE_BLOCK_INDEX */
37 #define BITS_READ_INDEX(_x_) ( (_x_) << 0 & ( BIT_0 | BIT_1 | BIT_2 ) )
38 #define BITS_PGM_INDEX(_x_) ( (_x_) << 16 & ( BIT_16 | BIT_17 | BIT_18 ) )
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40 #define SHIFT_READ_INDEX ( 0 )
41 #define MASK_READ_INDEX ( BIT_0 | BIT_1 | BIT_2 )
43 #define SHIFT_PGM_INDEX ( 16 )
44 #define MASK_PGM_INDEX ( BIT_16 | BIT_17 | BIT_18 )
46 /* bits definitions for register REG_EFUSE_MODE_CTRL */
47 #define BIT_PG_START ( BIT_0 )
48 #define BIT_RD_START ( BIT_1 )
49 #define BIT_STANDBY_START ( BIT_2 )
51 /* bits definitions for register REG_EFUSE_PGM_PARA */
52 #define BITS_TPGM_TIME_CNT(_x_) ( (_x_) & 0x1FF )
53 #define BIT_CLK_EFS_EN ( BIT_28 )
54 #define BIT_EFS_VDD_ON ( BIT_29 )
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55 #define BIT_PCLK_DIV_EN ( BIT_30 )
56 #define BIT_PGM_EN ( BIT_31 )
58 /* bits definitions for register REG_EFUSE_STATUS */
59 #define BIT_PGM_BUSY ( BIT_0 )
60 #define BIT_READ_BUSY ( BIT_1 )
61 #define BIT_STANDBY_BUSY ( BIT_2 )
63 /* bits definitions for register REG_EFUSE_BLK_FLAGS */
64 #define BIT_BLK0_PROT_FLAG ( BIT_0 )
65 #define BIT_BLK1_PROT_FLAG ( BIT_1 )
66 #define BIT_BLK2_PROT_FLAG ( BIT_2 )
67 #define BIT_BLK3_PROT_FLAG ( BIT_3 )
68 #define BIT_BLK4_PROT_FLAG ( BIT_4 )
69 #define BIT_BLK5_PROT_FLAG ( BIT_5 )
70 #define BIT_BLK6_PROT_FLAG ( BIT_6 )
71 #define BIT_BLK7_PROT_FLAG ( BIT_7 )
73 /* bits definitions for register REG_EFUSE_BLK_CLR */
74 #define BIT_BLK0_PROT_FLAG_CLR ( BIT_0 )
75 #define BIT_BLK1_PROT_FLAG_CLR ( BIT_1 )
76 #define BIT_BLK2_PROT_FLAG_CLR ( BIT_2 )
77 #define BIT_BLK3_PROT_FLAG_CLR ( BIT_3 )
78 #define BIT_BLK4_PROT_FLAG_CLR ( BIT_4 )
79 #define BIT_BLK5_PROT_FLAG_CLR ( BIT_5 )
80 #define BIT_BLK6_PROT_FLAG_CLR ( BIT_6 )
81 #define BIT_BLK7_PROT_FLAG_CLR ( BIT_7 )
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83 /* bits definitions for register REG_EFUSE_MAGIC_NUMBER */
84 #define BITS_MAGIC_NUMBER(_x_) ( (_x_) & 0xFFFF )
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85 /***********************function declaration**********************************/
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86 int sci_efuse_calibration_get(unsigned int * p_cal_data);
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