2 * Copyright (C) 2012 Spreadtrum Communications Inc.
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #ifndef __ASM_ARCH_SPRD_IRQS_SC8830_H
15 #define __ASM_ARCH_SPRD_IRQS_SC8830_H
17 #define IRQ_SPECIAL_LATCH 0
18 #define IRQ_SOFT_TRIGGED0_INT 1
19 #define IRQ_SER0_INT 2
20 #define IRQ_SER1_INT 3
21 #define IRQ_SER2_INT 4
22 #define IRQ_SER3_INT 5
23 #define IRQ_SER4_INT 6
24 #define IRQ_SPI0_INT 7
25 #define IRQ_SPI1_INT 8
26 #define IRQ_SPI2_INT 9
27 #define IRQ_SIM0_INT 10
28 #define IRQ_I2C0_INT 11
29 #define IRQ_I2C1_INT 12
30 #define IRQ_I2C2_INT 13
31 #define IRQ_I2C3_INT 14
32 #define IRQ_I2C4_INT 15
33 #define IRQ_IIS0_INT 16
34 #define IRQ_IIS1_INT 17
35 #define IRQ_IIS2_INT 18
36 #define IRQ_IIS3_INT 19
37 #define IRQ_REQ_AUD_INT 20
38 #define IRQ_REQ_AUD_VBC_AFIFO_INT 21
39 #define IRQ_REQ_AUD_VBC_DA_INT 22
40 #define IRQ_REQ_AUD_VBC_AD01_INT 23
41 #define IRQ_REQ_AUD_VBC_AD23_INT 24
42 #define IRQ_ADI_INT 25
43 #define IRQ_THM_INT 26
45 #define IRQ_AONTMR0_INT 28
46 #define IRQ_APTMR0_INT 29
47 #define IRQ_AONSYST_INT 30
48 #define IRQ_APSYST_INT 31
50 #define IRQ_AONI2C_INT 34
51 #define IRQ_GPIO_INT 35
52 #define IRQ_KPD_INT 36
53 #define IRQ_EIC_INT 37
54 #define IRQ_ANA_INT 38
55 #define IRQ_GPU_INT 39
56 #define IRQ_CSI_INT0 40
57 #define IRQ_CSI_INT1 41
58 #define IRQ_JGP_INT 42
59 #define IRQ_VSP_INT 43
60 #define IRQ_ISP_INT 44
61 #define IRQ_DCAM_INT 45
62 #define IRQ_DISPC0_INT 46
63 #define IRQ_DISPC1_INT 47
64 #define IRQ_DSI0_INT 48
65 #define IRQ_DSI1_INT 49
66 #define IRQ_DMA_INT 50
67 #define IRQ_GSP_INT 51
68 #define IRQ_GPS_INT 52
69 #define IRQ_GPS_RTCEXP_INT 53
70 #define IRQ_GPS_WAKEUP_INT 54
71 #define IRQ_USBD_INT 55
72 #define IRQ_NFC_INT 56
73 #define IRQ_SDIO0_INT 57
74 #define IRQ_SDIO1_INT 58
75 #define IRQ_SDIO2_INT 59
76 #define IRQ_EMMC_INT 60
77 #define IRQ_BM0_INT 61
78 #define IRQ_BM1_INT 62
79 #define IRQ_BM2_INT 63
80 #define IRQ_DRM_INT 66
81 #define IRQ_CP0_DSP_INT 67
82 #define IRQ_CP0_MCU0_INT 68
83 #define IRQ_CP0_MCU1_INT 69
84 #define IRQ_CP1_DSP_INT 70
85 #define IRQ_CP1_MCU0_INT 71
86 #define IRQ_CP1_MCU1_INT 72
87 #define IRQ_CP2_INT0_INT 73
88 #define IRQ_CP2_INT1_INT 74
89 #define IRQ_CP0_DSP_FIQ_INT 75
90 #define IRQ_CP0_MCU_FIQ0_INT 76
91 #define IRQ_CP0_MCU_FIQ1_INT 77
92 #define IRQ_CP1_MCU_FIQ_INT 78
93 #define IRQ_NFC_INT 79
94 #define IRQ_NFC_INT 80
95 #define IRQ_NFC_INT 81
96 #define IRQ_NFC_INT 82
97 #define IRQ_NFC_INT 83
98 #define IRQ_NFC_INT 84
99 #define IRQ_NFC_INT 85
100 #define IRQ_NFC_INT 86
101 #define IRQ_NFC_INT 87
102 #define IRQ_NFC_INT 88
103 #define IRQ_NFC_INT 89
104 #define IRQ_NFC_INT 90
105 #define IRQ_NFC_INT 91
106 #define IRQ_NPMUIRQ0_INT 92
107 #define IRQ_NPMUIRQ1_INT 93
108 #define IRQ_NPMUIRQ2_INT 94
109 #define IRQ_NPMUIRQ3_INT 95
110 #define IRQ_CA7COM0_INT 98
111 #define IRQ_CA7COM1_INT 99
112 #define IRQ_CA7COM2_INT 100
113 #define IRQ_CA7COM3_INT 101
114 #define IRQ_NCNTV0_INT 102
115 #define IRQ_NCNTV1_INT 103
116 #define IRQ_NCNTV2_INT 104
117 #define IRQ_NCNTV3_INT 105
118 #define IRQ_NCNTHP0_INT 106
119 #define IRQ_NCNTHP1_INT 107
120 #define IRQ_NCNTHP2_INT 108
121 #define IRQ_NCNTHP3_INT 109
122 #define IRQ_NCNTPN0_INT 110
123 #define IRQ_NCNTPN1_INT 111
124 #define IRQ_NCNTPN2_INT 112
125 #define IRQ_NCNTPN3_INT 113
126 #define IRQ_NCNTPS0_INT 114
127 #define IRQ_NCNTPS1_INT 115
128 #define IRQ_NCNTPS2_INT 116
129 #define IRQ_NCNTPS3_INT 117
130 #define IRQ_APTMR1_INT 118
131 #define IRQ_APTMR2_INT 119
132 #define IRQ_APTMR3_INT 120
133 #define IRQ_APTMR4_INT 121
134 #define IRQ_AVS_INT 122
135 #define IRQ_APWDG_INT 123
136 #define IRQ_CA7WDG_INT 124
138 /* analog die interrupt number */
139 #define IRQ_ANA_ADC_INT 0
140 #define IRQ_ANA_GPIO_INT 1
141 #define IRQ_ANA_RTC_INT 2
142 #define IRQ_ANA_WDG_INT 3
143 #define IRQ_ANA_TPC_INT 4
144 #define IRQ_ANA_EIC_INT 5
145 #define IRQ_ANA_CHGRWDG_INT 6
146 #define IRQ_ANA_AUD_INT 7
147 #define IRQ_ANA_DCDC_OTP_INT 8
148 #define IRQ_ANA_INT_START IRQ_ANA_ADC_INT
149 #define NR_ANA_IRQS (9)
150 #define GPIO_IRQ_START 9